[PATCH v3 0/8] RISC-V: Implement support for big endian targets
Nelson Chu
nelson.chu@sifive.com
Tue Dec 29 05:25:41 GMT 2020
On Sun, Dec 27, 2020 at 10:53 PM Marcus Comstedt <marcus@mc.pp.se> wrote:
>
>
> This is an updated patch series for big endian RISC-V support.
> Changes since v2:
>
> * gas now defaults to big endian when the triplet is riscvNNbe*-*-*.
>
> * TARGET_BYTES_BIG_ENDIAN is now defined by tc-risc.h only if it is
> not already defined by config.h.
>
> * Modified riscv_is_insn_reloc to never shift a 64-bit value 64 bits,
> as this is undefined behaviour in ISO C.
>
> * Fixed byteorder of alignment nop:s.
> * Updated the gas and ld testsuites to handle big endian
>
> All gas and ld testsuite fails are fixed. What remains is
Thanks for updating these. I get the gp-test fail with your eighth
patch, but they can be fixed by following minor changes,
diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
index cb7c2ab..eda42d8 100644
--- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
+++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
@@ -120,7 +120,7 @@ if [istarget "riscv*-*-*"] {
return
}
- set abis { rv32gc ilp32 [riscv_choose_ilp32_emul] rv64gc lp64
[riscv_choose_lp64_emul] }
+ set abis { rv32gc ilp32 riscv_choose_ilp32_emul rv64gc lp64
riscv_choose_lp64_emul }
foreach { arch abi emul } $abis {
# This checks whether our linker scripts handle __global_pointer$
# correctly. It should be defined in executables and PIE, but not
@@ -128,13 +128,13 @@ if [istarget "riscv*-*-*"] {
set suff64 [string map {ilp32 "" lp64 -64} $abi]
run_ld_link_tests [list \
[list "gp test ($abi shared library)" \
- "-m$emul -shared" "" \
+ "-m [$emul] -shared" ""\
"-march=$arch -mabi=$abi -fpic" \
{ gp-test.s } \
[list "readelf --syms gp-test-lib.sd"] \
"gp-test-lib-${abi}.so"] \
[list "gp test ($abi executable)" \
- "-m$emul" "" \
+ "-m [$emul]" "" \
"-march=$arch -mabi=$abi" \
{ gp-test.s } \
[list "readelf --syms gp-test.sd"] \
With the above minor changes, I can pass the gcc and binutils
riscv-gnu-toolchain/regressions for little-endian toolchains, so the
series of patches are fine to me for now. Other stuff can be delayed
until you send the gcc patches in the future.
> XPASS: ld-elf/compressed1d
>
> which might be unrelated (I haven't checked if it also XPASSes for
> little endian).
We will choose the uncompressed .debug_aranges since the sizes of
compressed and uncompressed are the same in this case
(273a49858fa9c8d73de87167618ef99d70f9731a). I think the RISC-V
big-endian patches won't break the compress rules, just break the
compressed1d testcase by accident. Jim already had written an
alternative test compressed1d-alt, so it is accepted to me that we add
the compressed1d to the riscv-gnu-toolcahin/test/allowlist/, and
always check the compressed1d-alt.d instead of it.
As I mentioned above, if these patches won't break the current
little-endian toolchains, and can pass at least the binutils testcases
(big-endian binutils without compiler support), then they are OK to me
at this stage. However, they look good so far. Other issues can be
fixed/discussed in the future patches, if you have sent the gcc/gdb
patches.
Thank you very much
Nelson
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