[PATCH v3 0/8] RISC-V: Implement support for big endian targets

[Marcus Comstedt]

Hi Nelson.

Nelson Chu <nelson.chu@sifive.com> writes:

> -    set abis { rv32gc ilp32 [riscv_choose_ilp32_emul] rv64gc lp64
> [riscv_choose_lp64_emul] }
> +    set abis { rv32gc ilp32 riscv_choose_ilp32_emul rv64gc lp64
> riscv_choose_lp64_emul }
>      foreach { arch abi emul } $abis {
[...]
>                                [list "gp test ($abi shared library)" \
> -                                   "-m$emul -shared" "" \
> +                                   "-m [$emul] -shared" ""\
>                                     "-march=$arch -mabi=$abi -fpic" \

Ok.  What was the issue with the original version?  (It worked for me,
although I only tested riscv64be.)  Is the "istarget" command
dependent on upvars set by run_ld_link_tests?

Thanks


  // Marcus