[PATCH v2 1/6] RISC-V: Support assembly and disassembly in big endian mode

[Marcus Comstedt]

Nelson Chu <nelson.chu@sifive.com> writes:

> I can not build the default big-endian binutils by setting
> --target=riscv32be-unknow-elf.  You can refer to what other targets
> did in the gas/configure.tgt, to set the `endian` correctly;
> Otherwise, lots of ld testcases are broken and failed.  And you also
> need to update the gas/config/tc-riscv.h file, to only set the
> TARGET_BYTES_BIG_ENDIAN if it is undefined.

Ah, yes you are right.  It seems that I overlooked this due to gcc
passing -mbig-endian for that triple.  Will fix.


  // Marcus