[PATCH][GAS][aarch64] GAS doesn't validate the architecture version for any tlbi registers
Przemyslaw Wirkus
Przemyslaw.Wirkus@arm.com
Mon Aug 3 13:38:50 GMT 2020
Hello,
GAS does not currently validate the architecture version for any tlbi
registers. GAS builds the example below without the need of passing the
correct -march switch:
Before patch:
$ echo "tlbi rvae1is, x0" | aarch64-none-linux-gnu-as
After patch:
$ echo "tlbi rvae1is, x0" | ./aarch64-none-linux-gnu-as -march=armv8.4-a
$ echo "tlbi rvae1is, x0" | ./aarch64-none-linux-gnu-as -march=armv8.3-a
{standard input}: Assembler messages:
{standard input}:1: Error: selected processor does not support system register name 'rvae1is'
This patch introduces few notable changes:
* Merged aarch64_sys_reg_supported_p function into aarch64_sys_ins_reg_supported_p
in order to unify same functionality, split previously into those two functions.
* Function aarch64_sys_reg_supported_p was removed.
* Function aarch64_sys_ins_reg_supported_p returns now FALSE by default in order
to harden sysreg support check.
aarch64-none-linux-gnu binutils regression tests OK.
Since this is a bugfix can I backport to binutils 2.35 ?
OK for master branch?
PS: I do not have write permission; can this be committed in my name if approved
please?
Kind regards,
Przemyslaw
---
gas/ChangeLog:
2020-08-03 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* gas/config/tc-aarch64.c (parse_sys_reg): Call to
aarch64_sys_ins_reg_supported_p instead of aarch64_sys_reg_supported_p.
(parse_sys_ins_reg): Add aarch64_sys_reg_deprecated_p check.
* include/opcode/aarch64.h (aarch64_sys_reg_deprecated_p): Functions
paramaters changed.
(aarch64_sys_reg_supported_p): Function removed.
(aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
* opcodes/aarch64-opc.c (aarch64_print_operand):
(aarch64_sys_reg_deprecated_p): Functions paramaters changed.
(aarch64_sys_reg_supported_p): Function removed.
(aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
(aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
into this function.
* gas/testsuite/gas/aarch64/illegal-sysreg-5.d: New test.
* gas/testsuite/gas/aarch64/illegal-sysreg-5.l: New test.
* gas/testsuite/gas/aarch64/sysreg-5.s: New test.
-------------- next part --------------
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index ecb15d2343740426a4c867a9e1a03a3414fbbc45..12b6d13378e71c5b6236ad9d005a28c0394bd89e 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4137,10 +4137,11 @@ parse_sys_reg (char **str, struct hash_control *sys_regs,
if (pstatefield_p && !aarch64_pstatefield_supported_p (cpu_variant, o))
as_bad (_("selected processor does not support PSTATE field "
"name '%s'"), buf);
- if (!pstatefield_p && !aarch64_sys_reg_supported_p (cpu_variant, o))
+ if (!pstatefield_p && !aarch64_sys_ins_reg_supported_p (cpu_variant,
+ o->value, o->flags, o->features))
as_bad (_("selected processor does not support system register "
"name '%s'"), buf);
- if (aarch64_sys_reg_deprecated_p (o))
+ if (aarch64_sys_reg_deprecated_p (o->flags))
as_warn (_("system register name '%s' is deprecated and may be "
"removed in a future release"), buf);
value = o->value;
@@ -4172,9 +4173,12 @@ parse_sys_ins_reg (char **str, struct hash_control *sys_ins_regs)
if (!o)
return NULL;
- if (!aarch64_sys_ins_reg_supported_p (cpu_variant, o))
+ if (!aarch64_sys_ins_reg_supported_p (cpu_variant, o->value, o->flags, 0))
as_bad (_("selected processor does not support system register "
"name '%s'"), buf);
+ if (aarch64_sys_reg_deprecated_p (o->flags))
+ as_warn (_("system register name '%s' is deprecated and may be "
+ "removed in a future release"), buf);
*str = q;
return o;
diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-5.d b/gas/testsuite/gas/aarch64/illegal-sysreg-5.d
new file mode 100644
index 0000000000000000000000000000000000000000..d108d0f474feed34de58fe2793d6f66e674be5e5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg-5.d
@@ -0,0 +1,3 @@
+#as: -march=armv8.3-a
+#source: sysreg-5.s
+#error_output: illegal-sysreg-5.l
diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-5.l b/gas/testsuite/gas/aarch64/illegal-sysreg-5.l
new file mode 100644
index 0000000000000000000000000000000000000000..cd3eff85d55ca7684c5413957805f8a13e05abea
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg-5.l
@@ -0,0 +1,2 @@
+[^:]*: Assembler messages:
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'rvae1is'
diff --git a/gas/testsuite/gas/aarch64/sysreg-5.s b/gas/testsuite/gas/aarch64/sysreg-5.s
new file mode 100644
index 0000000000000000000000000000000000000000..c695b1b17a61fa7efc41a04b8a154e451177f8f0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg-5.s
@@ -0,0 +1 @@
+tlbi rvae1is, x0
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 1e6ea191c320040f9af48ab88a52f594d90c75c6..4b71f93b9461bd92692ff9296afa37313b3fd38d 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -956,9 +956,7 @@ typedef struct
extern const aarch64_sys_reg aarch64_sys_regs [];
extern const aarch64_sys_reg aarch64_pstatefields [];
-extern bfd_boolean aarch64_sys_reg_deprecated_p (const aarch64_sys_reg *);
-extern bfd_boolean aarch64_sys_reg_supported_p (const aarch64_feature_set,
- const aarch64_sys_reg *);
+extern bfd_boolean aarch64_sys_reg_deprecated_p (const uint32_t);
extern bfd_boolean aarch64_pstatefield_supported_p (const aarch64_feature_set,
const aarch64_sys_reg *);
@@ -971,8 +969,8 @@ typedef struct
extern bfd_boolean aarch64_sys_ins_reg_has_xt (const aarch64_sys_ins_reg *);
extern bfd_boolean
-aarch64_sys_ins_reg_supported_p (const aarch64_feature_set,
- const aarch64_sys_ins_reg *);
+aarch64_sys_ins_reg_supported_p (const aarch64_feature_set, aarch64_insn,
+ uint32_t, aarch64_feature_set);
extern const aarch64_sys_ins_reg aarch64_sys_regs_ic [];
extern const aarch64_sys_ins_reg aarch64_sys_regs_dc [];
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 148ffb7bde6d23589b7d575a7d187c45ae68c7a4..d2b325f15b736cb55889c44897411437dc71de66 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -3695,7 +3695,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
/* Try and find an exact match, But if that fails, return the first
partial match that was found. */
if (aarch64_sys_regs[i].value == opnd->sysreg.value
- && ! aarch64_sys_reg_deprecated_p (&aarch64_sys_regs[i])
+ && ! aarch64_sys_reg_deprecated_p (aarch64_sys_regs[i].flags)
&& (name == NULL || exact_match))
{
name = aarch64_sys_regs[i].name;
@@ -4245,72 +4245,9 @@ const aarch64_sys_reg aarch64_sys_regs [] =
};
bfd_boolean
-aarch64_sys_reg_deprecated_p (const aarch64_sys_reg *reg)
+aarch64_sys_reg_deprecated_p (const uint32_t reg_flags)
{
- return (reg->flags & F_DEPRECATED) != 0;
-}
-
-bfd_boolean
-aarch64_sys_reg_supported_p (const aarch64_feature_set features,
- const aarch64_sys_reg *reg)
-{
- if (!(reg->flags & F_ARCHEXT))
- return TRUE;
-
- if (!AARCH64_CPU_HAS_ALL_FEATURES (features, reg->features))
- return FALSE;
-
- /* ARMv8.4 TLB instructions. */
- if ((reg->value == CPENS (0, C8, C1, 0)
- || reg->value == CPENS (0, C8, C1, 1)
- || reg->value == CPENS (0, C8, C1, 2)
- || reg->value == CPENS (0, C8, C1, 3)
- || reg->value == CPENS (0, C8, C1, 5)
- || reg->value == CPENS (0, C8, C1, 7)
- || reg->value == CPENS (4, C8, C4, 0)
- || reg->value == CPENS (4, C8, C4, 4)
- || reg->value == CPENS (4, C8, C1, 1)
- || reg->value == CPENS (4, C8, C1, 5)
- || reg->value == CPENS (4, C8, C1, 6)
- || reg->value == CPENS (6, C8, C1, 1)
- || reg->value == CPENS (6, C8, C1, 5)
- || reg->value == CPENS (4, C8, C1, 0)
- || reg->value == CPENS (4, C8, C1, 4)
- || reg->value == CPENS (6, C8, C1, 0)
- || reg->value == CPENS (0, C8, C6, 1)
- || reg->value == CPENS (0, C8, C6, 3)
- || reg->value == CPENS (0, C8, C6, 5)
- || reg->value == CPENS (0, C8, C6, 7)
- || reg->value == CPENS (0, C8, C2, 1)
- || reg->value == CPENS (0, C8, C2, 3)
- || reg->value == CPENS (0, C8, C2, 5)
- || reg->value == CPENS (0, C8, C2, 7)
- || reg->value == CPENS (0, C8, C5, 1)
- || reg->value == CPENS (0, C8, C5, 3)
- || reg->value == CPENS (0, C8, C5, 5)
- || reg->value == CPENS (0, C8, C5, 7)
- || reg->value == CPENS (4, C8, C0, 2)
- || reg->value == CPENS (4, C8, C0, 6)
- || reg->value == CPENS (4, C8, C4, 2)
- || reg->value == CPENS (4, C8, C4, 6)
- || reg->value == CPENS (4, C8, C4, 3)
- || reg->value == CPENS (4, C8, C4, 7)
- || reg->value == CPENS (4, C8, C6, 1)
- || reg->value == CPENS (4, C8, C6, 5)
- || reg->value == CPENS (4, C8, C2, 1)
- || reg->value == CPENS (4, C8, C2, 5)
- || reg->value == CPENS (4, C8, C5, 1)
- || reg->value == CPENS (4, C8, C5, 5)
- || reg->value == CPENS (6, C8, C6, 1)
- || reg->value == CPENS (6, C8, C6, 5)
- || reg->value == CPENS (6, C8, C2, 1)
- || reg->value == CPENS (6, C8, C2, 5)
- || reg->value == CPENS (6, C8, C5, 1)
- || reg->value == CPENS (6, C8, C5, 5))
- && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_4))
- return FALSE;
-
- return TRUE;
+ return (reg_flags & F_DEPRECATED) != 0;
}
/* The CPENC below is fairly misleading, the fields
@@ -4508,55 +4445,112 @@ aarch64_sys_ins_reg_has_xt (const aarch64_sys_ins_reg *sys_ins_reg)
extern bfd_boolean
aarch64_sys_ins_reg_supported_p (const aarch64_feature_set features,
- const aarch64_sys_ins_reg *reg)
+ aarch64_insn reg_value,
+ uint32_t reg_flags,
+ aarch64_feature_set reg_features)
{
- if (!(reg->flags & F_ARCHEXT))
+
+ if (!(reg_flags & F_ARCHEXT))
+ return TRUE;
+
+ if (reg_features
+ && AARCH64_CPU_HAS_ALL_FEATURES (features, reg_features))
+ return TRUE;
+
+ /* ARMv8.4 TLB instructions. */
+ if ((reg_value == CPENS (0, C8, C1, 0)
+ || reg_value == CPENS (0, C8, C1, 1)
+ || reg_value == CPENS (0, C8, C1, 2)
+ || reg_value == CPENS (0, C8, C1, 3)
+ || reg_value == CPENS (0, C8, C1, 5)
+ || reg_value == CPENS (0, C8, C1, 7)
+ || reg_value == CPENS (4, C8, C4, 0)
+ || reg_value == CPENS (4, C8, C4, 4)
+ || reg_value == CPENS (4, C8, C1, 1)
+ || reg_value == CPENS (4, C8, C1, 5)
+ || reg_value == CPENS (4, C8, C1, 6)
+ || reg_value == CPENS (6, C8, C1, 1)
+ || reg_value == CPENS (6, C8, C1, 5)
+ || reg_value == CPENS (4, C8, C1, 0)
+ || reg_value == CPENS (4, C8, C1, 4)
+ || reg_value == CPENS (6, C8, C1, 0)
+ || reg_value == CPENS (0, C8, C6, 1)
+ || reg_value == CPENS (0, C8, C6, 3)
+ || reg_value == CPENS (0, C8, C6, 5)
+ || reg_value == CPENS (0, C8, C6, 7)
+ || reg_value == CPENS (0, C8, C2, 1)
+ || reg_value == CPENS (0, C8, C2, 3)
+ || reg_value == CPENS (0, C8, C2, 5)
+ || reg_value == CPENS (0, C8, C2, 7)
+ || reg_value == CPENS (0, C8, C5, 1)
+ || reg_value == CPENS (0, C8, C5, 3)
+ || reg_value == CPENS (0, C8, C5, 5)
+ || reg_value == CPENS (0, C8, C5, 7)
+ || reg_value == CPENS (4, C8, C0, 2)
+ || reg_value == CPENS (4, C8, C0, 6)
+ || reg_value == CPENS (4, C8, C4, 2)
+ || reg_value == CPENS (4, C8, C4, 6)
+ || reg_value == CPENS (4, C8, C4, 3)
+ || reg_value == CPENS (4, C8, C4, 7)
+ || reg_value == CPENS (4, C8, C6, 1)
+ || reg_value == CPENS (4, C8, C6, 5)
+ || reg_value == CPENS (4, C8, C2, 1)
+ || reg_value == CPENS (4, C8, C2, 5)
+ || reg_value == CPENS (4, C8, C5, 1)
+ || reg_value == CPENS (4, C8, C5, 5)
+ || reg_value == CPENS (6, C8, C6, 1)
+ || reg_value == CPENS (6, C8, C6, 5)
+ || reg_value == CPENS (6, C8, C2, 1)
+ || reg_value == CPENS (6, C8, C2, 5)
+ || reg_value == CPENS (6, C8, C5, 1)
+ || reg_value == CPENS (6, C8, C5, 5))
+ && AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_4))
return TRUE;
/* DC CVAP. Values are from aarch64_sys_regs_dc. */
- if (reg->value == CPENS (3, C7, C12, 1)
- && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
- return FALSE;
+ if (reg_value == CPENS (3, C7, C12, 1)
+ && AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+ return TRUE;
/* DC CVADP. Values are from aarch64_sys_regs_dc. */
- if (reg->value == CPENS (3, C7, C13, 1)
- && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_CVADP))
- return FALSE;
+ if (reg_value == CPENS (3, C7, C13, 1)
+ && AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_CVADP))
+ return TRUE;
/* DC <dc_op> for ARMv8.5-A Memory Tagging Extension. */
- if ((reg->value == CPENS (0, C7, C6, 3)
- || reg->value == CPENS (0, C7, C6, 4)
- || reg->value == CPENS (0, C7, C10, 4)
- || reg->value == CPENS (0, C7, C14, 4)
- || reg->value == CPENS (3, C7, C10, 3)
- || reg->value == CPENS (3, C7, C12, 3)
- || reg->value == CPENS (3, C7, C13, 3)
- || reg->value == CPENS (3, C7, C14, 3)
- || reg->value == CPENS (3, C7, C4, 3)
- || reg->value == CPENS (0, C7, C6, 5)
- || reg->value == CPENS (0, C7, C6, 6)
- || reg->value == CPENS (0, C7, C10, 6)
- || reg->value == CPENS (0, C7, C14, 6)
- || reg->value == CPENS (3, C7, C10, 5)
- || reg->value == CPENS (3, C7, C12, 5)
- || reg->value == CPENS (3, C7, C13, 5)
- || reg->value == CPENS (3, C7, C14, 5)
- || reg->value == CPENS (3, C7, C4, 4))
- && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_MEMTAG))
- return FALSE;
+ if ((reg_value == CPENS (0, C7, C6, 3)
+ || reg_value == CPENS (0, C7, C6, 4)
+ || reg_value == CPENS (0, C7, C10, 4)
+ || reg_value == CPENS (0, C7, C14, 4)
+ || reg_value == CPENS (3, C7, C10, 3)
+ || reg_value == CPENS (3, C7, C12, 3)
+ || reg_value == CPENS (3, C7, C13, 3)
+ || reg_value == CPENS (3, C7, C14, 3)
+ || reg_value == CPENS (3, C7, C4, 3)
+ || reg_value == CPENS (0, C7, C6, 5)
+ || reg_value == CPENS (0, C7, C6, 6)
+ || reg_value == CPENS (0, C7, C10, 6)
+ || reg_value == CPENS (0, C7, C14, 6)
+ || reg_value == CPENS (3, C7, C10, 5)
+ || reg_value == CPENS (3, C7, C12, 5)
+ || reg_value == CPENS (3, C7, C13, 5)
+ || reg_value == CPENS (3, C7, C14, 5)
+ || reg_value == CPENS (3, C7, C4, 4))
+ && AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_MEMTAG))
+ return TRUE;
/* AT S1E1RP, AT S1E1WP. Values are from aarch64_sys_regs_at. */
- if ((reg->value == CPENS (0, C7, C9, 0)
- || reg->value == CPENS (0, C7, C9, 1))
- && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
- return FALSE;
+ if ((reg_value == CPENS (0, C7, C9, 0)
+ || reg_value == CPENS (0, C7, C9, 1))
+ && AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+ return TRUE;
/* CFP/DVP/CPP RCTX : Value are from aarch64_sys_regs_sr. */
- if (reg->value == CPENS (3, C7, C3, 0)
- && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_PREDRES))
- return FALSE;
+ if (reg_value == CPENS (3, C7, C3, 0)
+ && AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_PREDRES))
+ return TRUE;
- return TRUE;
+ return FALSE;
}
#undef C0
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