Add support for Intel TSXLDTRK instructions

[H.J. Lu]

On Thu, Apr 2, 2020 at 8:30 PM Cui, Lili <lili.cui@intel.com> wrote:
>
>
>
> > -----Original Message-----
> > From: H.J. Lu <hjl.tools@gmail.com>
> > Sent: Thursday, April 2, 2020 8:57 PM
> > To: Cui, Lili <lili.cui@intel.com>
> > Cc: binutils@sourceware.org; Zhang, Annita <annita.zhang@intel.com>; Liu,
> > Hongtao <hongtao.liu@intel.com>; Lu, Hongjiu <hongjiu.lu@intel.com>; Xiao,
> > Wei3 <wei3.xiao@intel.com>
> > Subject: Re: Add support for Intel TSXLDTRK instructions
> >
> > On Wed, Apr 1, 2020 at 8:20 PM Cui, Lili via Binutils
> > <binutils@sourceware.org> wrote:
> > >
> > > Hi all,
> > >
> > > This patch is about to enable binutils support for TSXLDTRK which
> > > would
> > >
> > > be in GLC. There's only 2 instructions: XRESLDTRK, XSUSLDTRK, more
> > >
> > > details please refer to
> > >
> > > https://software.intel.com/sites/default/files/managed/c5/15/architect
> > > ure-instruction-set-extensions-programming-reference.pdf
> > >
> > >
> > >
> > > Make check-gas is ok.
> > >
> > >
> > > gas/ChangeLog:
> > >
> > >               2020-04-02  Lili Cui  <lili.cui@intel.com>
> > >               * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
> > >               (cpu_noarch): Likewise.
> > >               * doc/c-i386.texi: Document TSXLDTRK.
> > >               * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
> > >               * testsuite/gas/i386/tsxldtrk.d: Likewise.
> > >               * testsuite/gas/i386/tsxldtrk.s: Likewise.
> > >
> > > opcodes/gas/ChangeLog:
> > >
> > >               2020-04-02  Lili Cui  <lili.cui@intel.com>
> > >               * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
> > >               (prefix_table): New instructions (see prefixes above).
> > >               (rm_table): Likewise
> > >               * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
> > >               CPU_ANY_TSXLDTRK_FLAGS.
> > >               (cpu_flags): Add CpuTSXLDTRK.
> > >               * i386-opc.h (enum): Add CpuTSXLDTRK.
> > >               (i386_cpu_flags): Add cputsxldtrk.
> > >               * i386-opc.tbl: Add XSUSPLDTRK insns.
> > >               * i386-init.h: Regenerate.
> > >               * i386-tbl.h: Likewise.
> >
> > Please do
> >
> > 1. Rebase against the current master.
> > 2. Remove blank line at the end of testsuite/gas/i386/tsxldtrk.s to fix
> >
> > $ git am 0001-Add-support-for-intel-TSXLDTRK-instructions.patch
> > Applying: Add support for intel TSXLDTRK instructions
> > .git/rebase-apply/patch:108: new blank line at EOF.
> > +
> > warning: 1 line adds whitespace errors.
> >
> > 3. Add x86-64-tsxldtrk.d.
> >
> > --
> > H.J.
>
>
> Done, Thanks.
>
> Lili.

@@ -962,6 +962,7 @@ enum
   PREFIX_0F01_REG_3_RM_1,
   PREFIX_0F01_REG_5_MOD_0,
   PREFIX_0F01_REG_5_MOD_3_RM_0,
+  PREFIX_0F01_REG_5_MOD_3_RM_1,
   PREFIX_0F01_REG_5_MOD_3_RM_2,
   PREFIX_0F01_REG_7_MOD_3_RM_2,
   PREFIX_0F01_REG_7_MOD_3_RM_3,
@@ -3646,6 +3647,16 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "serialize", { Skip_MODRM }, PREFIX_OPCODE },
     { "setssbsy", { Skip_MODRM }, PREFIX_OPCODE },
+    { Bad_Opcode },
+    { "xsuspldtrk",     { Skip_MODRM }, PREFIX_OPCODE },
+  },
+
+  /* PREFIX_0F01_REG_5_MOD_3_RM_2 */
      ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^  Typo.  Should be
PREFIX_0F01_REG_5_MOD_3_RM_1
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "xresldtrk",     { Skip_MODRM }, PREFIX_OPCODE },
   },

   /* PREFIX_0F01_REG_5_MOD_3_RM_2 */

OK with that fix.

Thanks.

-- 
H.J.