[PATCH, binutils, Arm] Add support for shift instructions in MVE

[Nick Clifton]

Hi Sudi,

> *** gas/ChangeLog ***
> 2019-xx-xx  Sudakshina Das  <sudi.das@arm.com>
> 
> 	* config/tc-arm.c (operand_parse_code): New entries for
> 	OP_RRnpcsp_I32 (register or integer operands).
> 	(do_mve_scalar_shift): New.
> 	(insns): New instructions for asrl, lsll, lsrl, sqrshrl, sqrshr, sqshl
> 	sqshll, srshr, srshrl, uqrshll, uqrshl, uqshll, uqshl, urshrl and urshr.
> 	* testsuite/gas/arm/mve-shift.d: New.
> 	* testsuite/gas/arm/mve-shift.s: New.
> 	* testsuite/gas/arm/mve-shift-bad.d: New.
> 	* testsuite/gas/arm/mve-shift-bad.s: New.
> 	* testsuite/gas/arm/mve-shift-bad.l: New.
> 
> *** opcodes/ChangeLog ***
> 2019-xx-xx  Sudakshina Das  <sudi.das@arm.com>
> 
> 	* arm-dis.c (emun mve_instructions): Updated for new instructions.
> 	(mve_opcodes): New instructions for asrl, lsll, lsrl, sqrshrl,
> 	sqrshr, sqshl, sqshll, srshr, srshrl, uqrshll, uqrshl, uqshll,
> 	uqshl, urshrl and urshr.
> 	(is_mve_okay_in_it): Add new instructions to TRUE list.
> 	(is_mve_unpredictable): Add cases for UNPRED_R13 and UNPRED_R15.
> 	(print_insn_mve): Updated to accept new %j,
> 	%<bitfield>m and %<bitfield>n patterns.

Approved - please apply.

Cheers
  Nick