[PATCH, binutils, Arm] Add support for conditional instructions in Armv8.1-M Mainline
Sudakshina Das
Sudi.Das@arm.com
Tue May 21 10:08:00 GMT 2019
Hi
This patch adds the following instructions which are part of the
Armv8.1-M Mainline:
CINC
CINV
CNEG
CSINC
CSINV
CSNEG
CSET
CSETM
CSEL
Testing: Added new tests for the valid and invalid instructions
operands. Testsuite shows no regression when run for arm-none-eabi targets.
Thanks
Sudi
ChangeLog entries are as follows :
*** gas/ChangeLog ***
2019-xx-xx Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (TOGGLE_BIT): New.
(T16_32_TAB): New entries for cinc, cinv, cneg, csinc,
csinv, csneg, cset, csetm and csel.
(operand_parse_code): New OP_RR_ZR.
(parse_operand): Handle case for OP_RR_ZR.
(do_t_cond): New.
(insns): New instructions for cinc, cinv, cneg, csinc,
csinv, csneg, cset, csetm, csel.
* testsuite/gas/arm/armv8_1-m-cond-bad.d: New test.
* testsuite/gas/arm/armv8_1-m-cond-bad.l: New test.
* testsuite/gas/arm/armv8_1-m-cond-bad.s: New test.
* testsuite/gas/arm/armv8_1-m-cond.d: New test.
* testsuite/gas/arm/armv8_1-m-cond.s: New test.
opcodes/ChangeLog:
2019-xx-xx Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (enum mve_instructions): New enum
for csinc, csinv, csneg, csel, cset, csetm, cinv, cinv
and cneg.
(mve_opcodes): New instructions as above.
(is_mve_encoding_conflict): Add cases for csinc, csinv,
csneg and csel.
(print_insn_mve): Accept new %<bitfield>c and %<bitfield>C.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: rb8154.patch
Type: text/x-patch
Size: 12205 bytes
Desc: rb8154.patch
URL: <https://sourceware.org/pipermail/binutils/attachments/20190521/8bb50135/attachment.bin>
More information about the Binutils
mailing list