[PATCH, binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Mainline

Andre Vieira (lists) andre.simoesdiasvieira@arm.com
Fri Apr 12 10:40:00 GMT 2019


Hi,

The former patch had an issue with the LE branch value sign flip.  It 
wasn't doing it for big-endian because of the wrong use of 'md_
chars_to_number'.  Swapping it for 'get_thumb32_insn' fixes the issue.

Also fixed a testism.

Is this OK?

Cheers,
Andre

*** bfd/ChnageLog ***

2019-04-12  Sudakshina Das  <sudi.das@arm.com>

	* reloc.c (BFD_RELOC_ARM_THUMB_LOOP12): New.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Regenerated.

*** gas/ChangeLog ***

2019-04-12  Sudakshina Das  <sudi.das@arm.com>
             Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR
	for the LR operand and optional LR operand.
	(parse_operands): Add switch cases for OP_LR and OP_oLR for
	both type checking and value checking.
	(encode_thumb32_addr_mode): New entries for DLS, WLS and LE.
	(v8_1_loop_reloc): New helper function for handling labels
	for the low overhead loop instructions.
	(do_t_loloop): New function to encode DLS, WLS and LE.
	(insns): New entries for WLS, DLS and LE.
	(md_pcrel_from_section): New switch case
	for BFD_RELOC_ARM_THUMB_LOOP12.
	(md_appdy_fix): Likewise.
	(tc_gen_reloc): Likewise.
	* testsuite/gas/arm/armv8_1-m-tloop.s: New.
	* testsuite/gas/arm/armv8_1-m-tloop.d: New.
	* testsuite/gas/arm/armv8_1-m-tloop-bad.s: New.
	* testsuite/gas/arm/armv8_1-m-tloop-bad.d: New.
	* testsuite/gas/arm/armv8_1-m-tloop-bad.l: New.

*** opcodes/ChangeLog ***

2019-04-12  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %P
	and %Q patterns.

On 04/04/2019 14:41, Andre Vieira (lists) wrote:
> Hi
> 
> This patch is part of a series of patches to add support for Armv8.1-M 
> Mainline instructions to binutils.
> This patch adds support to the Scalar low overhead loop instructions:
> LE
> WLS
> DLS
> 
> We also add a new assembler resolvable relocation bfd_reloc_code_real 
> enum for the 12-bit branch offset used in these instructions.
> Testing: Builds successfully and no regressions. Added new tests for the 
> valid and invalid instructions operands. Testsuite shows no regression 
> when run for arm-none-eabi targets.
> 
> Thanks
> Sudi
> 
> 
> ChangeLog entries are as follows :
> 
> *** bfd/ChnageLog ***
> 
> 2019-04-04  Sudakshina Das  <sudi.das@arm.com>
> 
>      * reloc.c (BFD_RELOC_ARM_THUMB_LOOP12): New.
>      * bfd-in2.h: Regenerated.
>      * libbfd.h: Regenerated.
> 
> *** gas/ChangeLog ***
> 
> 2019-04-04  Sudakshina Das  <sudi.das@arm.com>
> 
>      * config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR
>      for the LR operand and optional LR operand.
>      (parse_operands): Add switch cases for OP_LR and OP_oLR for
>      both type checking and value checking.
>      (encode_thumb32_addr_mode): New entries for DLS, WLS and LE.
>      (v8_1_loop_reloc): New helper function for handling labels
>      for the low overhead loop instructions.
>      (do_t_loloop): New function to encode DLS, WLS and LE.
>      (insns): New entries for WLS, DLS and LE.
>      (md_pcrel_from_section): New switch case
>      for BFD_RELOC_ARM_THUMB_LOOP12.
>      (md_appdy_fix): Likewise.
>      (tc_gen_reloc): Likewise.
>      * testsuite/gas/arm/armv8_1-m-tloop.s: New.
>      * testsuite/gas/arm/armv8_1-m-tloop.d: New.
>      * testsuite/gas/arm/armv8_1-m-tloop-bad.s: New.
>      * testsuite/gas/arm/armv8_1-m-tloop-bad.d: New.
>      * testsuite/gas/arm/armv8_1-m-tloop-bad.l: New.
> 
> *** opcodes/ChangeLog ***
> 
> 2019-04-04  Sudakshina Das  <sudi.das@arm.com>
> 
>      * arm-dis.c (print_insn_thumb32): Updated to accept new %P
>      and %Q patterns.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 12.patch
Type: text/x-patch
Size: 13162 bytes
Desc: not available
URL: <https://sourceware.org/pipermail/binutils/attachments/20190412/5a0d426d/attachment.bin>


More information about the Binutils mailing list