[PATCH, binutils, ARM, 13/16] Add support for CLRM

[Andre Vieira (lists)]

Hi,

=== Context ===

This patch is part of a patch series to add support for Armv8.1-M
Mainline architecture. Its purpose is to add support for the new CLRM
instruction.

=== Patch description ===

Given the similarity between LDM/STM and CLRM register lists, most of
the changes in this patch aim at sharing code between those two sets of
instruction. Sharing is achieved both in parsing and encoding of those
instructions.

In terms of parsing, parse_reg_list () is extended to take a type that
describe what type of instruction is being parsed. The reg_list_els used
for parse_vfp_reg_list () is reused for the type and that function is
added an assert for the new REGLIST_CLRM and REGLIST_RN enumerators.
parse_reg_list () is then taught to accept APSR and reject SP and PC
when parsing for a CLRM instruction. At last, caller of
parse_reg_list () is updated accordingly and logic is added for the new
OP_CLRMLST operand.

Encoding-wise, encode_thumb2_ldmstm () is reused to encode the variable
bits of CLRM and is thus renamed encode_thumb2_multi (). A new do_io
parameter is added to distinguish between LDM/STM and CLRM which guard
all the LDM/STM specific code of the function.

Finally objdump is told how to disassemble CLRM, again reusing the logic
to print the LDM/STM register list (format specifier 'm'). Tests are
also added in the form of negative tests to check parsing and
encoding/disassembling tests.

ChangeLog entries are as follows:

*** gas/ChangeLog ***

2019-04-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* config/tc-arm.c (enum reg_list_els): Define earlier and add
	REGLIST_RN and REGLIST_CLRM enumerators.
	(parse_reg_list): Add etype parameter to distinguish between regular
	core register list and CLRM register list.  Add logic to
	recognize CLRM register list.
	(parse_vfp_reg_list): Assert type is not for core register list.
	(s_arm_unwind_save_core): Update call to parse_reg_list to new
	prototype.
	(enum operand_parse_code): Declare OP_CLRMLST enumerator.
	(parse_operands): Update call to parse_reg_list to new prototype.  Add
	logic for OP_CLRMLST.
	(encode_thumb2_ldmstm): Rename into ...
	(encode_thumb2_multi): This.  Add do_io parameter.  Add logic to
	encode CLRM and guard LDM/STM only code by do_io.
	(do_t_ldmstm): Adapt to use encode_thumb2_multi.
	(do_t_push_pop): Likewise.
	(do_t_clrm): New function.
	(insns): Define CLRM.
	* testsuite/gas/arm/archv8m_1m-cmse-main-bad.d: New file.
	* testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Likewise.
	* testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Likewise.
	* testsuite/gas/arm/archv8m_1m-cmse-main.d: Likewise.
	* testsuite/gas/arm/archv8m_1m-cmse-main.s: Likewise.

*** opcodes/ChangeLog ***

2019-04-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (thumb_opcodes): Document %n control code.  Add entry for
	CLRM.
	(print_insn_thumb32): Add logic to print %n CLRM register list.
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