[GAS][ARM][2/3]Add SE_H shape to represent fp16 type.

[Renlin Li]

Hi all,

This patch makes generic change to add a new neon shape SE_H to 
represent VFP single
precision register operand whose type specifier is .f16, .16, u16, s16.

This will facilitate further patch to add ARMv8.2 fp16 instruction 
support into GAS.

for example, after the change, the new instruction share for the 
following instruction is changed:

          vcvtt.f16.f64  s0, d0:         NS_HD, instead of NS_FD
          vcvtt.f64.f16  d0, s0:         NS_DH, instead of NS_DF
          vcvtb s2.f16, s5.f32:          NS_HF, instead of NS_FF
          vcvtb.f16.f32 s2, s5:          NS_HF, instead of NS_FF


The logic here is that:

for a VFP single precision register operand:
(inst.operands[j].isreg && inst.operands[j].isvec && 
inst.operands[j].issingle && !inst.operands[j].isquad),
the following cases are considered:

Only one type specifier as the following, this applies to all single 
precision register operand.
mnemonic.type reg1, reg2, reg3

For this illegal case, type1 is ignored. The error should be caught by 
existing code. type and type1 cannot
specified at the same time.

mnemonic.type reg1.type1, reg2, reg3

Type specifier given as the following. Inside gas, it allows some 
"flexibility". It allows the following situations
if the key operands has type specifier. It will try to infer the others 
from the key operand.
However, I don't think those cases are encouraged. The type specifier 
applies to associated register operand.
Other operands shape is derived from register class.

mnemonic reg1.type1, reg2.type2, reg3
mnemonic reg1.type1, reg2, reg3

Multiple type specifier (each register have one). Decided by related 
type specifier associated with the register operand.
mnemonic.type1.type2 reg1, reg2
mnemonic reg1.type1, reg2.type2

Binutils checked without any issues. Okay to commit?

Regards,
Renlin Li



gas/ChangeLog:

2016-02-19  Renlin Li  <renlin.li@arm.com>

     * config/tc-arm.c (NEON_ENC_TAB): Add fp16 instruction shape.
     (neon_shape_class): New SC_HALF.
     (neon_shape_el): New SE_H.
     (neon_shape_el_size): New size for SE_H.
     (N_F_ALL): New macro to aggregate N_F16, N_F32, N_64.
     (neon_select_shape): Add SE_H support code.
     (el_type_of_type_chk): Use N_F_ALL.
     (do_vfp_nsyn_cvt): Add SE_H shape support.
     (do_neon_cvtz): Likewise.
     (do_neon_cvt_1): Likewise.
     (do_neon_cvttb_1): Likewise.
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