[OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2

[Renlin Li]

Hi all,

This is a patch to correct the dissembler for  cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

For cpd, cdp2, mcr, mrc, ldc, stc
when the co-processor number (bit 9-11) is 10 or 11, it should be a SIMD or floating point instruction.
In this case, it should be skipped, and search for another matching instruction.

For mcr2, mrc2, ldc2, stc2
when the coprocessor number (bit 9-11) is 10 or 11, it's undefined.

A new variable cp_num is declared and used here to represent co-processor number in
current instruction if applicable.

Binutils, gas, ld checked Okay without any new issues. Okay to commit?

opcodes/ChangeLog:

2016-02-18  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	* testsuite/gas/arm/copro.s: Update.
	* testsuite/gas/arm/copro.d: Update.

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