[PATCH 2/3] [aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insn

[Yao Qi]

On 02/10/15 13:35, Marcus Shawcroft wrote:
> The usual layout would be:
> 
> extern int
> aarch64_decode_insn (....

Sigh, I must be misled by aarch64_zero_register_p above...

> 
> OK with that change.

Patch below is what I pushed in.  Thanks for the review.

-- 
Yao (齐尧)

include/opcode:

2015-10-02  Yao Qi  <yao.qi@linaro.org>

	* aarch64.h (aarch64_decode_insn): Declare it.

opcodes:

2015-10-02  Yao Qi  <yao.qi@linaro.org>

	* aarch64-dis.c	(disas_aarch64_insn): Remove static.  Change
	argument insn type to aarch64_insn.  Rename to ...
	(aarch64_decode_insn): ... it.
	(print_insn_aarch64_word): Caller updated.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index aa5ea1c..a93d964 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2015-10-02  Yao Qi  <yao.qi@linaro.org>
+
+	* aarch64.h (aarch64_decode_insn): Declare it.
+
 2015-09-29  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 
 	* s390.h (S390_INSTR_FLAG_HTM): New flag.
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index dcf0fef..ac4da28 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -925,6 +925,9 @@ aarch64_stack_pointer_p (const aarch64_opnd_info *);
 extern
 int aarch64_zero_register_p (const aarch64_opnd_info *);
 
+extern int
+aarch64_decode_insn (aarch64_insn, aarch64_inst *);
+
 /* Given an operand qualifier, return the expected data element size
    of a qualified operand.  */
 extern unsigned char
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 051c42b..124ead7 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,12 @@
 2015-10-02  Yao Qi  <yao.qi@linaro.org>
 
+	* aarch64-dis.c	(disas_aarch64_insn): Remove static.  Change
+	argument insn type to aarch64_insn.  Rename to ...
+	(aarch64_decode_insn): ... it.
+	(print_insn_aarch64_word): Caller updated.
+
+2015-10-02  Yao Qi  <yao.qi@linaro.org>
+
 	* aarch64-dis.c (disas_aarch64_insn): Remove argument PC.
 	(print_insn_aarch64_word): Caller updated.
 
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index e0faeb5..fe3caac 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -2029,10 +2029,11 @@ user_friendly_fixup (aarch64_inst *inst)
     }
 }
 
-/* Decode INSN and fill in *INST the instruction information.  */
+/* Decode INSN and fill in *INST the instruction information.  Return zero
+   on success.  */
 
-static int
-disas_aarch64_insn (uint32_t insn, aarch64_inst *inst)
+int
+aarch64_decode_insn (aarch64_insn insn, aarch64_inst *inst)
 {
   const aarch64_opcode *opcode = aarch64_opcode_lookup (insn);
 
@@ -2171,7 +2172,7 @@ print_insn_aarch64_word (bfd_vma pc,
        addresses, since the addend is not currently pc-relative.  */
     pc = 0;
 
-  ret = disas_aarch64_insn (word, &inst);
+  ret = aarch64_decode_insn (word, &inst);
 
   if (((word >> 21) & 0x3ff) == 1)
     {