[PATCH 11/14] or1k gas changes
Christian Svensson
blue@cmd.nu
Tue Mar 11 11:54:00 GMT 2014
This patch adds gas code for or1k targets.
---
gas/Makefile.am | 2 +
gas/Makefile.in | 15 +
gas/config/tc-or1k.c | 364 +++++++++++++++
gas/config/tc-or1k.h | 80 ++++
gas/configure | 4 +-
gas/configure.in | 4 +-
gas/configure.tgt | 5 +-
gas/doc/as.texinfo | 2 +-
gas/testsuite/gas/elf/warn-2.s | 5 +
gas/testsuite/gas/lns/lns-common-1-or1k.s | 25 ++
gas/testsuite/gas/lns/lns.exp | 2 +
gas/testsuite/gas/or1k/allinsn.d | 689 +++++++++++++++++++++++++++++
gas/testsuite/gas/or1k/allinsn.exp | 5 +
gas/testsuite/gas/or1k/allinsn.s | 677 ++++++++++++++++++++++++++++
14 files changed, 1875 insertions(+), 4 deletions(-)
create mode 100644 gas/config/tc-or1k.c
create mode 100644 gas/config/tc-or1k.h
create mode 100644 gas/testsuite/gas/lns/lns-common-1-or1k.s
create mode 100644 gas/testsuite/gas/or1k/allinsn.d
create mode 100644 gas/testsuite/gas/or1k/allinsn.exp
create mode 100644 gas/testsuite/gas/or1k/allinsn.s
diff --git a/gas/Makefile.am b/gas/Makefile.am
index e5bafb3..01731b9 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -167,6 +167,7 @@ TARGET_CPU_CFILES = \
config/tc-nds32.c \
config/tc-nios2.c \
config/tc-ns32k.c \
+ config/tc-or1k.c \
config/tc-pdp11.c \
config/tc-pj.c \
config/tc-ppc.c \
@@ -237,6 +238,7 @@ TARGET_CPU_HFILES = \
config/tc-nds32.h \
config/tc-nios2.h \
config/tc-ns32k.h \
+ config/tc-or1k.h \
config/tc-pdp11.h \
config/tc-pj.h \
config/tc-ppc.h \
diff --git a/gas/Makefile.in b/gas/Makefile.in
index 73bb0cb..5650091 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -436,6 +436,7 @@ TARGET_CPU_CFILES = \
config/tc-nds32.c \
config/tc-nios2.c \
config/tc-ns32k.c \
+ config/tc-or1k.c \
config/tc-pdp11.c \
config/tc-pj.c \
config/tc-ppc.c \
@@ -506,6 +507,7 @@ TARGET_CPU_HFILES = \
config/tc-nds32.h \
config/tc-nios2.h \
config/tc-ns32k.h \
+ config/tc-or1k.h \
config/tc-pdp11.h \
config/tc-pj.h \
config/tc-ppc.h \
@@ -855,6 +857,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-nds32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-nios2.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ns32k.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-or1k.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-pdp11.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-pj.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ppc.Po@am__quote@
@@ -1507,7 +1510,19 @@ tc-ns32k.obj: config/tc-ns32k.c
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-ns32k.obj `if test -f 'config/tc-ns32k.c'; then $(CYGPATH_W) 'config/tc-ns32k.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-ns32k.c'; fi`
+tc-or1k.o: config/tc-or1k.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-or1k.o -MD -MP -MF $(DEPDIR)/tc-or1k.Tpo -c -o tc-or1k.o `test -f 'config/tc-or1k.c' || echo '$(srcdir)/'`config/tc-or1k.c
+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-or1k.Tpo $(DEPDIR)/tc-or1k.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-or1k.c' object='tc-or1k.o' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-or1k.o `test -f 'config/tc-or1k.c' || echo '$(srcdir)/'`config/tc-or1k.c
+
+tc-or1k.obj: config/tc-or1k.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-or1k.obj -MD -MP -MF $(DEPDIR)/tc-or1k.Tpo -c -o tc-or1k.obj `if test -f 'config/tc-or1k.c'; then $(CYGPATH_W) 'config/tc-or1k.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-or1k.c'; fi`
+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-or1k.Tpo $(DEPDIR)/tc-or1k.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-or1k.c' object='tc-or1k.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-or1k.obj `if test -f 'config/tc-or1k.c'; then $(CYGPATH_W) 'config/tc-or1k.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-or1k.c'; fi`
tc-pdp11.o: config/tc-pdp11.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-pdp11.o -MD -MP -MF $(DEPDIR)/tc-pdp11.Tpo -c -o tc-pdp11.o `test -f 'config/tc-pdp11.c' || echo '$(srcdir)/'`config/tc-pdp11.c
diff --git a/gas/config/tc-or1k.c b/gas/config/tc-or1k.c
new file mode 100644
index 0000000..d1d326a
--- /dev/null
+++ b/gas/config/tc-or1k.c
@@ -0,0 +1,364 @@
+/* tc-or1k.c -- Assembler for the OpenRISC family.
+ Copyright 2001-2003, 2005-2007, 2009, 2012-2014
+ Free Software Foundation.
+ Contributed for OR32 by Johan Rydberg, jrydberg@opencores.org
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see <http://www.gnu.org/licenses/> */
+#include "as.h"
+#include "safe-ctype.h"
+#include "subsegs.h"
+#include "symcat.h"
+#include "opcodes/or1k-desc.h"
+#include "opcodes/or1k-opc.h"
+#include "cgen.h"
+#include "elf/or1k.h"
+#include "dw2gencfi.h"
+
+/* Structure to hold all of the different components describing
+ an individual instruction. */
+//typedef struct or1k_insn or1k_insn;
+
+typedef struct// or1k_insn
+{
+ const CGEN_INSN * insn;
+ const CGEN_INSN * orig_insn;
+ CGEN_FIELDS fields;
+#if CGEN_INT_INSN_P
+ CGEN_INSN_INT buffer [1];
+#define INSN_VALUE(buf) (*(buf))
+#else
+ unsigned char buffer [CGEN_MAX_INSN_SIZE];
+#define INSN_VALUE(buf) (buf)
+#endif
+ char * addr;
+ fragS * frag;
+ int num_fixups;
+ fixS * fixups [GAS_CGEN_MAX_FIXUPS];
+ int indices [MAX_OPERAND_INSTANCES];
+}
+or1k_insn;
+
+const char comment_chars[] = "#";
+const char line_comment_chars[] = "#";
+const char line_separator_chars[] = ";";
+const char EXP_CHARS[] = "eE";
+const char FLT_CHARS[] = "dD";
+
+#define OR1K_SHORTOPTS "m:"
+const char * md_shortopts = OR1K_SHORTOPTS;
+
+struct option md_longopts[] =
+{
+ {NULL, no_argument, NULL, 0}
+};
+size_t md_longopts_size = sizeof (md_longopts);
+
+unsigned long or1k_machine = 0; /* default */
+
+int
+md_parse_option (int c ATTRIBUTE_UNUSED, char * arg ATTRIBUTE_UNUSED)
+{
+ return 0;
+}
+
+void
+md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+{
+}
+
+static void
+ignore_pseudo (int val ATTRIBUTE_UNUSED)
+{
+ discard_rest_of_line ();
+}
+
+static bfd_boolean nodelay = FALSE;
+static void
+s_nodelay (int val ATTRIBUTE_UNUSED)
+{
+ nodelay = TRUE;
+}
+
+const char or1k_comment_chars [] = ";#";
+
+/* The target specific pseudo-ops which we support. */
+const pseudo_typeS md_pseudo_table[] =
+{
+ { "align", s_align_bytes, 0 },
+ { "word", cons, 4 },
+ { "proc", ignore_pseudo, 0 },
+ { "endproc", ignore_pseudo, 0 },
+ { "nodelay", s_nodelay, 0 },
+ { NULL, NULL, 0 }
+};
+
+
+void
+md_begin (void)
+{
+ /* Initialize the `cgen' interface. */
+
+ /* Set the machine number and endian. */
+ gas_cgen_cpu_desc = or1k_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
+ CGEN_CPU_OPEN_ENDIAN,
+ CGEN_ENDIAN_BIG,
+ CGEN_CPU_OPEN_END);
+ or1k_cgen_init_asm (gas_cgen_cpu_desc);
+
+ /* This is a callback from cgen to gas to parse operands. */
+ cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
+}
+
+void
+md_assemble (char * str)
+{
+ static int last_insn_had_delay_slot = 0;
+ or1k_insn insn;
+ char * errmsg;
+
+ /* Initialize GAS's cgen interface for a new instruction. */
+ gas_cgen_init_parse ();
+
+ insn.insn = or1k_cgen_assemble_insn
+ (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
+
+ if (!insn.insn)
+ {
+ as_bad ("%s", errmsg);
+ return;
+ }
+
+ /* Doesn't really matter what we pass for RELAX_P here. */
+ gas_cgen_finish_insn (insn.insn, insn.buffer,
+ CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
+
+ last_insn_had_delay_slot
+ = CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
+ (void) last_insn_had_delay_slot;
+}
+
+
+/* The syntax in the manual says constants begin with '#'.
+ We just ignore it. */
+
+void
+md_operand (expressionS * expressionP)
+{
+ if (* input_line_pointer == '#')
+ {
+ input_line_pointer ++;
+ expression (expressionP);
+ }
+}
+
+valueT
+md_section_align (segT segment, valueT size)
+{
+ int align = bfd_get_section_alignment (stdoutput, segment);
+ return ((size + (1 << align) - 1) & (-1 << align));
+}
+
+symbolS *
+md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
+{
+ return 0;
+}
+
+
+/* Interface to relax_segment. */
+
+const relax_typeS md_relax_table[] =
+{
+/* The fields are:
+ 1) most positive reach of this state,
+ 2) most negative reach of this state,
+ 3) how many bytes this mode will add to the size of the current frag
+ 4) which index into the table to try if we can't fit into this one. */
+
+ /* The first entry must be unused because an `rlx_more' value of zero ends
+ each list. */
+ {1, 1, 0, 0},
+
+ /* The displacement used by GAS is from the end of the 4 byte insn,
+ so we subtract 4 from the following. */
+ {(((1 << 25) - 1) << 2) - 4, -(1 << 25) - 4, 0, 0},
+};
+
+int
+md_estimate_size_before_relax (fragS * fragP, segT segment ATTRIBUTE_UNUSED)
+{
+ return md_relax_table[fragP->fr_subtype].rlx_length;
+}
+
+/* *fragP has been relaxed to its final size, and now needs to have
+ the bytes inside it modified to conform to the new size.
+
+ Called after relaxation is finished.
+ fragP->fr_type == rs_machine_dependent.
+ fragP->fr_subtype is the subtype of what the address relaxed to. */
+
+void
+md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+ segT sec ATTRIBUTE_UNUSED,
+ fragS * fragP ATTRIBUTE_UNUSED)
+{
+ /* FIXME */
+}
+
+
+/* Functions concerning relocs. */
+
+/* The location from which a PC relative jump should be calculated,
+ given a PC relative reloc. */
+
+long
+md_pcrel_from_section (fixS * fixP, segT sec)
+{
+ if (fixP->fx_addsy != (symbolS *) NULL
+ && (! S_IS_DEFINED (fixP->fx_addsy)
+ || (S_GET_SEGMENT (fixP->fx_addsy) != sec)
+ || S_IS_EXTERNAL (fixP->fx_addsy)
+ || S_IS_WEAK (fixP->fx_addsy)))
+ {
+ /* The symbol is undefined (or is defined but not in this section).
+ Let the linker figure it out. */
+ return 0;
+ }
+
+ return fixP->fx_frag->fr_address + fixP->fx_where;
+}
+
+
+/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
+ Returns BFD_RELOC_NONE if no reloc type can be found.
+ *FIXP may be modified if desired. */
+
+bfd_reloc_code_real_type
+md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
+ const CGEN_OPERAND * operand,
+ fixS * fixP)
+{
+ if (fixP->fx_cgen.opinfo) {
+ return fixP->fx_cgen.opinfo;
+ } else {
+ switch (operand->type)
+ {
+ case OR1K_OPERAND_DISP26:
+ fixP->fx_pcrel = 1;
+ return BFD_RELOC_OR1K_REL_26;
+
+ default: /* avoid -Wall warning */
+ return BFD_RELOC_NONE;
+ }
+ }
+}
+
+/* Write a value out to the object file, using the appropriate endianness. */
+
+void
+md_number_to_chars (char * buf, valueT val, int n)
+{
+ number_to_chars_bigendian (buf, val, n);
+}
+
+/* Turn a string in input_line_pointer into a floating point constant of type
+ type, and store the appropriate bytes in *litP. The number of LITTLENUMS
+ emitted is stored in *sizeP . An error message is returned, or NULL on OK.
+*/
+
+/* Equal to MAX_PRECISION in atof-ieee.c */
+#define MAX_LITTLENUMS 6
+
+char *
+md_atof (int type, char * litP, int * sizeP)
+{
+ return ieee_md_atof (type, litP, sizeP, TRUE);
+}
+
+bfd_boolean
+or1k_fix_adjustable (fixS * fixP)
+{
+ /* We need the symbol name for the VTABLE entries. */
+ if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
+ return 0;
+
+ return 1;
+}
+
+#define GOT_NAME "_GLOBAL_OFFSET_TABLE_"
+
+arelent *
+tc_gen_reloc (asection *sec, fixS *fx)
+{
+ bfd_reloc_code_real_type code = fx->fx_r_type;
+
+ if (fx->fx_addsy != NULL
+ && strcmp (S_GET_NAME (fx->fx_addsy), GOT_NAME) == 0
+ && (code == BFD_RELOC_OR1K_GOTPC_HI16
+ || code == BFD_RELOC_OR1K_GOTPC_LO16))
+ {
+ arelent * reloc;
+
+ reloc = xmalloc (sizeof (* reloc));
+ reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fx->fx_addsy);
+ reloc->address = fx->fx_frag->fr_address + fx->fx_where;
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fx->fx_r_type);
+ reloc->addend = fx->fx_offset;
+ return reloc;
+ }
+
+ return gas_cgen_tc_gen_reloc (sec, fx);
+}
+
+void
+or1k_apply_fix (struct fix *f, valueT *t, segT s)
+{
+ gas_cgen_md_apply_fix (f, t, s);
+ switch(f->fx_r_type)
+ {
+ case BFD_RELOC_OR1K_TLS_GD_HI16:
+ case BFD_RELOC_OR1K_TLS_GD_LO16:
+ case BFD_RELOC_OR1K_TLS_LDM_HI16:
+ case BFD_RELOC_OR1K_TLS_LDM_LO16:
+ case BFD_RELOC_OR1K_TLS_LDO_HI16:
+ case BFD_RELOC_OR1K_TLS_LDO_LO16:
+ case BFD_RELOC_OR1K_TLS_IE_HI16:
+ case BFD_RELOC_OR1K_TLS_IE_LO16:
+ case BFD_RELOC_OR1K_TLS_LE_HI16:
+ case BFD_RELOC_OR1K_TLS_LE_LO16:
+ S_SET_THREAD_LOCAL (f->fx_addsy);
+ break;
+ default:
+ break;
+ }
+}
+
+void
+or1k_elf_final_processing (void)
+{
+ if (nodelay)
+ elf_elfheader (stdoutput)->e_flags |= EF_OR1K_NODELAY;
+}
+
+/* Standard calling conventions leave the CFA at SP on entry. */
+void
+or1k_cfi_frame_initial_instructions (void)
+{
+ cfi_add_CFA_def_cfa_register (1);
+}
+
diff --git a/gas/config/tc-or1k.h b/gas/config/tc-or1k.h
new file mode 100644
index 0000000..9827800
--- /dev/null
+++ b/gas/config/tc-or1k.h
@@ -0,0 +1,80 @@
+/* tc-or1k.h -- Header file for tc-or1k.c.
+ Copyright 2001-2003, 2005, 2007, 2012-2014
+ Free Software Foundation, Inc.
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see <http://www.gnu.org/licenses/> */
+
+#define TC_OR1K
+
+#define LISTING_HEADER "Or1k GAS "
+
+/* The target BFD architecture. */
+#define TARGET_ARCH bfd_arch_or1k
+
+extern unsigned long or1k_machine;
+#define TARGET_MACH (or1k_machine)
+
+#define TARGET_FORMAT "elf32-or1k"
+#define TARGET_BYTES_BIG_ENDIAN 1
+
+extern const char or1k_comment_chars [];
+#define tc_comment_chars or1k_comment_chars
+
+/* Permit temporary numeric labels. */
+#define LOCAL_LABELS_FB 1
+
+#define DIFF_EXPR_OK 1 /* .-foo gets turned into PC relative relocs */
+
+/* We don't need to handle .word strangely. */
+#define WORKING_DOT_WORD
+
+/* Values passed to md_apply_fix don't include the symbol value. */
+#define MD_APPLY_SYM_VALUE(FIX) 0
+
+#define md_apply_fix or1k_apply_fix
+extern void or1k_apply_fix (struct fix *, valueT *, segT);
+
+extern bfd_boolean or1k_fix_adjustable (struct fix *);
+#define tc_fix_adjustable(FIX) or1k_fix_adjustable (FIX)
+
+/* Call md_pcrel_from_section(), not md_pcrel_from(). */
+extern long md_pcrel_from_section (struct fix *, segT);
+#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
+
+/* For 8 vs 16 vs 32 bit branch selection. */
+extern const struct relax_type md_relax_table[];
+#define TC_GENERIC_RELAX_TABLE md_relax_table
+
+#define GAS_CGEN_PCREL_R_TYPE(r_type) gas_cgen_pcrel_r_type(r_type)
+
+#define elf_tc_final_processing or1k_elf_final_processing
+void or1k_elf_final_processing (void);
+
+/* Enable cfi directives. */
+#define TARGET_USE_CFIPOP 1
+
+/* Stack grows to lower addresses and wants 4 byte boundary */
+#define DWARF2_CIE_DATA_ALIGNMENT -4
+
+/* Define the column that represents the PC. */
+#define DWARF2_DEFAULT_RETURN_COLUMN 9
+
+/* or1k instructions are 4 bytes long. */
+#define DWARF2_LINE_MIN_INSN_LENGTH 4
+
+#define tc_cfi_frame_initial_instructions \
+ or1k_cfi_frame_initial_instructions
+extern void or1k_cfi_frame_initial_instructions (void);
diff --git a/gas/configure b/gas/configure
index 501eba7..27b9d1d 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12150,7 +12150,7 @@ _ACEOF
fi
;;
- epiphany | fr30 | ip2k | iq2000 | lm32 | m32r)
+ epiphany | fr30 | ip2k | iq2000 | lm32 | m32r | or1k)
using_cgen=yes
;;
@@ -12426,6 +12426,8 @@ esac
cgen_cpu_prefix=""
if test $using_cgen = yes ; then
case ${target_cpu} in
+ or1knd)
+ cgen_cpu_prefix=or1k ;;
*) cgen_cpu_prefix=${target_cpu} ;;
esac
diff --git a/gas/configure.in b/gas/configure.in
index d56740c..33cd50b 100644
--- a/gas/configure.in
+++ b/gas/configure.in
@@ -321,7 +321,7 @@ changequote([,])dnl
fi
;;
- epiphany | fr30 | ip2k | iq2000 | lm32 | m32r)
+ epiphany | fr30 | ip2k | iq2000 | lm32 | m32r | or1k)
using_cgen=yes
;;
@@ -568,6 +568,8 @@ esac
cgen_cpu_prefix=""
if test $using_cgen = yes ; then
case ${target_cpu} in
+ or1knd)
+ cgen_cpu_prefix=or1k ;;
*) cgen_cpu_prefix=${target_cpu} ;;
esac
AC_SUBST(cgen_cpu_prefix)
diff --git a/gas/configure.tgt b/gas/configure.tgt
index 346bb4c..7d5afa9 100644
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -81,6 +81,7 @@ case ${cpu} in
mt) cpu_type=mt endian=big ;;
nds32be) cpu_type=nds32 endian=big ;;
nds32le) cpu_type=nds32 endian=little ;;
+ or1k* | or1knd*) cpu_type=or1k endian=big ;;
pjl*) cpu_type=pj endian=little ;;
pj*) cpu_type=pj endian=big ;;
powerpc*le*) cpu_type=ppc endian=little ;;
@@ -356,6 +357,8 @@ case ${generic_target} in
ns32k-pc532-lites*) fmt=aout em=nbsd532 ;;
ns32k-*-*n*bsd*) fmt=aout em=nbsd532 ;;
+ or1k-*-elf | or1knd-*-elf) fmt=elf endian=big ;;
+ or1k-*-linux* | or1knd-*-linux*) fmt=elf em=linux endian=big ;;
pj*) fmt=elf ;;
@@ -469,7 +472,7 @@ case ${generic_target} in
esac
case ${cpu_type} in
- aarch64 | alpha | arm | i386 | ia64 | microblaze | mips | ns32k | pdp11 | ppc | sparc | z80 | z8k)
+ aarch64 | alpha | arm | i386 | ia64 | microblaze | mips | ns32k | or1k | or1knd | pdp11 | ppc | sparc | z80 | z8k)
bfd_gas=yes
;;
esac
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 9cdccae..06108df 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -4347,7 +4347,7 @@ required alignment; this can be useful if you want the alignment to be filled
with no-op instructions when appropriate.
The way the required alignment is specified varies from system to system.
-For the arc, hppa, i386 using ELF, i860, iq2000, m68k,
+For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or1k,
s390, sparc, tic4x, tic80 and xtensa, the first expression is the
alignment request in bytes. For example @samp{.align 8} advances
the location counter until it is a multiple of 8. If the location counter
diff --git a/gas/testsuite/gas/elf/warn-2.s b/gas/testsuite/gas/elf/warn-2.s
index be4f243..9800cd4 100644
--- a/gas/testsuite/gas/elf/warn-2.s
+++ b/gas/testsuite/gas/elf/warn-2.s
@@ -1,6 +1,7 @@
;# { dg-do assemble }
;# { dg-options "--gdwarf2 --defsym nop_type=0" }
;# { dg-options "--gdwarf2 --defsym nop_type=1" { target ia64-*-* } }
+;# { dg-options "--gdwarf2 --defsym nop_type=2" { target or1k*-*-* } }
;# { dg-options "--gdwarf2 --defsym nop_type=3" { target i370-*-* } }
.offset 40
@@ -8,11 +9,15 @@
.ifeq nop_type - 1
nop 0
.else
+ .ifeq nop_type - 2
+ l.nop 0
+ .else
.ifeq nop_type - 3
nopr 1
.else
nop
.endif
.endif
+ .endif
;# { dg-warning "Warning: dwarf line number information for .* ignored" "" { xfail i370-*-* mcore-*-* mn10200-*-* moxie-*-* v850*-*-* } 0 }
diff --git a/gas/testsuite/gas/lns/lns-common-1-or1k.s b/gas/testsuite/gas/lns/lns-common-1-or1k.s
new file mode 100644
index 0000000..b91b681
--- /dev/null
+++ b/gas/testsuite/gas/lns/lns-common-1-or1k.s
@@ -0,0 +1,25 @@
+ .file 1 "foo.c"
+ .loc 1 1
+ l.nop
+ l.nop
+ .loc 1 2 3
+ l.nop
+ l.nop
+ .loc 1 3 prologue_end
+ l.nop
+ l.nop
+ .loc 1 4 0 epilogue_begin
+ l.nop
+ l.nop
+ .loc 1 5 isa 1 basic_block
+ l.nop
+ l.nop
+ .loc 1 6 is_stmt 0
+ l.nop
+ l.nop
+ .loc 1 7 is_stmt 1
+ l.nop
+ l.nop
+ .loc 1 7 discriminator 1
+ l.nop
+ l.nop
diff --git a/gas/testsuite/gas/lns/lns.exp b/gas/testsuite/gas/lns/lns.exp
index eea5311..7dbd10e 100644
--- a/gas/testsuite/gas/lns/lns.exp
+++ b/gas/testsuite/gas/lns/lns.exp
@@ -43,6 +43,8 @@ if {
run_dump_test "lns-big-delta"
} elseif { [istarget ia64*-*-*] } {
run_dump_test "lns-common-1" { { source "lns-common-1-ia64.s" } }
+ } elseif { [istarget or1k*-*-*] } {
+ run_dump_test "lns-common-1" { { source "lns-common-1-or1k.s" } }
} else {
run_dump_test "lns-common-1"
}
diff --git a/gas/testsuite/gas/or1k/allinsn.d b/gas/testsuite/gas/or1k/allinsn.d
new file mode 100644
index 0000000..27884fe
--- /dev/null
+++ b/gas/testsuite/gas/or1k/allinsn.d
@@ -0,0 +1,689 @@
+#as:
+#objdump: -dr
+#name: allinsn
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <localtext>:
+ 0: 15 00 00 00 l\.nop 0x0
+
+00000004 <globaltext>:
+ 4: 15 00 00 00 l\.nop 0x0
+
+00000008 <l_j>:
+ 8: 03 ff ff ff l\.j 4 <globaltext>
+ c: 00 00 00 01 l\.j 10 <l_j\+0x8>
+ 10: 00 00 00 00 l\.j 10 <l_j\+0x8>
+ 14: 03 ff ff fb l\.j 0 <localtext>
+ \.\.\.
+ 18: R_OR1K_INSN_REL_26 \.data
+ 1c: R_OR1K_INSN_REL_26 globaltext
+ 20: R_OR1K_INSN_REL_26 globaldata
+ 24: 03 ff ff f9 l\.j 8 <l_j>
+ 28: 00 00 00 01 l\.j 2c <l_jal>
+
+0000002c <l_jal>:
+ 2c: 07 ff ff ff l\.jal 28 <l_j\+0x20>
+ 30: 04 00 00 01 l\.jal 34 <l_jal\+0x8>
+ 34: 04 00 00 00 l\.jal 34 <l_jal\+0x8>
+ 38: 07 ff ff f2 l\.jal 0 <localtext>
+ 3c: 04 00 00 00 l\.jal 3c <l_jal\+0x10>
+ 3c: R_OR1K_INSN_REL_26 \.data
+ 40: 04 00 00 00 l\.jal 40 <l_jal\+0x14>
+ 40: R_OR1K_INSN_REL_26 globaltext
+ 44: 04 00 00 00 l\.jal 44 <l_jal\+0x18>
+ 44: R_OR1K_INSN_REL_26 globaldata
+ 48: 07 ff ff f0 l\.jal 8 <l_j>
+ 4c: 07 ff ff f8 l\.jal 2c <l_jal>
+
+00000050 <l_jr>:
+ 50: 44 00 00 00 l\.jr r0
+ 54: 44 00 f8 00 l\.jr r31
+ 58: 44 00 80 00 l\.jr r16
+ 5c: 44 00 78 00 l\.jr r15
+ 60: 44 00 08 00 l\.jr r1
+ 64: 44 00 d8 00 l\.jr r27
+ 68: 44 00 70 00 l\.jr r14
+ 6c: 44 00 b0 00 l\.jr r22
+
+00000070 <l_jalr>:
+ 70: 48 00 00 00 l\.jalr r0
+ 74: 48 00 f8 00 l\.jalr r31
+ 78: 48 00 80 00 l\.jalr r16
+ 7c: 48 00 78 00 l\.jalr r15
+ 80: 48 00 08 00 l\.jalr r1
+ 84: 48 00 d8 00 l\.jalr r27
+ 88: 48 00 70 00 l\.jalr r14
+ 8c: 48 00 b0 00 l\.jalr r22
+
+00000090 <l_bnf>:
+ 90: 0f ff ff ff l\.bnf 8c <l_jalr\+0x1c>
+ 94: 0c 00 00 01 l\.bnf 98 <l_bnf\+0x8>
+ 98: 0c 00 00 00 l\.bnf 98 <l_bnf\+0x8>
+ 9c: 0f ff ff d9 l\.bnf 0 <localtext>
+ a0: 0c 00 00 00 l\.bnf a0 <l_bnf\+0x10>
+ a0: R_OR1K_INSN_REL_26 \.data
+ a4: 0c 00 00 00 l\.bnf a4 <l_bnf\+0x14>
+ a4: R_OR1K_INSN_REL_26 globaltext
+ a8: 0c 00 00 00 l\.bnf a8 <l_bnf\+0x18>
+ a8: R_OR1K_INSN_REL_26 globaldata
+ ac: 0f ff ff d7 l\.bnf 8 <l_j>
+ b0: 0f ff ff df l\.bnf 2c <l_jal>
+
+000000b4 <l_bf>:
+ b4: 13 ff ff ff l\.bf b0 <l_bnf\+0x20>
+ b8: 10 00 00 01 l\.bf bc <l_bf\+0x8>
+ bc: 10 00 00 00 l\.bf bc <l_bf\+0x8>
+ c0: 13 ff ff d0 l\.bf 0 <localtext>
+ c4: 10 00 00 00 l\.bf c4 <l_bf\+0x10>
+ c4: R_OR1K_INSN_REL_26 \.data
+ c8: 10 00 00 00 l\.bf c8 <l_bf\+0x14>
+ c8: R_OR1K_INSN_REL_26 globaltext
+ cc: 10 00 00 00 l\.bf cc <l_bf\+0x18>
+ cc: R_OR1K_INSN_REL_26 globaldata
+ d0: 13 ff ff ce l\.bf 8 <l_j>
+ d4: 13 ff ff d6 l\.bf 2c <l_jal>
+
+000000d8 <l_trap>:
+ d8: 21 00 00 00 l\.trap 0x0
+ dc: 21 00 ff ff l\.trap 0xffff
+ e0: 21 00 80 00 l\.trap 0x8000
+ e4: 21 00 7f ff l\.trap 0x7fff
+ e8: 21 00 00 01 l\.trap 0x1
+ ec: 21 00 d1 4f l\.trap 0xd14f
+ f0: 21 00 7f 7c l\.trap 0x7f7c
+ f4: 21 00 d2 4a l\.trap 0xd24a
+
+000000f8 <l_sys>:
+ f8: 20 00 00 00 l\.sys 0x0
+ fc: 20 00 ff ff l\.sys 0xffff
+ 100: 20 00 80 00 l\.sys 0x8000
+ 104: 20 00 7f ff l\.sys 0x7fff
+ 108: 20 00 00 01 l\.sys 0x1
+ 10c: 20 00 d2 85 l\.sys 0xd285
+ 110: 20 00 e3 15 l\.sys 0xe315
+ 114: 20 00 80 fa l\.sys 0x80fa
+
+00000118 <l_rfe>:
+ 118: 24 00 00 00 l\.rfe
+
+0000011c <l_nop>:
+ 11c: 15 00 00 00 l\.nop 0x0
+
+00000120 <l_movhi>:
+ 120: 18 00 00 00 l\.movhi r0,0x0
+ 124: 1b e0 ff ff l\.movhi r31,0xffff
+ 128: 1a 00 80 00 l\.movhi r16,0x8000
+ 12c: 19 e0 7f ff l\.movhi r15,0x7fff
+ 130: 18 20 00 01 l\.movhi r1,0x1
+ 134: 1b 80 81 ce l\.movhi r28,0x81ce
+ 138: 1a e0 e8 ac l\.movhi r23,0xe8ac
+ 13c: 1a 60 d8 c0 l\.movhi r19,0xd8c0
+
+00000140 <l_mfspr>:
+ 140: b4 00 00 00 l\.mfspr r0,r0,0x0
+ 144: b7 ff ff ff l\.mfspr r31,r31,0xffff
+ 148: b6 10 80 00 l\.mfspr r16,r16,0x8000
+ 14c: b5 ef 7f ff l\.mfspr r15,r15,0x7fff
+ 150: b4 21 00 01 l\.mfspr r1,r1,0x1
+ 154: b6 fd d4 98 l\.mfspr r23,r29,0xd498
+ 158: b6 74 11 81 l\.mfspr r19,r20,0x1181
+ 15c: b7 42 f7 d6 l\.mfspr r26,r2,0xf7d6
+
+00000160 <l_mtspr>:
+ 160: c0 00 00 00 l\.mtspr r0,r0,0x0
+ 164: c3 ff ff ff l\.mtspr r31,r31,0xffff
+ 168: c2 10 80 00 l\.mtspr r16,r16,0x8000
+ 16c: c1 ef 7f ff l\.mtspr r15,r15,0x7fff
+ 170: c0 01 08 01 l\.mtspr r1,r1,0x1
+ 174: c0 fe 33 77 l\.mtspr r30,r6,0x3b77
+ 178: c2 a9 3c cc l\.mtspr r9,r7,0xaccc
+ 17c: c3 f9 3d 7b l\.mtspr r25,r7,0xfd7b
+
+00000180 <l_lwz>:
+ 180: 84 00 00 00 l\.lwz r0,0\(r0\)
+ 184: 87 ff ff ff l\.lwz r31,-1\(r31\)
+ 188: 86 10 80 00 l\.lwz r16,-32768\(r16\)
+ 18c: 85 ef 7f ff l\.lwz r15,32767\(r15\)
+ 190: 84 21 00 01 l\.lwz r1,1\(r1\)
+ 194: 85 f9 0b 75 l\.lwz r15,2933\(r25\)
+ 198: 86 35 fc e1 l\.lwz r17,-799\(r21\)
+ 19c: 84 12 bb 45 l\.lwz r0,-17595\(r18\)
+
+000001a0 <l_lws>:
+ 1a0: 88 00 00 00 l\.lws r0,0\(r0\)
+ 1a4: 8b ff ff ff l\.lws r31,-1\(r31\)
+ 1a8: 8a 10 80 00 l\.lws r16,-32768\(r16\)
+ 1ac: 89 ef 7f ff l\.lws r15,32767\(r15\)
+ 1b0: 88 21 00 01 l\.lws r1,1\(r1\)
+ 1b4: 88 35 bb 3a l\.lws r1,-17606\(r21\)
+ 1b8: 89 df 69 0b l\.lws r14,26891\(r31\)
+ 1bc: 89 00 6b a0 l\.lws r8,27552\(r0\)
+
+000001c0 <l_lbz>:
+ 1c0: 8c 00 00 00 l\.lbz r0,0\(r0\)
+ 1c4: 8f ff ff ff l\.lbz r31,-1\(r31\)
+ 1c8: 8e 10 80 00 l\.lbz r16,-32768\(r16\)
+ 1cc: 8d ef 7f ff l\.lbz r15,32767\(r15\)
+ 1d0: 8c 21 00 01 l\.lbz r1,1\(r1\)
+ 1d4: 8e 74 64 23 l\.lbz r19,25635\(r20\)
+ 1d8: 8d e9 f2 a8 l\.lbz r15,-3416\(r9\)
+ 1dc: 8c 61 45 54 l\.lbz r3,17748\(r1\)
+
+000001e0 <l_lbs>:
+ 1e0: 90 00 00 00 l\.lbs r0,0\(r0\)
+ 1e4: 93 ff ff ff l\.lbs r31,-1\(r31\)
+ 1e8: 92 10 80 00 l\.lbs r16,-32768\(r16\)
+ 1ec: 91 ef 7f ff l\.lbs r15,32767\(r15\)
+ 1f0: 90 21 00 01 l\.lbs r1,1\(r1\)
+ 1f4: 93 48 44 c6 l\.lbs r26,17606\(r8\)
+ 1f8: 92 d0 86 a0 l\.lbs r22,-31072\(r16\)
+ 1fc: 90 c9 44 20 l\.lbs r6,17440\(r9\)
+
+00000200 <l_lhz>:
+ 200: 94 00 00 00 l\.lhz r0,0\(r0\)
+ 204: 97 ff ff ff l\.lhz r31,-1\(r31\)
+ 208: 96 10 80 00 l\.lhz r16,-32768\(r16\)
+ 20c: 95 ef 7f ff l\.lhz r15,32767\(r15\)
+ 210: 94 21 00 01 l\.lhz r1,1\(r1\)
+ 214: 94 a4 e9 dd l\.lhz r5,-5667\(r4\)
+ 218: 97 04 16 d8 l\.lhz r24,5848\(r4\)
+ 21c: 95 47 7b bb l\.lhz r10,31675\(r7\)
+
+00000220 <l_lhs>:
+ 220: 98 00 00 00 l\.lhs r0,0\(r0\)
+ 224: 9b ff ff ff l\.lhs r31,-1\(r31\)
+ 228: 9a 10 80 00 l\.lhs r16,-32768\(r16\)
+ 22c: 99 ef 7f ff l\.lhs r15,32767\(r15\)
+ 230: 98 21 00 01 l\.lhs r1,1\(r1\)
+ 234: 98 cb ff 72 l\.lhs r6,-142\(r11\)
+ 238: 9a 9d eb 46 l\.lhs r20,-5306\(r29\)
+ 23c: 99 f5 10 52 l\.lhs r15,4178\(r21\)
+
+00000240 <l_sw>:
+ 240: d4 00 00 00 l\.sw 0\(r0\),r0
+ 244: d7 ff ff ff l\.sw -1\(r31\),r31
+ 248: d6 10 80 00 l\.sw -32768\(r16\),r16
+ 24c: d5 ef 7f ff l\.sw 32767\(r15\),r15
+ 250: d4 01 08 01 l\.sw 1\(r1\),r1
+ 254: d7 91 50 e1 l\.sw -7967\(r17\),r10
+ 258: d4 1e 57 20 l\.sw 1824\(r30\),r10
+ 25c: d5 ef 23 4e l\.sw 31566\(r15\),r4
+
+00000260 <l_sb>:
+ 260: d8 00 00 00 l\.sb 0\(r0\),r0
+ 264: db ff ff ff l\.sb -1\(r31\),r31
+ 268: da 10 80 00 l\.sb -32768\(r16\),r16
+ 26c: d9 ef 7f ff l\.sb 32767\(r15\),r15
+ 270: d8 01 08 01 l\.sb 1\(r1\),r1
+ 274: d9 4a 06 b8 l\.sb 22200\(r10\),r0
+ 278: d8 90 df 0b l\.sb 9995\(r16\),r27
+ 27c: da 4e f9 9c l\.sb -28260\(r14\),r31
+
+00000280 <l_sh>:
+ 280: dc 00 00 00 l\.sh 0\(r0\),r0
+ 284: df ff ff ff l\.sh -1\(r31\),r31
+ 288: de 10 80 00 l\.sh -32768\(r16\),r16
+ 28c: dd ef 7f ff l\.sh 32767\(r15\),r15
+ 290: dc 01 08 01 l\.sh 1\(r1\),r1
+ 294: dc b5 c9 bd l\.sh 10685\(r21\),r25
+ 298: df 3c 2c f6 l\.sh -13066\(r28\),r5
+ 29c: de 49 ef 50 l\.sh -26800\(r9\),r29
+
+000002a0 <l_sll>:
+ 2a0: e0 00 00 08 l\.sll r0,r0,r0
+ 2a4: e3 ff f8 08 l\.sll r31,r31,r31
+ 2a8: e2 10 80 08 l\.sll r16,r16,r16
+ 2ac: e1 ef 78 08 l\.sll r15,r15,r15
+ 2b0: e0 21 08 08 l\.sll r1,r1,r1
+ 2b4: e3 f0 40 08 l\.sll r31,r16,r8
+ 2b8: e3 f1 b0 08 l\.sll r31,r17,r22
+ 2bc: e1 ee 28 08 l\.sll r15,r14,r5
+
+000002c0 <l_slli>:
+ 2c0: b8 00 00 00 l\.slli r0,r0,0x0
+ 2c4: bb ff 00 3f l\.slli r31,r31,0x3f
+ 2c8: ba 10 00 20 l\.slli r16,r16,0x20
+ 2cc: b9 ef 00 1f l\.slli r15,r15,0x1f
+ 2d0: b8 21 00 01 l\.slli r1,r1,0x1
+ 2d4: b9 6e 00 31 l\.slli r11,r14,0x31
+ 2d8: b8 fb 00 17 l\.slli r7,r27,0x17
+ 2dc: bb d0 00 0b l\.slli r30,r16,0xb
+
+000002e0 <l_srl>:
+ 2e0: e0 00 00 48 l\.srl r0,r0,r0
+ 2e4: e3 ff f8 48 l\.srl r31,r31,r31
+ 2e8: e2 10 80 48 l\.srl r16,r16,r16
+ 2ec: e1 ef 78 48 l\.srl r15,r15,r15
+ 2f0: e0 21 08 48 l\.srl r1,r1,r1
+ 2f4: e1 f9 68 48 l\.srl r15,r25,r13
+ 2f8: e2 60 88 48 l\.srl r19,r0,r17
+ 2fc: e1 a0 b8 48 l\.srl r13,r0,r23
+
+00000300 <l_srli>:
+ 300: b8 00 00 40 l\.srli r0,r0,0x0
+ 304: bb ff 00 7f l\.srli r31,r31,0x3f
+ 308: ba 10 00 60 l\.srli r16,r16,0x20
+ 30c: b9 ef 00 5f l\.srli r15,r15,0x1f
+ 310: b8 21 00 41 l\.srli r1,r1,0x1
+ 314: b9 fe 00 4d l\.srli r15,r30,0xd
+ 318: b9 a3 00 7f l\.srli r13,r3,0x3f
+ 31c: b8 52 00 5e l\.srli r2,r18,0x1e
+
+00000320 <l_sra>:
+ 320: e0 00 00 88 l\.sra r0,r0,r0
+ 324: e3 ff f8 88 l\.sra r31,r31,r31
+ 328: e2 10 80 88 l\.sra r16,r16,r16
+ 32c: e1 ef 78 88 l\.sra r15,r15,r15
+ 330: e0 21 08 88 l\.sra r1,r1,r1
+ 334: e0 7a 00 88 l\.sra r3,r26,r0
+ 338: e3 b2 d8 88 l\.sra r29,r18,r27
+ 33c: e3 7d 18 88 l\.sra r27,r29,r3
+
+00000340 <l_srai>:
+ 340: b8 00 00 80 l\.srai r0,r0,0x0
+ 344: bb ff 00 bf l\.srai r31,r31,0x3f
+ 348: ba 10 00 a0 l\.srai r16,r16,0x20
+ 34c: b9 ef 00 9f l\.srai r15,r15,0x1f
+ 350: b8 21 00 81 l\.srai r1,r1,0x1
+ 354: b9 4b 00 9c l\.srai r10,r11,0x1c
+ 358: ba ef 00 b0 l\.srai r23,r15,0x30
+ 35c: ba 0f 00 a6 l\.srai r16,r15,0x26
+
+00000360 <l_ror>:
+ 360: e0 00 00 c8 l\.ror r0,r0,r0
+ 364: e3 ff f8 c8 l\.ror r31,r31,r31
+ 368: e2 10 80 c8 l\.ror r16,r16,r16
+ 36c: e1 ef 78 c8 l\.ror r15,r15,r15
+ 370: e0 21 08 c8 l\.ror r1,r1,r1
+ 374: e3 ac 28 c8 l\.ror r29,r12,r5
+ 378: e2 46 20 c8 l\.ror r18,r6,r4
+ 37c: e0 50 88 c8 l\.ror r2,r16,r17
+
+00000380 <l_rori>:
+ 380: b8 00 00 c0 l\.rori r0,r0,0x0
+ 384: bb ff 00 ff l\.rori r31,r31,0x3f
+ 388: ba 10 00 e0 l\.rori r16,r16,0x20
+ 38c: b9 ef 00 df l\.rori r15,r15,0x1f
+ 390: b8 21 00 c1 l\.rori r1,r1,0x1
+ 394: ba 20 00 d7 l\.rori r17,r0,0x17
+ 398: ba 1f 00 ea l\.rori r16,r31,0x2a
+ 39c: b9 b5 00 cc l\.rori r13,r21,0xc
+
+000003a0 <l_add>:
+ 3a0: e0 00 00 00 l\.add r0,r0,r0
+ 3a4: e3 ff f8 00 l\.add r31,r31,r31
+ 3a8: e2 10 80 00 l\.add r16,r16,r16
+ 3ac: e1 ef 78 00 l\.add r15,r15,r15
+ 3b0: e0 21 08 00 l\.add r1,r1,r1
+ 3b4: e3 a7 20 00 l\.add r29,r7,r4
+ 3b8: e3 aa 90 00 l\.add r29,r10,r18
+ 3bc: e2 56 b8 00 l\.add r18,r22,r23
+
+000003c0 <l_sub>:
+ 3c0: e0 00 00 02 l\.sub r0,r0,r0
+ 3c4: e3 ff f8 02 l\.sub r31,r31,r31
+ 3c8: e2 10 80 02 l\.sub r16,r16,r16
+ 3cc: e1 ef 78 02 l\.sub r15,r15,r15
+ 3d0: e0 21 08 02 l\.sub r1,r1,r1
+ 3d4: e2 fa 70 02 l\.sub r23,r26,r14
+ 3d8: e1 58 78 02 l\.sub r10,r24,r15
+ 3dc: e1 64 90 02 l\.sub r11,r4,r18
+
+000003e0 <l_and>:
+ 3e0: e0 00 00 03 l\.and r0,r0,r0
+ 3e4: e3 ff f8 03 l\.and r31,r31,r31
+ 3e8: e2 10 80 03 l\.and r16,r16,r16
+ 3ec: e1 ef 78 03 l\.and r15,r15,r15
+ 3f0: e0 21 08 03 l\.and r1,r1,r1
+ 3f4: e0 1f c8 03 l\.and r0,r31,r25
+ 3f8: e3 c7 98 03 l\.and r30,r7,r19
+ 3fc: e2 62 d0 03 l\.and r19,r2,r26
+
+00000400 <l_or>:
+ 400: e0 00 00 04 l\.or r0,r0,r0
+ 404: e3 ff f8 04 l\.or r31,r31,r31
+ 408: e2 10 80 04 l\.or r16,r16,r16
+ 40c: e1 ef 78 04 l\.or r15,r15,r15
+ 410: e0 21 08 04 l\.or r1,r1,r1
+ 414: e2 2a 10 04 l\.or r17,r10,r2
+ 418: e0 f3 e8 04 l\.or r7,r19,r29
+ 41c: e0 71 88 04 l\.or r3,r17,r17
+
+00000420 <l_xor>:
+ 420: e0 00 00 05 l\.xor r0,r0,r0
+ 424: e3 ff f8 05 l\.xor r31,r31,r31
+ 428: e2 10 80 05 l\.xor r16,r16,r16
+ 42c: e1 ef 78 05 l\.xor r15,r15,r15
+ 430: e0 21 08 05 l\.xor r1,r1,r1
+ 434: e3 e5 88 05 l\.xor r31,r5,r17
+ 438: e2 c4 28 05 l\.xor r22,r4,r5
+ 43c: e3 d4 d0 05 l\.xor r30,r20,r26
+
+00000440 <l_addc>:
+ 440: e0 00 00 01 l\.addc r0,r0,r0
+ 444: e3 ff f8 01 l\.addc r31,r31,r31
+ 448: e2 10 80 01 l\.addc r16,r16,r16
+ 44c: e1 ef 78 01 l\.addc r15,r15,r15
+ 450: e0 21 08 01 l\.addc r1,r1,r1
+ 454: e1 1a c0 01 l\.addc r8,r26,r24
+ 458: e2 46 20 01 l\.addc r18,r6,r4
+ 45c: e3 a0 90 01 l\.addc r29,r0,r18
+
+00000460 <l_mul>:
+ 460: e0 00 03 06 l\.mul r0,r0,r0
+ 464: e3 ff fb 06 l\.mul r31,r31,r31
+ 468: e2 10 83 06 l\.mul r16,r16,r16
+ 46c: e1 ef 7b 06 l\.mul r15,r15,r15
+ 470: e0 21 0b 06 l\.mul r1,r1,r1
+ 474: e1 19 6b 06 l\.mul r8,r25,r13
+ 478: e1 15 eb 06 l\.mul r8,r21,r29
+ 47c: e3 63 8b 06 l\.mul r27,r3,r17
+
+00000480 <l_mulu>:
+ 480: e0 00 03 0b l\.mulu r0,r0,r0
+ 484: e3 ff fb 0b l\.mulu r31,r31,r31
+ 488: e2 10 83 0b l\.mulu r16,r16,r16
+ 48c: e1 ef 7b 0b l\.mulu r15,r15,r15
+ 490: e0 21 0b 0b l\.mulu r1,r1,r1
+ 494: e3 4e 83 0b l\.mulu r26,r14,r16
+ 498: e0 32 5b 0b l\.mulu r1,r18,r11
+ 49c: e1 d2 8b 0b l\.mulu r14,r18,r17
+
+000004a0 <l_div>:
+ 4a0: e0 00 03 09 l\.div r0,r0,r0
+ 4a4: e3 ff fb 09 l\.div r31,r31,r31
+ 4a8: e2 10 83 09 l\.div r16,r16,r16
+ 4ac: e1 ef 7b 09 l\.div r15,r15,r15
+ 4b0: e0 21 0b 09 l\.div r1,r1,r1
+ 4b4: e0 02 e3 09 l\.div r0,r2,r28
+ 4b8: e3 47 fb 09 l\.div r26,r7,r31
+ 4bc: e0 52 a3 09 l\.div r2,r18,r20
+
+000004c0 <l_divu>:
+ 4c0: e0 00 03 0a l\.divu r0,r0,r0
+ 4c4: e3 ff fb 0a l\.divu r31,r31,r31
+ 4c8: e2 10 83 0a l\.divu r16,r16,r16
+ 4cc: e1 ef 7b 0a l\.divu r15,r15,r15
+ 4d0: e0 21 0b 0a l\.divu r1,r1,r1
+ 4d4: e0 a4 cb 0a l\.divu r5,r4,r25
+ 4d8: e1 0b eb 0a l\.divu r8,r11,r29
+ 4dc: e1 73 13 0a l\.divu r11,r19,r2
+
+000004e0 <l_addi>:
+ 4e0: 9c 00 00 00 l\.addi r0,r0,0
+ 4e4: 9f ff ff ff l\.addi r31,r31,-1
+ 4e8: 9e 10 80 00 l\.addi r16,r16,-32768
+ 4ec: 9d ef 7f ff l\.addi r15,r15,32767
+ 4f0: 9c 21 00 01 l\.addi r1,r1,1
+ 4f4: 9d c0 1b 6c l\.addi r14,r0,7020
+ 4f8: 9d ae 37 33 l\.addi r13,r14,14131
+ 4fc: 9d d0 97 3b l\.addi r14,r16,-26821
+
+00000500 <l_andi>:
+ 500: a4 00 00 00 l\.andi r0,r0,0x0
+ 504: a7 ff ff ff l\.andi r31,r31,0xffff
+ 508: a6 10 80 00 l\.andi r16,r16,0x8000
+ 50c: a5 ef 7f ff l\.andi r15,r15,0x7fff
+ 510: a4 21 00 01 l\.andi r1,r1,0x1
+ 514: a7 75 2e 97 l\.andi r27,r21,0x2e97
+ 518: a6 b7 2f 1b l\.andi r21,r23,0x2f1b
+ 51c: a7 de 83 c4 l\.andi r30,r30,0x83c4
+
+00000520 <l_ori>:
+ 520: a8 00 00 00 l\.ori r0,r0,0x0
+ 524: ab ff ff ff l\.ori r31,r31,0xffff
+ 528: aa 10 80 00 l\.ori r16,r16,0x8000
+ 52c: a9 ef 7f ff l\.ori r15,r15,0x7fff
+ 530: a8 21 00 01 l\.ori r1,r1,0x1
+ 534: aa db d8 81 l\.ori r22,r27,0xd881
+ 538: aa 3f 00 80 l\.ori r17,r31,0x80
+ 53c: a9 b4 cf 6d l\.ori r13,r20,0xcf6d
+
+00000540 <l_xori>:
+ 540: ac 00 00 00 l\.xori r0,r0,0
+ 544: af ff ff ff l\.xori r31,r31,-1
+ 548: ae 10 80 00 l\.xori r16,r16,-32768
+ 54c: ad ef 7f ff l\.xori r15,r15,32767
+ 550: ac 21 00 01 l\.xori r1,r1,1
+ 554: ae 50 ff ff l\.xori r18,r16,-1
+ 558: af 2d c0 35 l\.xori r25,r13,-16331
+ 55c: ad 9d 80 29 l\.xori r12,r29,-32727
+
+00000560 <l_muli>:
+ 560: b0 00 00 00 l\.muli r0,r0,0
+ 564: b3 ff ff ff l\.muli r31,r31,-1
+ 568: b2 10 80 00 l\.muli r16,r16,-32768
+ 56c: b1 ef 7f ff l\.muli r15,r15,32767
+ 570: b0 21 00 01 l\.muli r1,r1,1
+ 574: b3 67 ed 85 l\.muli r27,r7,-4731
+ 578: b0 f4 ff ff l\.muli r7,r20,-1
+ 57c: b3 15 5a b3 l\.muli r24,r21,23219
+
+00000580 <l_addic>:
+ 580: a0 00 00 00 l\.addic r0,r0,0
+ 584: a3 ff ff ff l\.addic r31,r31,-1
+ 588: a2 10 80 00 l\.addic r16,r16,-32768
+ 58c: a1 ef 7f ff l\.addic r15,r15,32767
+ 590: a0 21 00 01 l\.addic r1,r1,1
+ 594: a0 d6 80 44 l\.addic r6,r22,-32700
+ 598: a2 69 ff ff l\.addic r19,r9,-1
+ 59c: a3 7c 1a eb l\.addic r27,r28,6891
+
+000005a0 <l_sfgtu>:
+ 5a0: e4 40 00 00 l\.sfgtu r0,r0
+ 5a4: e4 5f f8 00 l\.sfgtu r31,r31
+ 5a8: e4 50 80 00 l\.sfgtu r16,r16
+ 5ac: e4 4f 78 00 l\.sfgtu r15,r15
+ 5b0: e4 41 08 00 l\.sfgtu r1,r1
+ 5b4: e4 48 20 00 l\.sfgtu r8,r4
+ 5b8: e4 51 a8 00 l\.sfgtu r17,r21
+ 5bc: e4 46 28 00 l\.sfgtu r6,r5
+
+000005c0 <l_sfgeu>:
+ 5c0: e4 60 00 00 l\.sfgeu r0,r0
+ 5c4: e4 7f f8 00 l\.sfgeu r31,r31
+ 5c8: e4 70 80 00 l\.sfgeu r16,r16
+ 5cc: e4 6f 78 00 l\.sfgeu r15,r15
+ 5d0: e4 61 08 00 l\.sfgeu r1,r1
+ 5d4: e4 6e 60 00 l\.sfgeu r14,r12
+ 5d8: e4 76 38 00 l\.sfgeu r22,r7
+ 5dc: e4 6d 08 00 l\.sfgeu r13,r1
+
+000005e0 <l_sfltu>:
+ 5e0: e4 80 00 00 l\.sfltu r0,r0
+ 5e4: e4 9f f8 00 l\.sfltu r31,r31
+ 5e8: e4 90 80 00 l\.sfltu r16,r16
+ 5ec: e4 8f 78 00 l\.sfltu r15,r15
+ 5f0: e4 81 08 00 l\.sfltu r1,r1
+ 5f4: e4 81 68 00 l\.sfltu r1,r13
+ 5f8: e4 96 f0 00 l\.sfltu r22,r30
+ 5fc: e4 94 30 00 l\.sfltu r20,r6
+
+00000600 <l_sfleu>:
+ 600: e4 a0 00 00 l\.sfleu r0,r0
+ 604: e4 bf f8 00 l\.sfleu r31,r31
+ 608: e4 b0 80 00 l\.sfleu r16,r16
+ 60c: e4 af 78 00 l\.sfleu r15,r15
+ 610: e4 a1 08 00 l\.sfleu r1,r1
+ 614: e4 b3 40 00 l\.sfleu r19,r8
+ 618: e4 bb 78 00 l\.sfleu r27,r15
+ 61c: e4 bb 18 00 l\.sfleu r27,r3
+
+00000620 <l_sfgts>:
+ 620: e5 40 00 00 l\.sfgts r0,r0
+ 624: e5 5f f8 00 l\.sfgts r31,r31
+ 628: e5 50 80 00 l\.sfgts r16,r16
+ 62c: e5 4f 78 00 l\.sfgts r15,r15
+ 630: e5 41 08 00 l\.sfgts r1,r1
+ 634: e5 45 28 00 l\.sfgts r5,r5
+ 638: e5 5f 28 00 l\.sfgts r31,r5
+ 63c: e5 5e 90 00 l\.sfgts r30,r18
+
+00000640 <l_sfges>:
+ 640: e5 60 00 00 l\.sfges r0,r0
+ 644: e5 7f f8 00 l\.sfges r31,r31
+ 648: e5 70 80 00 l\.sfges r16,r16
+ 64c: e5 6f 78 00 l\.sfges r15,r15
+ 650: e5 61 08 00 l\.sfges r1,r1
+ 654: e5 71 90 00 l\.sfges r17,r18
+ 658: e5 60 48 00 l\.sfges r0,r9
+ 65c: e5 76 c8 00 l\.sfges r22,r25
+
+00000660 <l_sflts>:
+ 660: e5 80 00 00 l\.sflts r0,r0
+ 664: e5 9f f8 00 l\.sflts r31,r31
+ 668: e5 90 80 00 l\.sflts r16,r16
+ 66c: e5 8f 78 00 l\.sflts r15,r15
+ 670: e5 81 08 00 l\.sflts r1,r1
+ 674: e5 99 c0 00 l\.sflts r25,r24
+ 678: e5 97 68 00 l\.sflts r23,r13
+ 67c: e5 8f 40 00 l\.sflts r15,r8
+
+00000680 <l_sfles>:
+ 680: e5 a0 00 00 l\.sfles r0,r0
+ 684: e5 bf f8 00 l\.sfles r31,r31
+ 688: e5 b0 80 00 l\.sfles r16,r16
+ 68c: e5 af 78 00 l\.sfles r15,r15
+ 690: e5 a1 08 00 l\.sfles r1,r1
+ 694: e5 b1 68 00 l\.sfles r17,r13
+ 698: e5 be c8 00 l\.sfles r30,r25
+ 69c: e5 a0 60 00 l\.sfles r0,r12
+
+000006a0 <l_sfgtui>:
+ 6a0: bc 40 00 00 l\.sfgtui r0,0
+ 6a4: bc 5f ff ff l\.sfgtui r31,-1
+ 6a8: bc 50 80 00 l\.sfgtui r16,-32768
+ 6ac: bc 4f 7f ff l\.sfgtui r15,32767
+ 6b0: bc 41 00 01 l\.sfgtui r1,1
+ 6b4: bc 45 4b 21 l\.sfgtui r5,19233
+ 6b8: bc 57 91 22 l\.sfgtui r23,-28382
+ 6bc: bc 51 25 dd l\.sfgtui r17,9693
+
+000006c0 <l_sfgeui>:
+ 6c0: bc 60 00 00 l\.sfgeui r0,0
+ 6c4: bc 7f ff ff l\.sfgeui r31,-1
+ 6c8: bc 70 80 00 l\.sfgeui r16,-32768
+ 6cc: bc 6f 7f ff l\.sfgeui r15,32767
+ 6d0: bc 61 00 01 l\.sfgeui r1,1
+ 6d4: bc 71 ec b6 l\.sfgeui r17,-4938
+ 6d8: bc 6f 40 13 l\.sfgeui r15,16403
+ 6dc: bc 66 f1 a4 l\.sfgeui r6,-3676
+
+000006e0 <l_sfltui>:
+ 6e0: bc 80 00 00 l\.sfltui r0,0
+ 6e4: bc 9f ff ff l\.sfltui r31,-1
+ 6e8: bc 90 80 00 l\.sfltui r16,-32768
+ 6ec: bc 8f 7f ff l\.sfltui r15,32767
+ 6f0: bc 81 00 01 l\.sfltui r1,1
+ 6f4: bc 83 cc af l\.sfltui r3,-13137
+ 6f8: bc 98 4c fd l\.sfltui r24,19709
+ 6fc: bc 8a 03 3e l\.sfltui r10,830
+
+00000700 <l_sfleui>:
+ 700: bc a0 00 00 l\.sfleui r0,0
+ 704: bc bf ff ff l\.sfleui r31,-1
+ 708: bc b0 80 00 l\.sfleui r16,-32768
+ 70c: bc af 7f ff l\.sfleui r15,32767
+ 710: bc a1 00 01 l\.sfleui r1,1
+ 714: bc b7 9b 66 l\.sfleui r23,-25754
+ 718: bc b1 b6 d7 l\.sfleui r17,-18729
+ 71c: bc a9 a8 81 l\.sfleui r9,-22399
+
+00000720 <l_sfgtsi>:
+ 720: bd 40 00 00 l\.sfgtsi r0,0
+ 724: bd 5f ff ff l\.sfgtsi r31,-1
+ 728: bd 50 80 00 l\.sfgtsi r16,-32768
+ 72c: bd 4f 7f ff l\.sfgtsi r15,32767
+ 730: bd 41 00 01 l\.sfgtsi r1,1
+ 734: bd 4d b6 82 l\.sfgtsi r13,-18814
+ 738: bd 4d d6 5f l\.sfgtsi r13,-10657
+ 73c: bd 5c 97 d5 l\.sfgtsi r28,-26667
+
+00000740 <l_sfgesi>:
+ 740: bd 60 00 00 l\.sfgesi r0,0
+ 744: bd 7f ff ff l\.sfgesi r31,-1
+ 748: bd 70 80 00 l\.sfgesi r16,-32768
+ 74c: bd 6f 7f ff l\.sfgesi r15,32767
+ 750: bd 61 00 01 l\.sfgesi r1,1
+ 754: bd 6c 09 48 l\.sfgesi r12,2376
+ 758: bd 69 7d 3b l\.sfgesi r9,32059
+ 75c: bd 6d 50 d8 l\.sfgesi r13,20696
+
+00000760 <l_sfltsi>:
+ 760: bd 80 00 00 l\.sfltsi r0,0
+ 764: bd 9f ff ff l\.sfltsi r31,-1
+ 768: bd 90 80 00 l\.sfltsi r16,-32768
+ 76c: bd 8f 7f ff l\.sfltsi r15,32767
+ 770: bd 81 00 01 l\.sfltsi r1,1
+ 774: bd 9e 0b cd l\.sfltsi r30,3021
+ 778: bd 85 93 5b l\.sfltsi r5,-27813
+ 77c: bd 9c dd 90 l\.sfltsi r28,-8816
+
+00000780 <l_sflesi>:
+ 780: bd a0 00 00 l\.sflesi r0,0
+ 784: bd bf ff ff l\.sflesi r31,-1
+ 788: bd b0 80 00 l\.sflesi r16,-32768
+ 78c: bd af 7f ff l\.sflesi r15,32767
+ 790: bd a1 00 01 l\.sflesi r1,1
+ 794: bd b2 2c 4a l\.sflesi r18,11338
+ 798: bd bd 49 b9 l\.sflesi r29,18873
+ 79c: bd bc 65 c2 l\.sflesi r28,26050
+
+000007a0 <l_sfeq>:
+ 7a0: e4 00 00 00 l\.sfeq r0,r0
+ 7a4: e4 1f f8 00 l\.sfeq r31,r31
+ 7a8: e4 10 80 00 l\.sfeq r16,r16
+ 7ac: e4 0f 78 00 l\.sfeq r15,r15
+ 7b0: e4 01 08 00 l\.sfeq r1,r1
+ 7b4: e4 1c d0 00 l\.sfeq r28,r26
+ 7b8: e4 0d 30 00 l\.sfeq r13,r6
+ 7bc: e4 1a 48 00 l\.sfeq r26,r9
+
+000007c0 <l_sfeqi>:
+ 7c0: bc 00 00 00 l\.sfeqi r0,0
+ 7c4: bc 1f ff ff l\.sfeqi r31,-1
+ 7c8: bc 10 80 00 l\.sfeqi r16,-32768
+ 7cc: bc 0f 7f ff l\.sfeqi r15,32767
+ 7d0: bc 01 00 01 l\.sfeqi r1,1
+ 7d4: bc 0a 65 1f l\.sfeqi r10,25887
+ 7d8: bc 15 4d b6 l\.sfeqi r21,19894
+ 7dc: bc 12 cb 95 l\.sfeqi r18,-13419
+
+000007e0 <l_sfne>:
+ 7e0: e4 20 00 00 l\.sfne r0,r0
+ 7e4: e4 3f f8 00 l\.sfne r31,r31
+ 7e8: e4 30 80 00 l\.sfne r16,r16
+ 7ec: e4 2f 78 00 l\.sfne r15,r15
+ 7f0: e4 21 08 00 l\.sfne r1,r1
+ 7f4: e4 32 d8 00 l\.sfne r18,r27
+ 7f8: e4 26 90 00 l\.sfne r6,r18
+ 7fc: e4 20 f0 00 l\.sfne r0,r30
+
+00000800 <l_sfnei>:
+ 800: bc 20 00 00 l\.sfnei r0,0
+ 804: bc 3f ff ff l\.sfnei r31,-1
+ 808: bc 30 80 00 l\.sfnei r16,-32768
+ 80c: bc 2f 7f ff l\.sfnei r15,32767
+ 810: bc 21 00 01 l\.sfnei r1,1
+ 814: bc 28 2c 92 l\.sfnei r8,11410
+ 818: bc 26 b4 d9 l\.sfnei r6,-19239
+ 81c: bc 34 a7 01 l\.sfnei r20,-22783
+
+00000820 <l_lo>:
+ 820: 9c 21 be ef l\.addi r1,r1,-16657
+
+00000824 <l_hi>:
+ 824: 18 20 de ad l\.movhi r1,0xdead
+
+00000828 <l_mac>:
+ 828: c4 01 10 01 l.mac r1,r2
+
+0000082c <l_maci>:
+ 82c: 4c 01 00 00 l\.maci r1,0
+ 830: 4c 02 ff ff l\.maci r2,-1
+ 834: 4c 02 7f ff l\.maci r2,32767
+ 838: 4c 02 80 00 l\.maci r2,-32768
diff --git a/gas/testsuite/gas/or1k/allinsn.exp b/gas/testsuite/gas/or1k/allinsn.exp
new file mode 100644
index 0000000..11eacd7
--- /dev/null
+++ b/gas/testsuite/gas/or1k/allinsn.exp
@@ -0,0 +1,5 @@
+# OR1K assembler testsuite. -*- Tcl -*-
+
+if [istarget or1k*-*-*] {
+ run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
+}
diff --git a/gas/testsuite/gas/or1k/allinsn.s b/gas/testsuite/gas/or1k/allinsn.s
new file mode 100644
index 0000000..05647f2
--- /dev/null
+++ b/gas/testsuite/gas/or1k/allinsn.s
@@ -0,0 +1,677 @@
+ .data
+localdata:
+ .word 42
+ .text
+localtext:
+ l.nop
+ .data
+ .global globaldata
+globaldata:
+ .word 43
+ .text
+ .global globaltext
+globaltext:
+ l.nop
+
+l_j:
+ l.j -4
+ l.j 4
+ l.j 0
+ l.j localtext
+ l.j localdata
+ l.j globaltext
+ l.j globaldata
+ l.j l_j
+ l.j l_jal
+ .text
+l_jal:
+ l.jal -4
+ l.jal 4
+ l.jal 0
+ l.jal localtext
+ l.jal localdata
+ l.jal globaltext
+ l.jal globaldata
+ l.jal l_j
+ l.jal l_jal
+ .text
+l_jr:
+ l.jr r0
+ l.jr r31
+ l.jr r16
+ l.jr r15
+ l.jr r1
+ l.jr r27
+ l.jr r14
+ l.jr r22
+ .text
+l_jalr:
+ l.jalr r0
+ l.jalr r31
+ l.jalr r16
+ l.jalr r15
+ l.jalr r1
+ l.jalr r27
+ l.jalr r14
+ l.jalr r22
+ .text
+l_bnf:
+ l.bnf -4
+ l.bnf 4
+ l.bnf 0
+ l.bnf localtext
+ l.bnf localdata
+ l.bnf globaltext
+ l.bnf globaldata
+ l.bnf l_j
+ l.bnf l_jal
+ .text
+l_bf:
+ l.bf -4
+ l.bf 4
+ l.bf 0
+ l.bf localtext
+ l.bf localdata
+ l.bf globaltext
+ l.bf globaldata
+ l.bf l_j
+ l.bf l_jal
+ .text
+l_trap:
+ l.trap 0
+ l.trap 65535
+ l.trap 32768
+ l.trap 32767
+ l.trap 1
+ l.trap 53583
+ l.trap 32636
+ l.trap 53834
+ .text
+l_sys:
+ l.sys 0
+ l.sys 65535
+ l.sys 32768
+ l.sys 32767
+ l.sys 1
+ l.sys 53893
+ l.sys 58133
+ l.sys 33018
+ .text
+l_rfe:
+ l.rfe
+ .text
+l_nop:
+ l.nop
+ .text
+l_movhi:
+ l.movhi r0,0
+ l.movhi r31,-1
+ l.movhi r16,-32768
+ l.movhi r15,32767
+ l.movhi r1,1
+ l.movhi r28,-32306
+ l.movhi r23,-5972
+ l.movhi r19,-10048
+ .text
+l_mfspr:
+ l.mfspr r0,r0,0
+ l.mfspr r31,r31,65535
+ l.mfspr r16,r16,32768
+ l.mfspr r15,r15,32767
+ l.mfspr r1,r1,1
+ l.mfspr r23,r29,54424
+ l.mfspr r19,r20,4481
+ l.mfspr r26,r2,63446
+ .text
+l_mtspr:
+ l.mtspr r0,r0,0
+ l.mtspr r31,r31,-1
+ l.mtspr r16,r16,-32768
+ l.mtspr r15,r15,32767
+ l.mtspr r1,r1,1
+ l.mtspr r30,r6,15223
+ l.mtspr r9,r7,-21300
+ l.mtspr r25,r7,-645
+ .text
+l_lwz:
+ l.lwz r0,0(r0)
+ l.lwz r31,-1(r31)
+ l.lwz r16,-32768(r16)
+ l.lwz r15,32767(r15)
+ l.lwz r1,1(r1)
+ l.lwz r15,2933(r25)
+ l.lwz r17,-799(r21)
+ l.lwz r0,-17595(r18)
+ .text
+l_lws:
+ l.lws r0,0(r0)
+ l.lws r31,-1(r31)
+ l.lws r16,-32768(r16)
+ l.lws r15,32767(r15)
+ l.lws r1,1(r1)
+ l.lws r1,-17606(r21)
+ l.lws r14,26891(r31)
+ l.lws r8,27552(r0)
+ .text
+l_lbz:
+ l.lbz r0,0(r0)
+ l.lbz r31,-1(r31)
+ l.lbz r16,-32768(r16)
+ l.lbz r15,32767(r15)
+ l.lbz r1,1(r1)
+ l.lbz r19,25635(r20)
+ l.lbz r15,-3416(r9)
+ l.lbz r3,17748(r1)
+ .text
+l_lbs:
+ l.lbs r0,0(r0)
+ l.lbs r31,-1(r31)
+ l.lbs r16,-32768(r16)
+ l.lbs r15,32767(r15)
+ l.lbs r1,1(r1)
+ l.lbs r26,17606(r8)
+ l.lbs r22,-31072(r16)
+ l.lbs r6,17440(r9)
+ .text
+l_lhz:
+ l.lhz r0,0(r0)
+ l.lhz r31,-1(r31)
+ l.lhz r16,-32768(r16)
+ l.lhz r15,32767(r15)
+ l.lhz r1,1(r1)
+ l.lhz r5,-5667(r4)
+ l.lhz r24,5848(r4)
+ l.lhz r10,31675(r7)
+ .text
+l_lhs:
+ l.lhs r0,0(r0)
+ l.lhs r31,-1(r31)
+ l.lhs r16,-32768(r16)
+ l.lhs r15,32767(r15)
+ l.lhs r1,1(r1)
+ l.lhs r6,-142(r11)
+ l.lhs r20,-5306(r29)
+ l.lhs r15,4178(r21)
+ .text
+l_sw:
+ l.sw 0(r0),r0
+ l.sw -1(r31),r31
+ l.sw -32768(r16),r16
+ l.sw 32767(r15),r15
+ l.sw 1(r1),r1
+ l.sw -7967(r17),r10
+ l.sw 1824(r30),r10
+ l.sw 31566(r15),r4
+ .text
+l_sb:
+ l.sb 0(r0),r0
+ l.sb -1(r31),r31
+ l.sb -32768(r16),r16
+ l.sb 32767(r15),r15
+ l.sb 1(r1),r1
+ l.sb 22200(r10),r0
+ l.sb 9995(r16),r27
+ l.sb -28260(r14),r31
+ .text
+l_sh:
+ l.sh 0(r0),r0
+ l.sh -1(r31),r31
+ l.sh -32768(r16),r16
+ l.sh 32767(r15),r15
+ l.sh 1(r1),r1
+ l.sh 10685(r21),r25
+ l.sh -13066(r28),r5
+ l.sh -26800(r9),r29
+ .text
+l_sll:
+ l.sll r0,r0,r0
+ l.sll r31,r31,r31
+ l.sll r16,r16,r16
+ l.sll r15,r15,r15
+ l.sll r1,r1,r1
+ l.sll r31,r16,r8
+ l.sll r31,r17,r22
+ l.sll r15,r14,r5
+ .text
+l_slli:
+ l.slli r0,r0,0
+ l.slli r31,r31,63
+ l.slli r16,r16,32
+ l.slli r15,r15,31
+ l.slli r1,r1,1
+ l.slli r11,r14,49
+ l.slli r7,r27,23
+ l.slli r30,r16,11
+ .text
+l_srl:
+ l.srl r0,r0,r0
+ l.srl r31,r31,r31
+ l.srl r16,r16,r16
+ l.srl r15,r15,r15
+ l.srl r1,r1,r1
+ l.srl r15,r25,r13
+ l.srl r19,r0,r17
+ l.srl r13,r0,r23
+ .text
+l_srli:
+ l.srli r0,r0,0
+ l.srli r31,r31,63
+ l.srli r16,r16,32
+ l.srli r15,r15,31
+ l.srli r1,r1,1
+ l.srli r15,r30,13
+ l.srli r13,r3,63
+ l.srli r2,r18,30
+ .text
+l_sra:
+ l.sra r0,r0,r0
+ l.sra r31,r31,r31
+ l.sra r16,r16,r16
+ l.sra r15,r15,r15
+ l.sra r1,r1,r1
+ l.sra r3,r26,r0
+ l.sra r29,r18,r27
+ l.sra r27,r29,r3
+ .text
+l_srai:
+ l.srai r0,r0,0
+ l.srai r31,r31,63
+ l.srai r16,r16,32
+ l.srai r15,r15,31
+ l.srai r1,r1,1
+ l.srai r10,r11,28
+ l.srai r23,r15,48
+ l.srai r16,r15,38
+ .text
+l_ror:
+ l.ror r0,r0,r0
+ l.ror r31,r31,r31
+ l.ror r16,r16,r16
+ l.ror r15,r15,r15
+ l.ror r1,r1,r1
+ l.ror r29,r12,r5
+ l.ror r18,r6,r4
+ l.ror r2,r16,r17
+ .text
+l_rori:
+ l.rori r0,r0,0
+ l.rori r31,r31,63
+ l.rori r16,r16,32
+ l.rori r15,r15,31
+ l.rori r1,r1,1
+ l.rori r17,r0,23
+ l.rori r16,r31,42
+ l.rori r13,r21,12
+ .text
+l_add:
+ l.add r0,r0,r0
+ l.add r31,r31,r31
+ l.add r16,r16,r16
+ l.add r15,r15,r15
+ l.add r1,r1,r1
+ l.add r29,r7,r4
+ l.add r29,r10,r18
+ l.add r18,r22,r23
+ .text
+l_sub:
+ l.sub r0,r0,r0
+ l.sub r31,r31,r31
+ l.sub r16,r16,r16
+ l.sub r15,r15,r15
+ l.sub r1,r1,r1
+ l.sub r23,r26,r14
+ l.sub r10,r24,r15
+ l.sub r11,r4,r18
+ .text
+l_and:
+ l.and r0,r0,r0
+ l.and r31,r31,r31
+ l.and r16,r16,r16
+ l.and r15,r15,r15
+ l.and r1,r1,r1
+ l.and r0,r31,r25
+ l.and r30,r7,r19
+ l.and r19,r2,r26
+ .text
+l_or:
+ l.or r0,r0,r0
+ l.or r31,r31,r31
+ l.or r16,r16,r16
+ l.or r15,r15,r15
+ l.or r1,r1,r1
+ l.or r17,r10,r2
+ l.or r7,r19,r29
+ l.or r3,r17,r17
+ .text
+l_xor:
+ l.xor r0,r0,r0
+ l.xor r31,r31,r31
+ l.xor r16,r16,r16
+ l.xor r15,r15,r15
+ l.xor r1,r1,r1
+ l.xor r31,r5,r17
+ l.xor r22,r4,r5
+ l.xor r30,r20,r26
+ .text
+l_addc:
+ l.addc r0,r0,r0
+ l.addc r31,r31,r31
+ l.addc r16,r16,r16
+ l.addc r15,r15,r15
+ l.addc r1,r1,r1
+ l.addc r8,r26,r24
+ l.addc r18,r6,r4
+ l.addc r29,r0,r18
+ .text
+l_mul:
+ l.mul r0,r0,r0
+ l.mul r31,r31,r31
+ l.mul r16,r16,r16
+ l.mul r15,r15,r15
+ l.mul r1,r1,r1
+ l.mul r8,r25,r13
+ l.mul r8,r21,r29
+ l.mul r27,r3,r17
+ .text
+l_mulu:
+ l.mulu r0,r0,r0
+ l.mulu r31,r31,r31
+ l.mulu r16,r16,r16
+ l.mulu r15,r15,r15
+ l.mulu r1,r1,r1
+ l.mulu r26,r14,r16
+ l.mulu r1,r18,r11
+ l.mulu r14,r18,r17
+ .text
+l_div:
+ l.div r0,r0,r0
+ l.div r31,r31,r31
+ l.div r16,r16,r16
+ l.div r15,r15,r15
+ l.div r1,r1,r1
+ l.div r0,r2,r28
+ l.div r26,r7,r31
+ l.div r2,r18,r20
+ .text
+l_divu:
+ l.divu r0,r0,r0
+ l.divu r31,r31,r31
+ l.divu r16,r16,r16
+ l.divu r15,r15,r15
+ l.divu r1,r1,r1
+ l.divu r5,r4,r25
+ l.divu r8,r11,r29
+ l.divu r11,r19,r2
+ .text
+l_addi:
+ l.addi r0,r0,0
+ l.addi r31,r31,-1
+ l.addi r16,r16,-32768
+ l.addi r15,r15,32767
+ l.addi r1,r1,1
+ l.addi r14,r0,7020
+ l.addi r13,r14,14131
+ l.addi r14,r16,-26821
+ .text
+l_andi:
+ l.andi r0,r0,0
+ l.andi r31,r31,-1
+ l.andi r16,r16,-32768
+ l.andi r15,r15,32767
+ l.andi r1,r1,1
+ l.andi r27,r21,11927
+ l.andi r21,r23,12059
+ l.andi r30,r30,-31804
+ .text
+l_ori:
+ l.ori r0,r0,0
+ l.ori r31,r31,-1
+ l.ori r16,r16,-32768
+ l.ori r15,r15,32767
+ l.ori r1,r1,1
+ l.ori r22,r27,-10111
+ l.ori r17,r31,128
+ l.ori r13,r20,-12435
+ .text
+l_xori:
+ l.xori r0,r0,0
+ l.xori r31,r31,-1
+ l.xori r16,r16,-32768
+ l.xori r15,r15,32767
+ l.xori r1,r1,1
+ l.xori r18,r16,65535
+ l.xori r25,r13,-16331
+ l.xori r12,r29,-32727
+ .text
+l_muli:
+ l.muli r0,r0,0
+ l.muli r31,r31,-1
+ l.muli r16,r16,-32768
+ l.muli r15,r15,32767
+ l.muli r1,r1,1
+ l.muli r27,r7,-4731
+ l.muli r7,r20,65535
+ l.muli r24,r21,23219
+ .text
+l_addic:
+ l.addic r0,r0,0
+ l.addic r31,r31,-1
+ l.addic r16,r16,-32768
+ l.addic r15,r15,32767
+ l.addic r1,r1,1
+ l.addic r6,r22,-32700
+ l.addic r19,r9,65535
+ l.addic r27,r28,6891
+ .text
+l_sfgtu:
+ l.sfgtu r0,r0
+ l.sfgtu r31,r31
+ l.sfgtu r16,r16
+ l.sfgtu r15,r15
+ l.sfgtu r1,r1
+ l.sfgtu r8,r4
+ l.sfgtu r17,r21
+ l.sfgtu r6,r5
+ .text
+l_sfgeu:
+ l.sfgeu r0,r0
+ l.sfgeu r31,r31
+ l.sfgeu r16,r16
+ l.sfgeu r15,r15
+ l.sfgeu r1,r1
+ l.sfgeu r14,r12
+ l.sfgeu r22,r7
+ l.sfgeu r13,r1
+ .text
+l_sfltu:
+ l.sfltu r0,r0
+ l.sfltu r31,r31
+ l.sfltu r16,r16
+ l.sfltu r15,r15
+ l.sfltu r1,r1
+ l.sfltu r1,r13
+ l.sfltu r22,r30
+ l.sfltu r20,r6
+ .text
+l_sfleu:
+ l.sfleu r0,r0
+ l.sfleu r31,r31
+ l.sfleu r16,r16
+ l.sfleu r15,r15
+ l.sfleu r1,r1
+ l.sfleu r19,r8
+ l.sfleu r27,r15
+ l.sfleu r27,r3
+ .text
+l_sfgts:
+ l.sfgts r0,r0
+ l.sfgts r31,r31
+ l.sfgts r16,r16
+ l.sfgts r15,r15
+ l.sfgts r1,r1
+ l.sfgts r5,r5
+ l.sfgts r31,r5
+ l.sfgts r30,r18
+ .text
+l_sfges:
+ l.sfges r0,r0
+ l.sfges r31,r31
+ l.sfges r16,r16
+ l.sfges r15,r15
+ l.sfges r1,r1
+ l.sfges r17,r18
+ l.sfges r0,r9
+ l.sfges r22,r25
+ .text
+l_sflts:
+ l.sflts r0,r0
+ l.sflts r31,r31
+ l.sflts r16,r16
+ l.sflts r15,r15
+ l.sflts r1,r1
+ l.sflts r25,r24
+ l.sflts r23,r13
+ l.sflts r15,r8
+ .text
+l_sfles:
+ l.sfles r0,r0
+ l.sfles r31,r31
+ l.sfles r16,r16
+ l.sfles r15,r15
+ l.sfles r1,r1
+ l.sfles r17,r13
+ l.sfles r30,r25
+ l.sfles r0,r12
+ .text
+l_sfgtui:
+ l.sfgtui r0,0
+ l.sfgtui r31,65535
+ l.sfgtui r16,32768
+ l.sfgtui r15,32767
+ l.sfgtui r1,1
+ l.sfgtui r5,19233
+ l.sfgtui r23,37154
+ l.sfgtui r17,9693
+ .text
+l_sfgeui:
+ l.sfgeui r0,0
+ l.sfgeui r31,65535
+ l.sfgeui r16,32768
+ l.sfgeui r15,32767
+ l.sfgeui r1,1
+ l.sfgeui r17,60598
+ l.sfgeui r15,16403
+ l.sfgeui r6,61860
+ .text
+l_sfltui:
+ l.sfltui r0,0
+ l.sfltui r31,65535
+ l.sfltui r16,32768
+ l.sfltui r15,32767
+ l.sfltui r1,1
+ l.sfltui r3,52399
+ l.sfltui r24,19709
+ l.sfltui r10,830
+ .text
+l_sfleui:
+ l.sfleui r0,0
+ l.sfleui r31,65535
+ l.sfleui r16,32768
+ l.sfleui r15,32767
+ l.sfleui r1,1
+ l.sfleui r23,39782
+ l.sfleui r17,46807
+ l.sfleui r9,43137
+ .text
+l_sfgtsi:
+ l.sfgtsi r0,0
+ l.sfgtsi r31,-1
+ l.sfgtsi r16,-32768
+ l.sfgtsi r15,32767
+ l.sfgtsi r1,1
+ l.sfgtsi r13,-18814
+ l.sfgtsi r13,-10657
+ l.sfgtsi r28,-26667
+ .text
+l_sfgesi:
+ l.sfgesi r0,0
+ l.sfgesi r31,-1
+ l.sfgesi r16,-32768
+ l.sfgesi r15,32767
+ l.sfgesi r1,1
+ l.sfgesi r12,2376
+ l.sfgesi r9,32059
+ l.sfgesi r13,20696
+ .text
+l_sfltsi:
+ l.sfltsi r0,0
+ l.sfltsi r31,-1
+ l.sfltsi r16,-32768
+ l.sfltsi r15,32767
+ l.sfltsi r1,1
+ l.sfltsi r30,3021
+ l.sfltsi r5,-27813
+ l.sfltsi r28,-8816
+ .text
+l_sflesi:
+ l.sflesi r0,0
+ l.sflesi r31,-1
+ l.sflesi r16,-32768
+ l.sflesi r15,32767
+ l.sflesi r1,1
+ l.sflesi r18,11338
+ l.sflesi r29,18873
+ l.sflesi r28,26050
+ .text
+l_sfeq:
+ l.sfeq r0,r0
+ l.sfeq r31,r31
+ l.sfeq r16,r16
+ l.sfeq r15,r15
+ l.sfeq r1,r1
+ l.sfeq r28,r26
+ l.sfeq r13,r6
+ l.sfeq r26,r9
+ .text
+l_sfeqi:
+ l.sfeqi r0,0
+ l.sfeqi r31,-1
+ l.sfeqi r16,-32768
+ l.sfeqi r15,32767
+ l.sfeqi r1,1
+ l.sfeqi r10,25887
+ l.sfeqi r21,19894
+ l.sfeqi r18,-13419
+ .text
+l_sfne:
+ l.sfne r0,r0
+ l.sfne r31,r31
+ l.sfne r16,r16
+ l.sfne r15,r15
+ l.sfne r1,r1
+ l.sfne r18,r27
+ l.sfne r6,r18
+ l.sfne r0,r30
+ .text
+l_sfnei:
+ l.sfnei r0,0
+ l.sfnei r31,-1
+ l.sfnei r16,-32768
+ l.sfnei r15,32767
+ l.sfnei r1,1
+ l.sfnei r8,11410
+ l.sfnei r6,-19239
+ l.sfnei r20,-22783
+
+l_lo:
+ l.addi r1, r1, lo(0xdeadbeef)
+l_hi:
+ l.movhi r1, hi(0xdeadbeef)
+
+l_mac:
+ l.mac r1,r2
+l_maci:
+ l.maci r1,0
+ l.maci r2,-1
+ l.maci r2,32767
+ l.maci r2,-32768
--
1.7.10.4
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