[PATCH, AArch64] Fix disassembling of index register in ld/st register offset instructions

[Yufeng Zhang]

Hi,

This patch fixes a bug in printing the index register in the load/store 
register offset instruction when the index register is of register 31.

Instead of printing [xw]31, e.g.

ldr xzr, [sp,x31,sxtx #3]

it should print the [xw]zr, e.g.

ldr xzr, [sp,xzr,sxtx #3]

The patch passes regtest on aarch64-none-elf.

OK for the trunk and 2.24 branch?

Thanks,
Yufeng

opcodes/

	* aarch64-opc.c (print_register_offset_address): Call
	get_int_reg_name to prepare the register name.

gas/testsuite/

	* gas/aarch64/ldst-reg-reg-offset.s: Add tests.
	* gas/aarch64/ldst-reg-reg-offset.d: Update.
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