[PATCH 3/3] sparc: Add alternat save operands

[Mark Fortescue]

Hi All,

Please find attached a patch to add an alternate operand sequence to the 
save instruction.

It has been reported that the Sun assembler supports:

  save imm, regrs1, regrd

The patch add this support to GAS.

I have not yet checked if the Sun assembler realy does support this 
operand sequence (my SparcStation hosts are not available at the 
monent) but it would be consistent with other operand sequences that are 
suported and it is a trivual change.

Regards
         Mark Fortescue.

PS: Sorry the patch is attached. My mail client mangles in-text patches.
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diff -rupN binutils-26Aug2011-cvs.old/gas/testsuite/ChangeLog binutils-26Aug2011-cvs/gas/testsuite/ChangeLog
--- binutils-26Aug2011-cvs.old/gas/testsuite/ChangeLog	2011-08-19 20:27:52.000000000 +0100
+++ binutils-26Aug2011-cvs/gas/testsuite/ChangeLog	2011-08-26 21:00:26.000000000 +0100
@@ -1,3 +1,8 @@
+2011-08-26  Mark Fortescue <mark@mtfhpc.demon.co.uk>
+
+	* gas/sparc/save-args.[sd]: New test.
+	* gas/sparc/sparc.exp: Run new test.
+
 2011-08-26  Mark Fortescue <mark@mtfhpc.demon.co.uk>
 
 	* gas/sparc/ticc-imm-reg.[sd]: New test.
diff -rupN binutils-26Aug2011-cvs.old/gas/testsuite/gas/sparc/save-args.d binutils-26Aug2011-cvs/gas/testsuite/gas/sparc/save-args.d
--- binutils-26Aug2011-cvs.old/gas/testsuite/gas/sparc/save-args.d	1970-01-01 01:00:00.000000000 +0100
+++ binutils-26Aug2011-cvs/gas/testsuite/gas/sparc/save-args.d	2011-08-26 20:25:55.000000000 +0100
@@ -0,0 +1,12 @@
+#as: -Av8
+#objdump: -dr
+#name: software traps
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <foo>:
+   0:	81 e0 00 00 	save 
+   4:	9d e3 bf a0 	save  %sp, -96, %sp
+   8:	9d e3 bf a0 	save  %sp, -96, %sp
diff -rupN binutils-26Aug2011-cvs.old/gas/testsuite/gas/sparc/save-args.s binutils-26Aug2011-cvs/gas/testsuite/gas/sparc/save-args.s
--- binutils-26Aug2011-cvs.old/gas/testsuite/gas/sparc/save-args.s	1970-01-01 01:00:00.000000000 +0100
+++ binutils-26Aug2011-cvs/gas/testsuite/gas/sparc/save-args.s	2011-08-26 20:23:27.000000000 +0100
@@ -0,0 +1,6 @@
+! Test several forms of save argument
+	.text
+foo:
+	save
+	save	%sp, -96, %sp
+	save	-96, %sp, %sp
diff -rupN binutils-26Aug2011-cvs.old/gas/testsuite/gas/sparc/sparc.exp binutils-26Aug2011-cvs/gas/testsuite/gas/sparc/sparc.exp
--- binutils-26Aug2011-cvs.old/gas/testsuite/gas/sparc/sparc.exp	2011-08-05 17:52:48.000000000 +0100
+++ binutils-26Aug2011-cvs/gas/testsuite/gas/sparc/sparc.exp	2011-08-26 20:19:29.000000000 +0100
@@ -53,6 +53,7 @@ if [istarget sparc*-*-*] {
     run_dump_test "imm-plus-rreg"
     run_dump_test "ticc-imm-reg"
     run_dump_test "v8-movwr-imm"
+    run_dump_test "save-args"
     run_dump_test "v9branch1"
     run_dump_test "v9branch2"
     run_dump_test "v9branch3"
diff -rupN binutils-26Aug2011-cvs.old/opcodes/ChangeLog binutils-26Aug2011-cvs/opcodes/ChangeLog
--- binutils-26Aug2011-cvs.old/opcodes/ChangeLog	2011-08-22 16:25:05.000000000 +0100
+++ binutils-26Aug2011-cvs/opcodes/ChangeLog	2011-08-26 20:56:43.000000000 +0100
@@ -1,3 +1,8 @@
+2011-08-26  Mark Fortescue <mark@mtfhpc.demon.co.uk>
+
+	* sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd'
+	This has been reported as being accepted by the Sun assmebler.
+
 2011-08-26  Mark Fortescue <mark@mtfhpc.demon.co.uk>
 
 	The changes below bring 'mov' and 'ticc' instructions into line
diff -rupN binutils-26Aug2011-cvs.old/opcodes/sparc-opc.c binutils-26Aug2011-cvs/opcodes/sparc-opc.c
--- binutils-26Aug2011-cvs.old/opcodes/sparc-opc.c	2011-08-26 13:57:34.000000000 +0100
+++ binutils-26Aug2011-cvs/opcodes/sparc-opc.c	2011-08-26 16:02:59.000000000 +0100
@@ -684,6 +684,7 @@ const struct sparc_opcode sparc_opcodes[
 
 { "save",	F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0),	"1,2,d", 0, v6 },
 { "save",	F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1),		"1,i,d", 0, v6 },
+{ "save",	F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1),		"i,1,d", 0, v6 }, /* Sun assembler compatibility */
 { "save",	0x81e00000,	~0x81e00000,			"", F_ALIAS, v6 },
 
 { "ret",  F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8),	       "", F_UNBR|F_DELAYED, v6 }, /* jmpl %i7+8,%g0 */