[PATCH] Add LWP support for upcoming AMD Orochi processor

[H.J. Lu]

On Fri, Nov 6, 2009 at 12:22 PM, Sebastian Pop <sebpop@gmail.com> wrote:
> Hi,
>
> I would like to commit the attached patch that fixes a problem
> with LWP instructions containing registers from the range r8 to r15.
>
> 2009-11-06  Sebastian Pop  <sebastian.pop@amd.com>
>
>        * opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
>        reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
>        B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
>        the xop_table.
>        (get_valid_dis386): Removed unused condition (from cut/n/paste) for
>        XOP instructions.
>
>        * gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain
>        patterns with r[8-15] registers.
>        * gas/testsuite/gas/i386/x86-64-lwp.d: Same.
>
> I tested this patch on amd64-linux with make -k check and on simnow.
> Ok to commit?
>

OK.

-- 
H.J.