[PATCH] Add support for Xilinx FP/APU to PowerPC

[Michael Eager]

Xilinx's PowerPC 405 and 440 processors have an Auxiliary
Processor Unit (APU) co-processor which is used to implement
floating point or other operations.  This patch adds support
for the instructions used to control the APU.  This also
separates the definitions of PPC403 and PPC405.


2008-04-21  Michael J. Eager  <eager@eagercon.com>

	* gas/config/tc-ppc.c: Add -m405, split definition
         of PPC403 & PPC405

2008-04-21  Michael J. Eager  <eager@eagercon.com>

         * include/opcode/ppc.h: PPC_OPCODE_405: New CPU macro
	PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI:
         New field macros

2008-04-21  Michael J. Eager  <eager@eagercon.com>

	* opcodes/ppc-dis.c: Disassemble FSL/FCR/UDI fields
	* opcodes/ppc-opc.c: FCRT, FSL, UDI_R[TABC]: New field macros
	APU_MASK, APU_RT_MASK, APU_RA_MASK: New insn macros
	PPC405: New processor macro
	Add get/put/udi instructions


-- 
Michael Eager	 eager@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306  650-325-8077
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