Patch: mips opcodes: Fix lwxc1.

[David Daney]

The mips lwxc1 opcode was improperly marked as working on double 
precision floating point registers.  It works on single precision registers.

For the sb1 target, gcc will emit this instruction for load in to odd 
numbered floating point registers.  This was causing gas to emit 
warnings which in turn caused more than 50 FAILS in the gcc testsuite.

See:
http://gcc.gnu.org/ml/gcc-testresults/2007-09/msg01453.html
http://gcc.gnu.org/ml/gcc-testresults/2007-09/msg01401.html

Tested on mipsel-linux cross with no regressions.

OK to commit to HEAD and 2.18?

opcodes/
2007-10-04  David Daney  <ddaney@avtrex.com>

    * mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S
    registers.


gas/testsuite/
2007-10-04  David Daney  <ddaney@avtrex.com>

    * gas/mips/odd-float.d, gas/mips/odd-float.s: New test.
    * gas/mips/mips.exp: Run it.

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