h8300 relax problem

[Dhananjay R. Deshpande]

Hi,

Thanks Richard for fixing the various relaxation problems.

For H8/300, address range 0xFF00 to 0xFFFF is eight bit addressable. 

So for test case below - 

        .global _start
_start:
        mov.b r1l,@0xFF10
        rts
        .end

mov.b r1l, @0xFF10 can be relaxed into mov.b r1l,@0x10:8

Looking at the assembler output with objdump -r doesn't show any reloc.

The patch below generates a reloc and when linked with -relax option the linker 
generates mov.b r1l,@0x10:8

Please check it in if it is a correct fix.

I think for H8S, the bit instructions ( bset, bclr, etc ) with absolute address can 
also be relaxed. Is there any plan to support these? The current relocs can be used
or do we have to add new relocs?

Regards,
Dhananjay

Changelog - 
2003-07-14  Dhananjay Deshpande  <dhananjayd@kpitcummins.com>

	* gas/config/tc-h8300.c (do_a_fix_imm): Fix generation R_MOV16B1 for H8/300

================================================================================
--- tc-h8300.c.old	Mon Jul 14 15:20:10 2003
+++ tc-h8300.c	Mon Jul 14 16:01:13 2003
@@ -1374,6 +1374,11 @@ do_a_fix_imm (offset, nibble, operand, r
 	  check_operand (operand, 0xffff, t);
 	  bytes[0] |= operand->exp.X_add_number >> 8;
 	  bytes[1] |= operand->exp.X_add_number >> 0;
+	  if (relaxmode != 0)
+	    {
+	      idx = (relaxmode == 2) ? R_MOV16B1 : R_RELWORD;
+	      fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
+	    }
 	  break;
 	case L_24:
 	  check_operand (operand, 0xffffff, t);
================================================================================