handling of `ldrt' in ARM gas
Philip Blundell
pb@futuretv.com
Mon Feb 12 05:33:00 GMT 2001
I've checked this patch in to fix an inconsistency where
ldrt r0, [r0], #0
would elicit a warning, but
ldrt r0, [r0]
would not. These two constructs actually generate identical opcodes and have
UNPREDICTABLE results according to the ARM manual.
p.
Index: tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.72
diff -u -r1.72 tc-arm.c
--- tc-arm.c 2001/01/19 04:35:29 1.72
+++ tc-arm.c 2001/02/12 13:30:29
@@ -4323,9 +4323,16 @@
if (ldst_extend (&str, halfword) == FAIL)
return;
if (conflict_reg)
- as_warn (_("%s register same as write-back base"),
- ((inst.instruction & LOAD_BIT)
- ? _("destination") : _("source")));
+ {
+ if (flags & TRANS_BIT)
+ as_warn (_("Rn and Rd must be different in %s"),
+ ((inst.instruction & LOAD_BIT)
+ ? "LDRT" : "STRT"));
+ else
+ as_warn (_("%s register same as write-back base"),
+ ((inst.instruction & LOAD_BIT)
+ ? _("destination") : _("source")));
+ }
}
else
{
@@ -4346,8 +4353,15 @@
}
flags |= INDEX_UP;
- if (! (flags & TRANS_BIT))
- pre_inc = 1;
+ if (flags & TRANS_BIT)
+ {
+ if (conflict_reg)
+ as_warn (_("Rn and Rd must be different in %s"),
+ ((inst.instruction & LOAD_BIT)
+ ? "LDRT" : "STRT"));
+ }
+ else
+ pre_inc = 1;
}
}
else
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