[binutils-gdb] aarch64: Add support for POE2 PLBI instruction
SRINATH PARVATHANENI
sripar01@sourceware.org
Mon Jan 5 17:51:43 GMT 2026
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=43d523e207616e970814ee9c5ca18e0b4eb89be6
commit 43d523e207616e970814ee9c5ca18e0b4eb89be6
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date: Mon Jan 5 17:50:55 2026 +0000
aarch64: Add support for POE2 PLBI instruction
This patch adds support for PLB invalidate operation (PLBI) instruction
and the corresponding system registers as operand (<plbi_op>).
Syntax: PLBI <plbi_op>{, <Xt>}
This instruction is an alias to "SYS #<op1>, C10, <Cm>, #<op2>{, <Xt>}"
and PLBI being the preferred disassembly.
The following list of system registers are supported in this patch for the
PLBI instructions enabled by "+poe2" flag and also the "nxs" variants of
these system registers are enabled by "+poe2+xs" flag.
* alle1
* alle1is
* alle1os
* alle2
* alle2is
* alle2os
* alle3
* alle3is
* alle3os
* aside1
* aside1is
* aside1os
* permae1
* permae1is
* permae1os
* perme1
* perme1is
* perme1os
* perme2
* perme2is
* perme2os
* perme3
* perme3is
* perme3os
* vmalle1
* vmalle1is
* vmalle1os
Diff:
---
gas/config/tc-aarch64.c | 12 ++++
gas/testsuite/gas/aarch64/plbi-1.d | 93 ++++++++++++++++++++++++
gas/testsuite/gas/aarch64/plbi-1.s | 11 +++
gas/testsuite/gas/aarch64/plbi-invalid-1.d | 3 +
gas/testsuite/gas/aarch64/plbi-invalid-1.l | 79 +++++++++++++++++++++
gas/testsuite/gas/aarch64/plbi-invalid-1.s | 11 +++
gas/testsuite/gas/aarch64/plbi-invalid-2.d | 3 +
gas/testsuite/gas/aarch64/plbi-invalid-2.l | 109 +++++++++++++++++++++++++++++
gas/testsuite/gas/aarch64/plbi-invalid-2.s | 54 ++++++++++++++
gas/testsuite/gas/aarch64/plbi-invalid-3.d | 3 +
gas/testsuite/gas/aarch64/plbi-invalid-3.l | 43 ++++++++++++
gas/testsuite/gas/aarch64/plbi-invalid-3.s | 27 +++++++
include/opcode/aarch64.h | 2 +
opcodes/aarch64-asm-2.c | 2 +
opcodes/aarch64-dis-2.c | 6 +-
opcodes/aarch64-dis.c | 1 +
opcodes/aarch64-opc-2.c | 1 +
opcodes/aarch64-opc.c | 38 ++++++++++
opcodes/aarch64-tbl-2.h | 1 +
opcodes/aarch64-tbl.h | 3 +
20 files changed, 501 insertions(+), 1 deletion(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 12f27be530e..6a03dfe41ec 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -558,6 +558,7 @@ static htab_t aarch64_sys_regs_ic_hsh;
static htab_t aarch64_sys_regs_dc_hsh;
static htab_t aarch64_sys_regs_at_hsh;
static htab_t aarch64_sys_regs_tlbi_hsh;
+static htab_t aarch64_sys_regs_plbi_hsh;
static htab_t aarch64_sys_regs_sr_hsh;
static htab_t aarch64_reg_hsh;
static htab_t aarch64_barrier_opt_hsh;
@@ -8100,6 +8101,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
parse_sys_ins_reg (&str, aarch64_sys_regs_tlbi_hsh, false);
goto sys_reg_ins;
+ case AARCH64_OPND_SYSREG_PLBI:
+ inst.base.operands[i].sysins_op =
+ parse_sys_ins_reg (&str, aarch64_sys_regs_plbi_hsh, false);
+ goto sys_reg_ins;
+
case AARCH64_OPND_SYSREG_TLBIP:
inst.base.operands[i].sysins_op =
parse_sys_ins_reg (&str, aarch64_sys_regs_tlbi_hsh, true);
@@ -10470,6 +10476,7 @@ md_begin (void)
aarch64_sys_regs_dc_hsh = str_htab_create ();
aarch64_sys_regs_at_hsh = str_htab_create ();
aarch64_sys_regs_tlbi_hsh = str_htab_create ();
+ aarch64_sys_regs_plbi_hsh = str_htab_create ();
aarch64_sys_regs_sr_hsh = str_htab_create ();
aarch64_reg_hsh = str_htab_create ();
aarch64_barrier_opt_hsh = str_htab_create ();
@@ -10511,6 +10518,11 @@ md_begin (void)
aarch64_sys_regs_tlbi[i].name,
aarch64_sys_regs_tlbi + i);
+ for (i = 0; aarch64_sys_regs_plbi[i].name != NULL; i++)
+ sysreg_hash_insert (aarch64_sys_regs_plbi_hsh,
+ aarch64_sys_regs_plbi[i].name,
+ aarch64_sys_regs_plbi + i);
+
for (i = 0; aarch64_sys_regs_sr[i].name != NULL; i++)
sysreg_hash_insert (aarch64_sys_regs_sr_hsh,
aarch64_sys_regs_sr[i].name,
diff --git a/gas/testsuite/gas/aarch64/plbi-1.d b/gas/testsuite/gas/aarch64/plbi-1.d
new file mode 100644
index 00000000000..034d9513564
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-1.d
@@ -0,0 +1,93 @@
+#as: -march=armv8-a+poe2+xs
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+.*: d508a11f plbi vmalle1os
+.*: d508a91f plbi vmalle1osnxs
+.*: d508a31f plbi vmalle1is
+.*: d508ab1f plbi vmalle1isnxs
+.*: d508a71f plbi vmalle1
+.*: d508af1f plbi vmalle1nxs
+.*: d50ca11f plbi alle2os
+.*: d50ca91f plbi alle2osnxs
+.*: d50ca19f plbi alle1os
+.*: d50ca99f plbi alle1osnxs
+.*: d50ca31f plbi alle2is
+.*: d50cab1f plbi alle2isnxs
+.*: d50ca39f plbi alle1is
+.*: d50cab9f plbi alle1isnxs
+.*: d50ca71f plbi alle2
+.*: d50caf1f plbi alle2nxs
+.*: d50ca79f plbi alle1
+.*: d50caf9f plbi alle1nxs
+.*: d50ea11f plbi alle3os
+.*: d50ea91f plbi alle3osnxs
+.*: d50ea31f plbi alle3is
+.*: d50eab1f plbi alle3isnxs
+.*: d50ea71f plbi alle3
+.*: d50eaf1f plbi alle3nxs
+.*: d508a120 plbi perme1os, x0
+.*: d508a920 plbi perme1osnxs, x0
+.*: d508a13f plbi perme1os, xzr
+.*: d508a93f plbi perme1osnxs, xzr
+.*: d508a140 plbi aside1os, x0
+.*: d508a940 plbi aside1osnxs, x0
+.*: d508a15f plbi aside1os, xzr
+.*: d508a95f plbi aside1osnxs, xzr
+.*: d508a160 plbi permae1os, x0
+.*: d508a960 plbi permae1osnxs, x0
+.*: d508a17f plbi permae1os, xzr
+.*: d508a97f plbi permae1osnxs, xzr
+.*: d508a320 plbi perme1is, x0
+.*: d508ab20 plbi perme1isnxs, x0
+.*: d508a33f plbi perme1is, xzr
+.*: d508ab3f plbi perme1isnxs, xzr
+.*: d508a340 plbi aside1is, x0
+.*: d508ab40 plbi aside1isnxs, x0
+.*: d508a35f plbi aside1is, xzr
+.*: d508ab5f plbi aside1isnxs, xzr
+.*: d508a360 plbi permae1is, x0
+.*: d508ab60 plbi permae1isnxs, x0
+.*: d508a37f plbi permae1is, xzr
+.*: d508ab7f plbi permae1isnxs, xzr
+.*: d508a720 plbi perme1, x0
+.*: d508af20 plbi perme1nxs, x0
+.*: d508a73f plbi perme1, xzr
+.*: d508af3f plbi perme1nxs, xzr
+.*: d508a740 plbi aside1, x0
+.*: d508af40 plbi aside1nxs, x0
+.*: d508a75f plbi aside1, xzr
+.*: d508af5f plbi aside1nxs, xzr
+.*: d508a760 plbi permae1, x0
+.*: d508af60 plbi permae1nxs, x0
+.*: d508a77f plbi permae1, xzr
+.*: d508af7f plbi permae1nxs, xzr
+.*: d50ca120 plbi perme2os, x0
+.*: d50ca920 plbi perme2osnxs, x0
+.*: d50ca13f plbi perme2os, xzr
+.*: d50ca93f plbi perme2osnxs, xzr
+.*: d50ca320 plbi perme2is, x0
+.*: d50cab20 plbi perme2isnxs, x0
+.*: d50ca33f plbi perme2is, xzr
+.*: d50cab3f plbi perme2isnxs, xzr
+.*: d50ca720 plbi perme2, x0
+.*: d50caf20 plbi perme2nxs, x0
+.*: d50ca73f plbi perme2, xzr
+.*: d50caf3f plbi perme2nxs, xzr
+.*: d50ea120 plbi perme3os, x0
+.*: d50ea920 plbi perme3osnxs, x0
+.*: d50ea13f plbi perme3os, xzr
+.*: d50ea93f plbi perme3osnxs, xzr
+.*: d50ea320 plbi perme3is, x0
+.*: d50eab20 plbi perme3isnxs, x0
+.*: d50ea33f plbi perme3is, xzr
+.*: d50eab3f plbi perme3isnxs, xzr
+.*: d50ea720 plbi perme3, x0
+.*: d50eaf20 plbi perme3nxs, x0
+.*: d50ea73f plbi perme3, xzr
+.*: d50eaf3f plbi perme3nxs, xzr
diff --git a/gas/testsuite/gas/aarch64/plbi-1.s b/gas/testsuite/gas/aarch64/plbi-1.s
new file mode 100644
index 00000000000..3661a0d8d92
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-1.s
@@ -0,0 +1,11 @@
+ .irp plbi_op vmalle1os,vmalle1is,vmalle1,alle2os,alle1os,alle2is,alle1is,alle2,alle1,alle3os,alle3is,alle3
+ plbi \plbi_op
+ plbi \plbi_op\()nxs
+ .endr
+
+ .irp plbi_op perme1os,aside1os,permae1os,perme1is,aside1is,permae1is,perme1,aside1,permae1,perme2os,perme2is,perme2,perme3os,perme3is,perme3
+ .irp rt, x0, xzr
+ plbi \plbi_op, \rt
+ plbi \plbi_op\()nxs, \rt
+ .endr
+ .endr
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-1.d b/gas/testsuite/gas/aarch64/plbi-invalid-1.d
new file mode 100644
index 00000000000..7ed6137f083
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-1.d
@@ -0,0 +1,3 @@
+#name: Invalid poe2 PLBI instructions.
+#as: -march=armv8-a+poe2+xs
+#error_output: plbi-invalid-1.l
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-1.l b/gas/testsuite/gas/aarch64/plbi-invalid-1.l
new file mode 100644
index 00000000000..3cd50dd9bbf
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-1.l
@@ -0,0 +1,79 @@
+.*: Assembler messages:
+.*: Error: missing register at operand 2 -- `plbi perme1os'
+.*: Error: missing register at operand 2 -- `plbi perme1osnxs'
+.*: Error: missing register at operand 2 -- `plbi aside1os'
+.*: Error: missing register at operand 2 -- `plbi aside1osnxs'
+.*: Error: missing register at operand 2 -- `plbi permae1os'
+.*: Error: missing register at operand 2 -- `plbi permae1osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme1is'
+.*: Error: missing register at operand 2 -- `plbi perme1isnxs'
+.*: Error: missing register at operand 2 -- `plbi aside1is'
+.*: Error: missing register at operand 2 -- `plbi aside1isnxs'
+.*: Error: missing register at operand 2 -- `plbi permae1is'
+.*: Error: missing register at operand 2 -- `plbi permae1isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme1'
+.*: Error: missing register at operand 2 -- `plbi perme1nxs'
+.*: Error: missing register at operand 2 -- `plbi aside1'
+.*: Error: missing register at operand 2 -- `plbi aside1nxs'
+.*: Error: missing register at operand 2 -- `plbi permae1'
+.*: Error: missing register at operand 2 -- `plbi permae1nxs'
+.*: Error: missing register at operand 2 -- `plbi perme2os'
+.*: Error: missing register at operand 2 -- `plbi perme2osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme2is'
+.*: Error: missing register at operand 2 -- `plbi perme2isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme2'
+.*: Error: missing register at operand 2 -- `plbi perme2nxs'
+.*: Error: missing register at operand 2 -- `plbi perme3os'
+.*: Error: missing register at operand 2 -- `plbi perme3osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme3is'
+.*: Error: missing register at operand 2 -- `plbi perme3isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme3'
+.*: Error: missing register at operand 2 -- `plbi perme3nxs'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1os,x0'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1osnxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1os,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1osnxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1is,x0'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1isnxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1is,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1isnxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1,x0'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1nxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi vmalle1nxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle2os,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle2osnxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle2os,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle2osnxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle1os,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle1osnxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle1os,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle1osnxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle2is,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle2isnxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle2is,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle2isnxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle1is,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle1isnxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle1is,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle1isnxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle2,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle2nxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle2,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle2nxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle1,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle1nxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle1,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle1nxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle3os,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle3osnxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle3os,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle3osnxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle3is,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle3isnxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle3is,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle3isnxs,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle3,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle3nxs,x0'
+.*: Error: extraneous register at operand 2 -- `plbi alle3,xzr'
+.*: Error: extraneous register at operand 2 -- `plbi alle3nxs,xzr'
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-1.s b/gas/testsuite/gas/aarch64/plbi-invalid-1.s
new file mode 100644
index 00000000000..8f52faf2bfd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-1.s
@@ -0,0 +1,11 @@
+ .irp plbi_op perme1os,aside1os,permae1os,perme1is,aside1is,permae1is,perme1,aside1,permae1,perme2os,perme2is,perme2,perme3os,perme3is,perme3
+ plbi \plbi_op
+ plbi \plbi_op\()nxs
+ .endr
+
+ .irp plbi_op vmalle1os,vmalle1is,vmalle1,alle2os,alle1os,alle2is,alle1is,alle2,alle1,alle3os,alle3is,alle3
+ .irp rt, x0, xzr
+ plbi \plbi_op, \rt
+ plbi \plbi_op\()nxs, \rt
+ .endr
+ .endr
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-2.d b/gas/testsuite/gas/aarch64/plbi-invalid-2.d
new file mode 100644
index 00000000000..d2cbead6459
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-2.d
@@ -0,0 +1,3 @@
+#name: valid PLBI instructions without +poe2 and +xs flags.
+#as: -march=armv8-a
+#error_output: plbi-invalid-2.l
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-2.l b/gas/testsuite/gas/aarch64/plbi-invalid-2.l
new file mode 100644
index 00000000000..21379095c11
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-2.l
@@ -0,0 +1,109 @@
+.*: Assembler messages:
+.*: Error: selected processor does not support system register name 'alle1'
+.*: Error: selected processor does not support `plbi alle1'
+.*: Error: selected processor does not support system register name 'alle1is'
+.*: Error: selected processor does not support `plbi alle1is'
+.*: Error: selected processor does not support system register name 'alle1isnxs'
+.*: Error: selected processor does not support `plbi alle1isnxs'
+.*: Error: selected processor does not support system register name 'alle1nxs'
+.*: Error: selected processor does not support `plbi alle1nxs'
+.*: Error: selected processor does not support system register name 'alle1os'
+.*: Error: selected processor does not support `plbi alle1os'
+.*: Error: selected processor does not support system register name 'alle1osnxs'
+.*: Error: selected processor does not support `plbi alle1osnxs'
+.*: Error: selected processor does not support system register name 'alle2'
+.*: Error: selected processor does not support `plbi alle2'
+.*: Error: selected processor does not support system register name 'alle2is'
+.*: Error: selected processor does not support `plbi alle2is'
+.*: Error: selected processor does not support system register name 'alle2isnxs'
+.*: Error: selected processor does not support `plbi alle2isnxs'
+.*: Error: selected processor does not support system register name 'alle2nxs'
+.*: Error: selected processor does not support `plbi alle2nxs'
+.*: Error: selected processor does not support system register name 'alle2os'
+.*: Error: selected processor does not support `plbi alle2os'
+.*: Error: selected processor does not support system register name 'alle2osnxs'
+.*: Error: selected processor does not support `plbi alle2osnxs'
+.*: Error: selected processor does not support system register name 'alle3'
+.*: Error: selected processor does not support `plbi alle3'
+.*: Error: selected processor does not support system register name 'alle3is'
+.*: Error: selected processor does not support `plbi alle3is'
+.*: Error: selected processor does not support system register name 'alle3isnxs'
+.*: Error: selected processor does not support `plbi alle3isnxs'
+.*: Error: selected processor does not support system register name 'alle3nxs'
+.*: Error: selected processor does not support `plbi alle3nxs'
+.*: Error: selected processor does not support system register name 'alle3os'
+.*: Error: selected processor does not support `plbi alle3os'
+.*: Error: selected processor does not support system register name 'alle3osnxs'
+.*: Error: selected processor does not support `plbi alle3osnxs'
+.*: Error: selected processor does not support system register name 'aside1'
+.*: Error: missing register at operand 2 -- `plbi aside1'
+.*: Error: selected processor does not support system register name 'aside1is'
+.*: Error: missing register at operand 2 -- `plbi aside1is'
+.*: Error: selected processor does not support system register name 'aside1isnxs'
+.*: Error: missing register at operand 2 -- `plbi aside1isnxs'
+.*: Error: selected processor does not support system register name 'aside1nxs'
+.*: Error: missing register at operand 2 -- `plbi aside1nxs'
+.*: Error: selected processor does not support system register name 'aside1os'
+.*: Error: missing register at operand 2 -- `plbi aside1os'
+.*: Error: selected processor does not support system register name 'aside1osnxs'
+.*: Error: missing register at operand 2 -- `plbi aside1osnxs'
+.*: Error: selected processor does not support system register name 'permae1'
+.*: Error: missing register at operand 2 -- `plbi permae1'
+.*: Error: selected processor does not support system register name 'permae1is'
+.*: Error: missing register at operand 2 -- `plbi permae1is'
+.*: Error: selected processor does not support system register name 'permae1isnxs'
+.*: Error: missing register at operand 2 -- `plbi permae1isnxs'
+.*: Error: selected processor does not support system register name 'permae1nxs'
+.*: Error: missing register at operand 2 -- `plbi permae1nxs'
+.*: Error: selected processor does not support system register name 'permae1os'
+.*: Error: missing register at operand 2 -- `plbi permae1os'
+.*: Error: selected processor does not support system register name 'permae1osnxs'
+.*: Error: missing register at operand 2 -- `plbi permae1osnxs'
+.*: Error: selected processor does not support system register name 'perme1'
+.*: Error: missing register at operand 2 -- `plbi perme1'
+.*: Error: selected processor does not support system register name 'perme1is'
+.*: Error: missing register at operand 2 -- `plbi perme1is'
+.*: Error: selected processor does not support system register name 'perme1isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme1isnxs'
+.*: Error: selected processor does not support system register name 'perme1nxs'
+.*: Error: missing register at operand 2 -- `plbi perme1nxs'
+.*: Error: selected processor does not support system register name 'perme1os'
+.*: Error: missing register at operand 2 -- `plbi perme1os'
+.*: Error: selected processor does not support system register name 'perme1osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme1osnxs'
+.*: Error: selected processor does not support system register name 'perme2'
+.*: Error: missing register at operand 2 -- `plbi perme2'
+.*: Error: selected processor does not support system register name 'perme2is'
+.*: Error: missing register at operand 2 -- `plbi perme2is'
+.*: Error: selected processor does not support system register name 'perme2isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme2isnxs'
+.*: Error: selected processor does not support system register name 'perme2nxs'
+.*: Error: missing register at operand 2 -- `plbi perme2nxs'
+.*: Error: selected processor does not support system register name 'perme2os'
+.*: Error: missing register at operand 2 -- `plbi perme2os'
+.*: Error: selected processor does not support system register name 'perme2osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme2osnxs'
+.*: Error: selected processor does not support system register name 'perme3'
+.*: Error: missing register at operand 2 -- `plbi perme3'
+.*: Error: selected processor does not support system register name 'perme3is'
+.*: Error: missing register at operand 2 -- `plbi perme3is'
+.*: Error: selected processor does not support system register name 'perme3isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme3isnxs'
+.*: Error: selected processor does not support system register name 'perme3nxs'
+.*: Error: missing register at operand 2 -- `plbi perme3nxs'
+.*: Error: selected processor does not support system register name 'perme3os'
+.*: Error: missing register at operand 2 -- `plbi perme3os'
+.*: Error: selected processor does not support system register name 'perme3osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme3osnxs'
+.*: Error: selected processor does not support system register name 'vmalle1'
+.*: Error: selected processor does not support `plbi vmalle1'
+.*: Error: selected processor does not support system register name 'vmalle1is'
+.*: Error: selected processor does not support `plbi vmalle1is'
+.*: Error: selected processor does not support system register name 'vmalle1isnxs'
+.*: Error: selected processor does not support `plbi vmalle1isnxs'
+.*: Error: selected processor does not support system register name 'vmalle1nxs'
+.*: Error: selected processor does not support `plbi vmalle1nxs'
+.*: Error: selected processor does not support system register name 'vmalle1os'
+.*: Error: selected processor does not support `plbi vmalle1os'
+.*: Error: selected processor does not support system register name 'vmalle1osnxs'
+.*: Error: selected processor does not support `plbi vmalle1osnxs'
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-2.s b/gas/testsuite/gas/aarch64/plbi-invalid-2.s
new file mode 100644
index 00000000000..94378f5a19d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-2.s
@@ -0,0 +1,54 @@
+ plbi alle1
+ plbi alle1is
+ plbi alle1isnxs
+ plbi alle1nxs
+ plbi alle1os
+ plbi alle1osnxs
+ plbi alle2
+ plbi alle2is
+ plbi alle2isnxs
+ plbi alle2nxs
+ plbi alle2os
+ plbi alle2osnxs
+ plbi alle3
+ plbi alle3is
+ plbi alle3isnxs
+ plbi alle3nxs
+ plbi alle3os
+ plbi alle3osnxs
+ plbi aside1
+ plbi aside1is
+ plbi aside1isnxs
+ plbi aside1nxs
+ plbi aside1os
+ plbi aside1osnxs
+ plbi permae1
+ plbi permae1is
+ plbi permae1isnxs
+ plbi permae1nxs
+ plbi permae1os
+ plbi permae1osnxs
+ plbi perme1
+ plbi perme1is
+ plbi perme1isnxs
+ plbi perme1nxs
+ plbi perme1os
+ plbi perme1osnxs
+ plbi perme2
+ plbi perme2is
+ plbi perme2isnxs
+ plbi perme2nxs
+ plbi perme2os
+ plbi perme2osnxs
+ plbi perme3
+ plbi perme3is
+ plbi perme3isnxs
+ plbi perme3nxs
+ plbi perme3os
+ plbi perme3osnxs
+ plbi vmalle1
+ plbi vmalle1is
+ plbi vmalle1isnxs
+ plbi vmalle1nxs
+ plbi vmalle1os
+ plbi vmalle1osnxs
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-3.d b/gas/testsuite/gas/aarch64/plbi-invalid-3.d
new file mode 100644
index 00000000000..94e0db8d7a0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-3.d
@@ -0,0 +1,3 @@
+#name: valid PLBI instructions without +xs flags.
+#as: -march=armv8-a+poe2
+#error_output: plbi-invalid-3.l
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-3.l b/gas/testsuite/gas/aarch64/plbi-invalid-3.l
new file mode 100644
index 00000000000..e98b63c8d74
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-3.l
@@ -0,0 +1,43 @@
+.*: Assembler messages:
+.*: Error: selected processor does not support system register name 'alle1isnxs'
+.*: Error: selected processor does not support system register name 'alle1nxs'
+.*: Error: selected processor does not support system register name 'alle1osnxs'
+.*: Error: selected processor does not support system register name 'alle2isnxs'
+.*: Error: selected processor does not support system register name 'alle2nxs'
+.*: Error: selected processor does not support system register name 'alle2osnxs'
+.*: Error: selected processor does not support system register name 'alle3isnxs'
+.*: Error: selected processor does not support system register name 'alle3nxs'
+.*: Error: selected processor does not support system register name 'alle3osnxs'
+.*: Error: selected processor does not support system register name 'aside1isnxs'
+.*: Error: missing register at operand 2 -- `plbi aside1isnxs'
+.*: Error: selected processor does not support system register name 'aside1nxs'
+.*: Error: missing register at operand 2 -- `plbi aside1nxs'
+.*: Error: selected processor does not support system register name 'aside1osnxs'
+.*: Error: missing register at operand 2 -- `plbi aside1osnxs'
+.*: Error: selected processor does not support system register name 'permae1isnxs'
+.*: Error: missing register at operand 2 -- `plbi permae1isnxs'
+.*: Error: selected processor does not support system register name 'permae1nxs'
+.*: Error: missing register at operand 2 -- `plbi permae1nxs'
+.*: Error: selected processor does not support system register name 'permae1osnxs'
+.*: Error: missing register at operand 2 -- `plbi permae1osnxs'
+.*: Error: selected processor does not support system register name 'perme1isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme1isnxs'
+.*: Error: selected processor does not support system register name 'perme1nxs'
+.*: Error: missing register at operand 2 -- `plbi perme1nxs'
+.*: Error: selected processor does not support system register name 'perme1osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme1osnxs'
+.*: Error: selected processor does not support system register name 'perme2isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme2isnxs'
+.*: Error: selected processor does not support system register name 'perme2nxs'
+.*: Error: missing register at operand 2 -- `plbi perme2nxs'
+.*: Error: selected processor does not support system register name 'perme2osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme2osnxs'
+.*: Error: selected processor does not support system register name 'perme3isnxs'
+.*: Error: missing register at operand 2 -- `plbi perme3isnxs'
+.*: Error: selected processor does not support system register name 'perme3nxs'
+.*: Error: missing register at operand 2 -- `plbi perme3nxs'
+.*: Error: selected processor does not support system register name 'perme3osnxs'
+.*: Error: missing register at operand 2 -- `plbi perme3osnxs'
+.*: Error: selected processor does not support system register name 'vmalle1isnxs'
+.*: Error: selected processor does not support system register name 'vmalle1nxs'
+.*: Error: selected processor does not support system register name 'vmalle1osnxs'
diff --git a/gas/testsuite/gas/aarch64/plbi-invalid-3.s b/gas/testsuite/gas/aarch64/plbi-invalid-3.s
new file mode 100644
index 00000000000..3b9f8852d7d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/plbi-invalid-3.s
@@ -0,0 +1,27 @@
+ plbi alle1isnxs
+ plbi alle1nxs
+ plbi alle1osnxs
+ plbi alle2isnxs
+ plbi alle2nxs
+ plbi alle2osnxs
+ plbi alle3isnxs
+ plbi alle3nxs
+ plbi alle3osnxs
+ plbi aside1isnxs
+ plbi aside1nxs
+ plbi aside1osnxs
+ plbi permae1isnxs
+ plbi permae1nxs
+ plbi permae1osnxs
+ plbi perme1isnxs
+ plbi perme1nxs
+ plbi perme1osnxs
+ plbi perme2isnxs
+ plbi perme2nxs
+ plbi perme2osnxs
+ plbi perme3isnxs
+ plbi perme3nxs
+ plbi perme3osnxs
+ plbi vmalle1isnxs
+ plbi vmalle1nxs
+ plbi vmalle1osnxs
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 5f840a44ad6..b885a06f526 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -748,6 +748,7 @@ enum aarch64_opnd
AARCH64_OPND_SYSREG_IC, /* System register <ic_op> operand. */
AARCH64_OPND_SYSREG_TLBI, /* System register <tlbi_op> operand. */
AARCH64_OPND_SYSREG_TLBIP, /* System register <tlbip_op> operand. */
+ AARCH64_OPND_SYSREG_PLBI, /* System register <plbi_op> operand. */
AARCH64_OPND_SYSREG_SR, /* System register RCTX operand. */
AARCH64_OPND_BARRIER, /* Barrier operand. */
AARCH64_OPND_BARRIER_DSB_NXS, /* Barrier operand for DSB nXS variant. */
@@ -1672,6 +1673,7 @@ extern const aarch64_sys_ins_reg aarch64_sys_regs_ic [];
extern const aarch64_sys_ins_reg aarch64_sys_regs_dc [];
extern const aarch64_sys_ins_reg aarch64_sys_regs_at [];
extern const aarch64_sys_ins_reg aarch64_sys_regs_tlbi [];
+extern const aarch64_sys_ins_reg aarch64_sys_regs_plbi [];
extern const aarch64_sys_ins_reg aarch64_sys_ins_gic [];
extern const aarch64_sys_ins_reg aarch64_sys_ins_gicr [];
extern const aarch64_sys_ins_reg aarch64_sys_ins_gsb [];
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 85e01ac76ae..ca2c939d5b2 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -556,6 +556,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case A64_OPID_d503323f_dsb_BARRIER_DSB_NXS:
value = A64_OPID_d503323f_dsb_BARRIER_DSB_NXS;
break;
+ case A64_OPID_d5080000_plbi_SYSREG_PLBI_Rt_SYS:
case A64_OPID_d508001f_gsb_GSB:
case A64_OPID_d5080000_gicr_Rd_GICR:
case A64_OPID_d5080000_gic_GIC_Rd:
@@ -1019,6 +1020,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case AARCH64_OPND_SYSREG_IC:
case AARCH64_OPND_SYSREG_TLBI:
case AARCH64_OPND_SYSREG_TLBIP:
+ case AARCH64_OPND_SYSREG_PLBI:
case AARCH64_OPND_SYSREG_SR:
case AARCH64_OPND_GIC:
case AARCH64_OPND_GICR:
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index c00b9b309b1..9dcb83fefac 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -36899,7 +36899,7 @@ aarch64_find_alias_opcode (const aarch64_opcode *opcode)
value = A64_OPID_d503323f_dsb_BARRIER_DSB_NXS;
break;
case A64_OPID_d5080000_sys_UIMM3_OP1_CRn_CRm_UIMM3_OP2_Rt:
- value = A64_OPID_d508001f_gsb_GSB;
+ value = A64_OPID_d5080000_plbi_SYSREG_PLBI_Rt_SYS;
break;
case A64_OPID_d5480000_sysp_UIMM3_OP1_CRn_CRm_UIMM3_OP2_Rt_PAIRREG_OR_XZR:
value = A64_OPID_d5480000_tlbip_SYSREG_TLBIP_Rt_SYS_PAIRREG_OR_XZR;
@@ -37548,6 +37548,9 @@ aarch64_find_next_alias_opcode (const aarch64_opcode *opcode)
case A64_OPID_d5033c9f_dfb:
value = A64_OPID_d503309f_dsb_BARRIER;
break;
+ case A64_OPID_d5080000_plbi_SYSREG_PLBI_Rt_SYS:
+ value = A64_OPID_d508001f_gsb_GSB;
+ break;
case A64_OPID_d508001f_gsb_GSB:
value = A64_OPID_d5080000_gicr_Rd_GICR;
break;
@@ -37999,6 +38002,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case AARCH64_OPND_SYSREG_IC:
case AARCH64_OPND_SYSREG_TLBI:
case AARCH64_OPND_SYSREG_TLBIP:
+ case AARCH64_OPND_SYSREG_PLBI:
case AARCH64_OPND_SYSREG_SR:
case AARCH64_OPND_GIC:
case AARCH64_OPND_GICR:
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 55a9952d36a..e9614a11002 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -1435,6 +1435,7 @@ aarch64_ext_sysins_op (const aarch64_operand *self ATTRIBUTE_UNUSED,
case AARCH64_OPND_SYSREG_IC: sysins_ops = aarch64_sys_regs_ic; break;
case AARCH64_OPND_SYSREG_TLBI: sysins_ops = aarch64_sys_regs_tlbi; break;
case AARCH64_OPND_SYSREG_TLBIP: sysins_ops = aarch64_sys_regs_tlbi; break;
+ case AARCH64_OPND_SYSREG_PLBI: sysins_ops = aarch64_sys_regs_plbi; break;
case AARCH64_OPND_SYSREG_SR:
sysins_ops = aarch64_sys_regs_sr;
/* Let's remove op2 for rctx. Refer to comments in the definition of
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 15f76f685ea..4f447aef78f 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -143,6 +143,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_IC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an instruction cache maintenance operation specifier"},
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_TLBI", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a TBL invalidation operation specifier"},
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_TLBIP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a 128-bit TBL invalidation operation specifier"},
+ {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_PLBI", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a PLB invalidation operation specifier"},
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_SR", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a Speculation Restriction option name (RCTX)"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a barrier option name"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_DSB_NXS", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the DSB nXS option qualifier name SY, ISH, NSH, OSH or an optional 5-bit unsigned immediate"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 09d0b410fee..e4ce347bdc9 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -5088,6 +5088,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SYSREG_IC:
case AARCH64_OPND_SYSREG_TLBI:
case AARCH64_OPND_SYSREG_TLBIP:
+ case AARCH64_OPND_SYSREG_PLBI:
case AARCH64_OPND_SYSREG_SR:
snprintf (buf, size, "%s", style_reg (styler, opnd->sysins_op->name));
break;
@@ -5462,6 +5463,43 @@ const aarch64_sys_ins_reg aarch64_sys_regs_tlbi[] =
{ 0, CPENS(0,0,0,0), 0, AARCH64_NO_FEATURES }
};
+const aarch64_sys_ins_reg aarch64_sys_regs_plbi[] =
+{
+ #define PLBI_XS_OP(OP, CODE, FLAGS) \
+ { OP, CODE, FLAGS, AARCH64_FEATURE (POE2) }, \
+ { OP "nxs", CODE | CPENS (0, 0, C8, 0), FLAGS, AARCH64_FEATURES (2, POE2, XS) },
+
+ PLBI_XS_OP ( "alle1", CPENS (4, C10, C7, 4), 0 )
+ PLBI_XS_OP ( "alle1is", CPENS (4, C10, C3, 4), 0 )
+ PLBI_XS_OP ( "alle1os", CPENS (4, C10, C1, 4), 0 )
+ PLBI_XS_OP ( "alle2", CPENS (4, C10, C7, 0), 0 )
+ PLBI_XS_OP ( "alle2is", CPENS (4, C10, C3, 0), 0 )
+ PLBI_XS_OP ( "alle2os", CPENS (4, C10, C1, 0), 0 )
+ PLBI_XS_OP ( "alle3", CPENS (6, C10, C7, 0), 0 )
+ PLBI_XS_OP ( "alle3is", CPENS (6, C10, C3, 0), 0 )
+ PLBI_XS_OP ( "alle3os", CPENS (6, C10, C1, 0), 0 )
+ PLBI_XS_OP ( "aside1", CPENS (0, C10, C7, 2), F_HASXT )
+ PLBI_XS_OP ( "aside1is", CPENS (0, C10, C3, 2), F_HASXT )
+ PLBI_XS_OP ( "aside1os", CPENS (0, C10, C1, 2), F_HASXT )
+ PLBI_XS_OP ( "permae1", CPENS (0, C10, C7, 3), F_HASXT )
+ PLBI_XS_OP ( "permae1is", CPENS (0, C10, C3, 3), F_HASXT )
+ PLBI_XS_OP ( "permae1os", CPENS (0, C10, C1, 3), F_HASXT )
+ PLBI_XS_OP ( "perme1", CPENS (0, C10, C7, 1), F_HASXT )
+ PLBI_XS_OP ( "perme1is", CPENS (0, C10, C3, 1), F_HASXT )
+ PLBI_XS_OP ( "perme1os", CPENS (0, C10, C1, 1), F_HASXT )
+ PLBI_XS_OP ( "perme2", CPENS (4, C10, C7, 1), F_HASXT )
+ PLBI_XS_OP ( "perme2is", CPENS (4, C10, C3, 1), F_HASXT )
+ PLBI_XS_OP ( "perme2os", CPENS (4, C10, C1, 1), F_HASXT )
+ PLBI_XS_OP ( "perme3", CPENS (6, C10, C7, 1), F_HASXT )
+ PLBI_XS_OP ( "perme3is", CPENS (6, C10, C3, 1), F_HASXT )
+ PLBI_XS_OP ( "perme3os", CPENS (6, C10, C1, 1), F_HASXT )
+ PLBI_XS_OP ( "vmalle1", CPENS (0, C10, C7, 0), 0 )
+ PLBI_XS_OP ( "vmalle1is", CPENS (0, C10, C3, 0), 0 )
+ PLBI_XS_OP ( "vmalle1os", CPENS (0, C10, C1, 0), 0 )
+
+ { 0, CPENS (0,0,0,0), 0, AARCH64_NO_FEATURES }
+};
+
const aarch64_sys_ins_reg aarch64_sys_ins_gic[] =
{
{ "cdaff", CPENS (0,C12,C1,3), 0, AARCH64_NO_FEATURES },
diff --git a/opcodes/aarch64-tbl-2.h b/opcodes/aarch64-tbl-2.h
index fbab04e40de..e9bc188c69f 100644
--- a/opcodes/aarch64-tbl-2.h
+++ b/opcodes/aarch64-tbl-2.h
@@ -4048,6 +4048,7 @@ enum aarch64_opcode_idx
A64_OPID_d5900000_tchangef_Rd_UIMM7_NOT_BALANCED_17,
A64_OPID_d5840000_tchangeb_Rd_Rn_NOT_BALANCED_17,
A64_OPID_d5940000_tchangeb_Rd_UIMM7_NOT_BALANCED_17,
+ A64_OPID_d5080000_plbi_SYSREG_PLBI_Rt_SYS,
A64_OPID_d4e00000_tenter_UIMM7_NOT_BALANCED_17,
A64_OPID_d6ff03e0_texit_NOT_BALANCED_10,
A64_OPID_MAX,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 3af6e1dcf3a..82b3e9dd2ce 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -7907,6 +7907,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
POE2_INSN("tchangef", 0xd5900000, 0xfffdf000, aarch64_misc, OP3 (Rd, UIMM7, NOT_BALANCED_17), QL_X1NIL2, F_OPD2_OPT | F_DEFAULT (0x0)),
POE2_INSN("tchangeb", 0xd5840000, 0xfffdfc00, aarch64_misc, OP3 (Rd, Rn, NOT_BALANCED_17), QL_X2NIL, F_OPD2_OPT | F_DEFAULT (0x0)),
POE2_INSN("tchangeb", 0xd5940000, 0xfffdf000, aarch64_misc, OP3 (Rd, UIMM7, NOT_BALANCED_17), QL_X1NIL2, F_OPD2_OPT | F_DEFAULT (0x0)),
+ POE2_INSN("plbi", 0xd5080000, 0xfff80000, ic_system, OP2 (SYSREG_PLBI, Rt_SYS), QL_SRC_X, F_ALIAS | F_OPD1_OPT | F_DEFAULT (0x1F)),
/* TEV instructions. */
TEV_INSN("tenter", 0xd4e00000, 0xfffdf01f, aarch64_misc, OP2 (UIMM7, NOT_BALANCED_17), QL_PRFM_PCREL, F_OPD1_OPT | F_DEFAULT (0x0)),
@@ -8138,6 +8139,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
"a TBL invalidation operation specifier") \
Y(SYSTEM, sysins_op, "SYSREG_TLBIP", 0, F(), \
"a 128-bit TBL invalidation operation specifier") \
+ Y(SYSTEM, sysins_op, "SYSREG_PLBI", 0, F(), \
+ "a PLB invalidation operation specifier") \
Y(SYSTEM, sysins_op, "SYSREG_SR", 0, F(), \
"a Speculation Restriction option name (RCTX)") \
Y(SYSTEM, barrier, "BARRIER", 0, F(), \
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