https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=4a6d6c97ca2204844631488a9985494c2752a11d
commit 4a6d6c97ca2204844631488a9985494c2752a11d
Author: Ezra Sitorus <ezra.sitorus@arm.com>
Date: Fri Jun 13 17:57:03 2025 +0100
aarch64: Support for FEAT_SVE_F16F32MM, FEAT_F8F16M, FEAT_F8F32MM
FEAT_SVE_F16F32MM introduces the SVE half-precision floating-point
matrix multiply-accumulate to single-precision instruction.
FEAT_F8F32MM introduces the Advanced SIMD 8-bit floating-point matrix
multiply-accumulate to single-precision instruction.
FEAT_F8F16MM introduces the Advanced SIMD 8-bit floating-point matrix
multiply-accumulate to half-precision instruction.
Diff:
---
gas/config/tc-aarch64.c | 3 +
gas/doc/c-aarch64.texi | 6 +
gas/testsuite/gas/aarch64/f8f16mm-bad.d | 4 +
gas/testsuite/gas/aarch64/f8f16mm-bad.l | 9 +
gas/testsuite/gas/aarch64/f8f16mm.d | 18 +
gas/testsuite/gas/aarch64/f8f16mm.s | 9 +
gas/testsuite/gas/aarch64/f8f16mm_sve2-bad.d | 4 +
gas/testsuite/gas/aarch64/f8f16mm_sve2-bad.l | 9 +
gas/testsuite/gas/aarch64/f8f16mm_sve2.d | 18 +
gas/testsuite/gas/aarch64/f8f16mm_sve2.s | 9 +
gas/testsuite/gas/aarch64/f8f32mm-bad.d | 4 +
gas/testsuite/gas/aarch64/f8f32mm-bad.l | 9 +
gas/testsuite/gas/aarch64/f8f32mm.d | 18 +
gas/testsuite/gas/aarch64/f8f32mm.s | 9 +
gas/testsuite/gas/aarch64/f8f32mm_sve2-bad.d | 4 +
gas/testsuite/gas/aarch64/f8f32mm_sve2-bad.l | 9 +
gas/testsuite/gas/aarch64/f8f32mm_sve2.d | 18 +
gas/testsuite/gas/aarch64/f8f32mm_sve2.s | 9 +
gas/testsuite/gas/aarch64/sve-f16f32mm-bad.d | 4 +
gas/testsuite/gas/aarch64/sve-f16f32mm-bad.l | 9 +
gas/testsuite/gas/aarch64/sve-f16f32mm.d | 18 +
gas/testsuite/gas/aarch64/sve-f16f32mm.s | 9 +
include/opcode/aarch64.h | 6 +
opcodes/aarch64-asm-2.c | 4 +-
opcodes/aarch64-dis-2.c | 1125 ++++++++++++++------------
opcodes/aarch64-tbl.h | 34 +
26 files changed, 841 insertions(+), 537 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 365772e672e..9265ff3c43c 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10769,6 +10769,9 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"sve-bfscale", AARCH64_FEATURE (SVE_BFSCALE), AARCH64_NO_FEATURES},
{"sme2p1", AARCH64_FEATURE (SME2p1), AARCH64_FEATURE (SME2)},
{"sve2p1", AARCH64_FEATURE (SVE2p1), AARCH64_FEATURE (SVE2)},
+ {"sve-f16f32mm", AARCH64_FEATURE (SVE_F16F32MM), AARCH64_FEATURE (SVE)},
+ {"f8f32mm", AARCH64_FEATURE (F8F32MM), AARCH64_FEATURES (2, SIMD, FP8)},
+ {"f8f16mm", AARCH64_FEATURE (F8F16MM), AARCH64_FEATURES (2, SIMD, FP8)},
{"rcpc3", AARCH64_FEATURE (RCPC3), AARCH64_FEATURE (RCPC2)},
{"cpa", AARCH64_FEATURE (CPA), AARCH64_NO_FEATURES},
{"faminmax", AARCH64_FEATURE (FAMINMAX), AARCH64_FEATURE (SIMD)},
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 9ef0dd6d281..c3c69f52025 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -187,6 +187,10 @@ automatically cause those extensions to be disabled.
@tab Enable the F32 Matrix Multiply extension
@item @code{f64mm} @tab @code{sve}
@tab Enable the F64 Matrix Multiply extension.
+@item @code{f8f16mm} @tab @code{simd} @code{fp8}
+ @tab Enable 8-bit floating-point matrix multiply-accumulate to half-precision instructions.
+@item @code{f8f32mm} @tab @code{simd} @code{fp}
+ @tab Enable 8-bit floating-point matrix multiply-accumulate to single-precision instructions.
@item @code{fcma} @tab @code{fp16}, @code{simd}
@tab Enable the complex number SIMD extensions.
@item @code{flagm} @tab
@@ -305,6 +309,8 @@ automatically cause those extensions to be disabled.
@tab Enable the SVE B16B16 extension. These instructions also require either @code{+sve2} or @code{+sme2}.
@item @code{sve-bfscale} @tab
@tab Enable the SVE BFSCALE extension. These instructions also require either @code{+sve2} or @code{+sme2}.
+@item @code{sve-f16f32mm} @tab @code{sve}
+@tab Enable the SVE_F16F32MM extension.
@item @code{sve2} @tab @code{sve}
@tab Enable SVE2.
@item @code{sve2-aes} @tab @code{sve2}, @code{aes}
diff --git a/gas/testsuite/gas/aarch64/f8f16mm-bad.d b/gas/testsuite/gas/aarch64/f8f16mm-bad.d
new file mode 100644
index 00000000000..9e034e1cd3e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f16mm-bad.d
@@ -0,0 +1,4 @@
+#name: Illegal test of F8F16MM FMMLA instruction
+#as: -march=armv8-a
+#source: f8f16mm.s
+#error_output: f8f16mm-bad.l
diff --git a/gas/testsuite/gas/aarch64/f8f16mm-bad.l b/gas/testsuite/gas/aarch64/f8f16mm-bad.l
new file mode 100644
index 00000000000..01acbac92a6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f16mm-bad.l
@@ -0,0 +1,9 @@
+[^:]*: Assembler messages:
+.*: Error: selected processor does not support `fmmla v0.8h,v0.16b,v0.16b'
+.*: Error: selected processor does not support `fmmla v0.8h,v0.16b,v31.16b'
+.*: Error: selected processor does not support `fmmla v0.8h,v31.16b,v0.16b'
+.*: Error: selected processor does not support `fmmla v0.8h,v31.16b,v31.16b'
+.*: Error: selected processor does not support `fmmla v31.8h,v0.16b,v0.16b'
+.*: Error: selected processor does not support `fmmla v31.8h,v0.16b,v31.16b'
+.*: Error: selected processor does not support `fmmla v31.8h,v31.16b,v0.16b'
+.*: Error: selected processor does not support `fmmla v31.8h,v31.16b,v31.16b'
diff --git a/gas/testsuite/gas/aarch64/f8f16mm.d b/gas/testsuite/gas/aarch64/f8f16mm.d
new file mode 100644
index 00000000000..bcfc9194cc6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f16mm.d
@@ -0,0 +1,18 @@
+#name: F8F16MM FMMLA instructions
+#as: -march=armv8-a+f8f16mm
+#objdump: -dr
+
+.*: file format .*
+
+
+Disassembly of section .*:
+
+.* <a>:
+.*: 6e00ec00 fmmla v0.8h, v0.16b, v0.16b
+.*: 6e1fec00 fmmla v0.8h, v0.16b, v31.16b
+.*: 6e00efe0 fmmla v0.8h, v31.16b, v0.16b
+.*: 6e1fefe0 fmmla v0.8h, v31.16b, v31.16b
+.*: 6e00ec1f fmmla v31.8h, v0.16b, v0.16b
+.*: 6e1fec1f fmmla v31.8h, v0.16b, v31.16b
+.*: 6e00efff fmmla v31.8h, v31.16b, v0.16b
+.*: 6e1fefff fmmla v31.8h, v31.16b, v31.16b
diff --git a/gas/testsuite/gas/aarch64/f8f16mm.s b/gas/testsuite/gas/aarch64/f8f16mm.s
new file mode 100644
index 00000000000..41d61004175
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f16mm.s
@@ -0,0 +1,9 @@
+a:
+ fmmla v0.8h, v0.16b, v0.16b
+ fmmla v0.8h, v0.16b, v31.16b
+ fmmla v0.8h, v31.16b, v0.16b
+ fmmla v0.8h, v31.16b, v31.16b
+ fmmla v31.8h, v0.16b, v0.16b
+ fmmla v31.8h, v0.16b, v31.16b
+ fmmla v31.8h, v31.16b, v0.16b
+ fmmla v31.8h, v31.16b, v31.16b
diff --git a/gas/testsuite/gas/aarch64/f8f16mm_sve2-bad.d b/gas/testsuite/gas/aarch64/f8f16mm_sve2-bad.d
new file mode 100644
index 00000000000..4e1f53bf16f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f16mm_sve2-bad.d
@@ -0,0 +1,4 @@
+#name: Illegal test of F8F16MM SVE2 FMMLA instruction
+#as: -march=armv8-a
+#source: f8f16mm_sve2.s
+#error_output: f8f16mm_sve2-bad.l
diff --git a/gas/testsuite/gas/aarch64/f8f16mm_sve2-bad.l b/gas/testsuite/gas/aarch64/f8f16mm_sve2-bad.l
new file mode 100644
index 00000000000..3560c17e415
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f16mm_sve2-bad.l
@@ -0,0 +1,9 @@
+[^:]*: Assembler messages:
+.*: Error: selected processor does not support `fmmla z0.h,z0.b,z0.b'
+.*: Error: selected processor does not support `fmmla z0.h,z0.b,z31.b'
+.*: Error: selected processor does not support `fmmla z0.h,z31.b,z0.b'
+.*: Error: selected processor does not support `fmmla z0.h,z31.b,z31.b'
+.*: Error: selected processor does not support `fmmla z31.h,z0.b,z0.b'
+.*: Error: selected processor does not support `fmmla z31.h,z0.b,z31.b'
+.*: Error: selected processor does not support `fmmla z31.h,z31.b,z0.b'
+.*: Error: selected processor does not support `fmmla z31.h,z31.b,z31.b'
diff --git a/gas/testsuite/gas/aarch64/f8f16mm_sve2.d b/gas/testsuite/gas/aarch64/f8f16mm_sve2.d
new file mode 100644
index 00000000000..3bb69ceafae
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f16mm_sve2.d
@@ -0,0 +1,18 @@
+#name: F8F16MM SVE2 FMMLA instructions
+#as: -march=armv8-a+sve2+f8f16mm
+#objdump: -dr
+
+.*: file format .*
+
+
+Disassembly of section .*:
+
+.* <a>:
+.*: 6460e000 fmmla z0.h, z0.b, z0.b
+.*: 647fe000 fmmla z0.h, z0.b, z31.b
+.*: 6460e3e0 fmmla z0.h, z31.b, z0.b
+.*: 647fe3e0 fmmla z0.h, z31.b, z31.b
+.*: 6460e01f fmmla z31.h, z0.b, z0.b
+.*: 647fe01f fmmla z31.h, z0.b, z31.b
+.*: 6460e3ff fmmla z31.h, z31.b, z0.b
+.*: 647fe3ff fmmla z31.h, z31.b, z31.b
diff --git a/gas/testsuite/gas/aarch64/f8f16mm_sve2.s b/gas/testsuite/gas/aarch64/f8f16mm_sve2.s
new file mode 100644
index 00000000000..c1a32c98c09
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f16mm_sve2.s
@@ -0,0 +1,9 @@
+a:
+ fmmla z0.h, z0.b, z0.b
+ fmmla z0.h, z0.b, z31.b
+ fmmla z0.h, z31.b, z0.b
+ fmmla z0.h, z31.b, z31.b
+ fmmla z31.h, z0.b, z0.b
+ fmmla z31.h, z0.b, z31.b
+ fmmla z31.h, z31.b, z0.b
+ fmmla z31.h, z31.b, z31.b
diff --git a/gas/testsuite/gas/aarch64/f8f32mm-bad.d b/gas/testsuite/gas/aarch64/f8f32mm-bad.d
new file mode 100644
index 00000000000..3d920f0a036
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f32mm-bad.d
@@ -0,0 +1,4 @@
+#name: Illegal test of F8F32MM FMMLA instruction
+#as: -march=armv8-a
+#source: f8f32mm.s
+#error_output: f8f32mm-bad.l
diff --git a/gas/testsuite/gas/aarch64/f8f32mm-bad.l b/gas/testsuite/gas/aarch64/f8f32mm-bad.l
new file mode 100644
index 00000000000..910a2e16963
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f32mm-bad.l
@@ -0,0 +1,9 @@
+[^:]*: Assembler messages:
+.*: Error: selected processor does not support `fmmla v0.4s,v0.16b,v0.16b'
+.*: Error: selected processor does not support `fmmla v0.4s,v0.16b,v31.16b'
+.*: Error: selected processor does not support `fmmla v0.4s,v31.16b,v0.16b'
+.*: Error: selected processor does not support `fmmla v0.4s,v31.16b,v31.16b'
+.*: Error: selected processor does not support `fmmla v31.4s,v0.16b,v0.16b'
+.*: Error: selected processor does not support `fmmla v31.4s,v0.16b,v31.16b'
+.*: Error: selected processor does not support `fmmla v31.4s,v31.16b,v0.16b'
+.*: Error: selected processor does not support `fmmla v31.4s,v31.16b,v31.16b'
diff --git a/gas/testsuite/gas/aarch64/f8f32mm.d b/gas/testsuite/gas/aarch64/f8f32mm.d
new file mode 100644
index 00000000000..b1e6bebfd9c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f32mm.d
@@ -0,0 +1,18 @@
+#name: F8F32MM FMMLA instructions
+#as: -march=armv8-a+f8f32mm
+#objdump: -dr
+
+.*: file format .*
+
+
+Disassembly of section .*:
+
+.* <a>:
+.*: 6e80ec00 fmmla v0.4s, v0.16b, v0.16b
+.*: 6e9fec00 fmmla v0.4s, v0.16b, v31.16b
+.*: 6e80efe0 fmmla v0.4s, v31.16b, v0.16b
+.*: 6e9fefe0 fmmla v0.4s, v31.16b, v31.16b
+.*: 6e80ec1f fmmla v31.4s, v0.16b, v0.16b
+.*: 6e9fec1f fmmla v31.4s, v0.16b, v31.16b
+.*: 6e80efff fmmla v31.4s, v31.16b, v0.16b
+.*: 6e9fefff fmmla v31.4s, v31.16b, v31.16b
diff --git a/gas/testsuite/gas/aarch64/f8f32mm.s b/gas/testsuite/gas/aarch64/f8f32mm.s
new file mode 100644
index 00000000000..4c8421db179
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f32mm.s
@@ -0,0 +1,9 @@
+a:
+ fmmla v0.4s, v0.16b, v0.16b
+ fmmla v0.4s, v0.16b, v31.16b
+ fmmla v0.4s, v31.16b, v0.16b
+ fmmla v0.4s, v31.16b, v31.16b
+ fmmla v31.4s, v0.16b, v0.16b
+ fmmla v31.4s, v0.16b, v31.16b
+ fmmla v31.4s, v31.16b, v0.16b
+ fmmla v31.4s, v31.16b, v31.16b
diff --git a/gas/testsuite/gas/aarch64/f8f32mm_sve2-bad.d b/gas/testsuite/gas/aarch64/f8f32mm_sve2-bad.d
new file mode 100644
index 00000000000..200f49c93a2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f32mm_sve2-bad.d
@@ -0,0 +1,4 @@
+#name: Illegal test of F8F32MM SVE2 FMMLA instruction
+#as: -march=armv8-a
+#source: f8f32mm_sve2.s
+#error_output: f8f32mm_sve2-bad.l
diff --git a/gas/testsuite/gas/aarch64/f8f32mm_sve2-bad.l b/gas/testsuite/gas/aarch64/f8f32mm_sve2-bad.l
new file mode 100644
index 00000000000..46b62b2736c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f32mm_sve2-bad.l
@@ -0,0 +1,9 @@
+[^:]*: Assembler messages:
+.*: Error: selected processor does not support `fmmla z0.s,z0.b,z0.b'
+.*: Error: selected processor does not support `fmmla z0.s,z0.b,z31.b'
+.*: Error: selected processor does not support `fmmla z0.s,z31.b,z0.b'
+.*: Error: selected processor does not support `fmmla z0.s,z31.b,z31.b'
+.*: Error: selected processor does not support `fmmla z31.s,z0.b,z0.b'
+.*: Error: selected processor does not support `fmmla z31.s,z0.b,z31.b'
+.*: Error: selected processor does not support `fmmla z31.s,z31.b,z0.b'
+.*: Error: selected processor does not support `fmmla z31.s,z31.b,z31.b'
diff --git a/gas/testsuite/gas/aarch64/f8f32mm_sve2.d b/gas/testsuite/gas/aarch64/f8f32mm_sve2.d
new file mode 100644
index 00000000000..30670c989a4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f32mm_sve2.d
@@ -0,0 +1,18 @@
+#name: F8F32MM SVE2 FMMLA instructions
+#as: -march=armv8-a+sve2+f8f32mm
+#objdump: -dr
+
+.*: file format .*
+
+
+Disassembly of section .*:
+
+.* <a>:
+.*: 6420e000 fmmla z0.s, z0.b, z0.b
+.*: 643fe000 fmmla z0.s, z0.b, z31.b
+.*: 6420e3e0 fmmla z0.s, z31.b, z0.b
+.*: 643fe3e0 fmmla z0.s, z31.b, z31.b
+.*: 6420e01f fmmla z31.s, z0.b, z0.b
+.*: 643fe01f fmmla z31.s, z0.b, z31.b
+.*: 6420e3ff fmmla z31.s, z31.b, z0.b
+.*: 643fe3ff fmmla z31.s, z31.b, z31.b
diff --git a/gas/testsuite/gas/aarch64/f8f32mm_sve2.s b/gas/testsuite/gas/aarch64/f8f32mm_sve2.s
new file mode 100644
index 00000000000..a293e3f1391
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/f8f32mm_sve2.s
@@ -0,0 +1,9 @@
+a:
+ fmmla z0.s, z0.b, z0.b
+ fmmla z0.s, z0.b, z31.b
+ fmmla z0.s, z31.b, z0.b
+ fmmla z0.s, z31.b, z31.b
+ fmmla z31.s, z0.b, z0.b
+ fmmla z31.s, z0.b, z31.b
+ fmmla z31.s, z31.b, z0.b
+ fmmla z31.s, z31.b, z31.b
diff --git a/gas/testsuite/gas/aarch64/sve-f16f32mm-bad.d b/gas/testsuite/gas/aarch64/sve-f16f32mm-bad.d
new file mode 100644
index 00000000000..3adce337592
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-f16f32mm-bad.d
@@ -0,0 +1,4 @@
+#name: Illegal test of SVE_F16F32MM FMMLA instruction
+#as: -march=armv8-a
+#source: sve-f16f32mm.s
+#error_output: sve-f16f32mm-bad.l
diff --git a/gas/testsuite/gas/aarch64/sve-f16f32mm-bad.l b/gas/testsuite/gas/aarch64/sve-f16f32mm-bad.l
new file mode 100644
index 00000000000..bb955681bae
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-f16f32mm-bad.l
@@ -0,0 +1,9 @@
+[^:]*: Assembler messages:
+.*: Error: selected processor does not support `fmmla z0.s,z0.h,z0.h'
+.*: Error: selected processor does not support `fmmla z0.s,z0.h,z31.h'
+.*: Error: selected processor does not support `fmmla z0.s,z31.h,z0.h'
+.*: Error: selected processor does not support `fmmla z0.s,z31.h,z31.h'
+.*: Error: selected processor does not support `fmmla z31.s,z0.h,z0.h'
+.*: Error: selected processor does not support `fmmla z31.s,z0.h,z31.h'
+.*: Error: selected processor does not support `fmmla z31.s,z31.h,z0.h'
+.*: Error: selected processor does not support `fmmla z31.s,z31.h,z31.h'
diff --git a/gas/testsuite/gas/aarch64/sve-f16f32mm.d b/gas/testsuite/gas/aarch64/sve-f16f32mm.d
new file mode 100644
index 00000000000..8b72bf2b681
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-f16f32mm.d
@@ -0,0 +1,18 @@
+#name: SVE_F16F32MM FMMLA instructions
+#as: -march=armv8-a+sve-f16f32mm
+#objdump: -dr
+
+.*: file format .*
+
+
+Disassembly of section .*:
+
+.* <a>:
+.*: 6420e400 fmmla z0.s, z0.h, z0.h
+.*: 643fe400 fmmla z0.s, z0.h, z31.h
+.*: 6420e7e0 fmmla z0.s, z31.h, z0.h
+.*: 643fe7e0 fmmla z0.s, z31.h, z31.h
+.*: 6420e41f fmmla z31.s, z0.h, z0.h
+.*: 643fe41f fmmla z31.s, z0.h, z31.h
+.*: 6420e7ff fmmla z31.s, z31.h, z0.h
+.*: 643fe7ff fmmla z31.s, z31.h, z31.h
diff --git a/gas/testsuite/gas/aarch64/sve-f16f32mm.s b/gas/testsuite/gas/aarch64/sve-f16f32mm.s
new file mode 100644
index 00000000000..49792581aa8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-f16f32mm.s
@@ -0,0 +1,9 @@
+a:
+ fmmla z0.s, z0.h, z0.h
+ fmmla z0.s, z0.h, z31.h
+ fmmla z0.s, z31.h, z0.h
+ fmmla z0.s, z31.h, z31.h
+ fmmla z31.s, z0.h, z0.h
+ fmmla z31.s, z0.h, z31.h
+ fmmla z31.s, z31.h, z0.h
+ fmmla z31.s, z31.h, z31.h
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index a2cc97ab509..5f3895fd6c2 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -234,6 +234,12 @@ enum aarch64_feature_bit {
AARCH64_FEATURE_SME2p1,
/* SVE2.1 instructions. */
AARCH64_FEATURE_SVE2p1,
+ /* SVE_F16F32MM instructions. */
+ AARCH64_FEATURE_SVE_F16F32MM,
+ /* F8F32MM instructions. */
+ AARCH64_FEATURE_F8F32MM,
+ /* F8F16MM instructions. */
+ AARCH64_FEATURE_F8F16MM,
/* RCPC3 instructions. */
AARCH64_FEATURE_RCPC3,
/* Enhanced Software Step Extension. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index b35a45790bb..fdf537a788f 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -490,7 +490,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1270: /* movz */
value = 1270; /* --> movz. */
break;
- case 3251: /* clrbhb */
+ case 3256: /* clrbhb */
case 1351: /* autibsp */
case 1350: /* autibz */
case 1349: /* autiasp */
@@ -530,7 +530,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1306: /* dsb */
value = 1306; /* --> dsb. */
break;
- case 3252: /* trcit */
+ case 3257: /* trcit */
case 1337: /* brb */
case 1336: /* cosp */
case 1335: /* cpp */
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 7138ab38650..00e9b6a9f2f 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -216,7 +216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000x0010xxxxxx1xxxxxxxxx
movaz. */
- return 3383;
+ return 3388;
}
else
{
@@ -224,7 +224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100x0010xxxxxx1xxxxxxxxx
movaz. */
- return 3385;
+ return 3390;
}
}
else
@@ -235,7 +235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x0010xxxxxx1xxxxxxxxx
movaz. */
- return 3384;
+ return 3389;
}
else
{
@@ -243,7 +243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x0010xxxxxx1xxxxxxxxx
movaz. */
- return 3386;
+ return 3391;
}
}
}
@@ -253,7 +253,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x0011xxxxxx1xxxxxxxxx
movaz. */
- return 3387;
+ return 3392;
}
}
}
@@ -271,7 +271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x000101x00xxxxxxxxxxxxxx
luti4. */
- return 3523;
+ return 3528;
}
else
{
@@ -310,7 +310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx01101x00xxxxxxxxxxxxxx
luti4. */
- return 3524;
+ return 3529;
}
else
{
@@ -318,7 +318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx01101x10xxxxxxxxxxxxxx
luti4. */
- return 3380;
+ return 3385;
}
}
else
@@ -327,7 +327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx01101xx1xxxxxxxxxxxxxx
luti4. */
- return 3379;
+ return 3384;
}
}
}
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000x011xxxxx001xxxxxxxxx
movaz. */
- return 3373;
+ return 3378;
}
else
{
@@ -377,7 +377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100x011xxxxx001xxxxxxxxx
movaz. */
- return 3375;
+ return 3380;
}
}
else
@@ -388,7 +388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x011xxxxx001xxxxxxxxx
movaz. */
- return 3374;
+ return 3379;
}
else
{
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x011xxxxx001xxxxxxxxx
movaz. */
- return 3376;
+ return 3381;
}
}
}
@@ -420,7 +420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011000xxx00xxxxxxxxxx
zero. */
- return 3388;
+ return 3393;
}
else
{
@@ -428,7 +428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011100xxx00xxxxxxxxxx
zero. */
- return 3389;
+ return 3394;
}
}
else
@@ -439,7 +439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011010xxx00xxxxxxxxxx
zero. */
- return 3391;
+ return 3396;
}
else
{
@@ -447,7 +447,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011110xxx00xxxxxxxxxx
zero. */
- return 3394;
+ return 3399;
}
}
}
@@ -461,7 +461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011001xxx00xxxxxxxxxx
zero. */
- return 3390;
+ return 3395;
}
else
{
@@ -469,7 +469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011101xxx00xxxxxxxxxx
zero. */
- return 3393;
+ return 3398;
}
}
else
@@ -480,7 +480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011011xxx00xxxxxxxxxx
zero. */
- return 3392;
+ return 3397;
}
else
{
@@ -488,7 +488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011111xxx00xxxxxxxxxx
zero. */
- return 3395;
+ return 3400;
}
}
}
@@ -542,7 +542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010011x1xxxx00xxxxxxxxxx
movt. */
- return 3525;
+ return 3530;
}
}
else
@@ -563,7 +563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0111xxx0xx00xxxxxxxxxx
luti2. */
- return 3378;
+ return 3383;
}
else
{
@@ -571,7 +571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0111xxx1xx00xxxxxxxxxx
luti2. */
- return 3377;
+ return 3382;
}
}
}
@@ -602,7 +602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx101xxxxxxxxx
movaz. */
- return 3381;
+ return 3386;
}
}
}
@@ -639,7 +639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000xx11xxxxx011xxxxxxxxx
movaz. */
- return 3369;
+ return 3374;
}
else
{
@@ -647,7 +647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100xx11xxxxx011xxxxxxxxx
movaz. */
- return 3371;
+ return 3376;
}
}
else
@@ -658,7 +658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010xx11xxxxx011xxxxxxxxx
movaz. */
- return 3370;
+ return 3375;
}
else
{
@@ -666,7 +666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110xx11xxxxx011xxxxxxxxx
movaz. */
- return 3372;
+ return 3377;
}
}
}
@@ -698,7 +698,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx111xxxxxxxxx
movaz. */
- return 3382;
+ return 3387;
}
}
}
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000000101xxxxxxxxxxxxxxxx00xxx
fmopa. */
- return 3591;
+ return 3596;
}
else
{
@@ -1374,7 +1374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000000101xxxxxxxxxxxxxxxx01xxx
fmopa. */
- return 3590;
+ return 3595;
}
}
else
@@ -1722,7 +1722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xx0xxxxx1000xxx
fmlall. */
- return 3584;
+ return 3589;
}
}
}
@@ -1754,7 +1754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xx1xxxxxx00xxxx
fmla. */
- return 3398;
+ return 3403;
}
else
{
@@ -1764,7 +1764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xx1xxxxx000xxxx
fmla. */
- return 3399;
+ return 3404;
}
else
{
@@ -1772,7 +1772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xx1xxxxx100xxxx
fdot. */
- return 3569;
+ return 3574;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xx1xxxxxx10xxxx
bfmla. */
- return 3355;
+ return 3360;
}
else
{
@@ -1814,7 +1814,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xx1xxxxxx10xxxx
bfmla. */
- return 3356;
+ return 3361;
}
}
}
@@ -1905,7 +1905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xx1xxxxxx01xxxx
fmls. */
- return 3404;
+ return 3409;
}
else
{
@@ -1913,7 +1913,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xx1xxxxxx01xxxx
fmls. */
- return 3405;
+ return 3410;
}
}
}
@@ -1946,7 +1946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xx1xxxxxx11xxxx
bfmls. */
- return 3361;
+ return 3366;
}
else
{
@@ -1954,7 +1954,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xx1xxxxxx11xxxx
bfmls. */
- return 3362;
+ return 3367;
}
}
}
@@ -2179,7 +2179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000001100xxxxxxxxxxxxxxxx01xxx
fmopa. */
- return 3396;
+ return 3401;
}
}
else
@@ -2223,7 +2223,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxxxxx0xxxxxx100xxx
fmlall. */
- return 3583;
+ return 3588;
}
}
}
@@ -2328,7 +2328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxxxxx1xxxxxx10xxxx
fmlal. */
- return 3576;
+ return 3581;
}
}
}
@@ -2374,7 +2374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000001100xxxxxxxxxxxxxxxx11xxx
fmops. */
- return 3397;
+ return 3402;
}
}
else
@@ -2512,7 +2512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxxxxx1xxxxxx11xxxx
fmlal. */
- return 3575;
+ return 3580;
}
}
}
@@ -2554,7 +2554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010100xxxxxxxxxxxxxxxx0xxx
fmlall. */
- return 3582;
+ return 3587;
}
else
{
@@ -2922,7 +2922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx111xxx
fdot. */
- return 3562;
+ return 3567;
}
else
{
@@ -2991,7 +2991,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx001xxx
fdot. */
- return 3563;
+ return 3568;
}
else
{
@@ -3070,7 +3070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx0xxxxxxx0xxxx
fmlal. */
- return 3574;
+ return 3579;
}
else
{
@@ -3125,7 +3125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx01xxxxx00xxxx
fvdotb. */
- return 3593;
+ return 3598;
}
else
{
@@ -3143,7 +3143,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxxxxx0xxxxxx10xxxx
fdot. */
- return 3568;
+ return 3573;
}
}
}
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxxxxx1xxxxxx10xxxx
fvdot. */
- return 3592;
+ return 3597;
}
}
}
@@ -3297,7 +3297,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx01xxxxxx1xxxx
fvdott. */
- return 3594;
+ return 3599;
}
else
{
@@ -3418,7 +3418,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000001xx1xxxxxxxxxxxxxxxx01xxx
bfmopa. */
- return 3367;
+ return 3372;
}
else
{
@@ -3426,7 +3426,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000001xx1xxxxxxxxxxxxxxxx11xxx
bfmops. */
- return 3368;
+ return 3373;
}
}
}
@@ -3496,7 +3496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxx10000x
fmlall. */
- return 3588;
+ return 3593;
}
else
{
@@ -3504,7 +3504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxx10000x
fmlall. */
- return 3589;
+ return 3594;
}
}
}
@@ -3559,7 +3559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx00x1x
fmlall. */
- return 3586;
+ return 3591;
}
else
{
@@ -3567,7 +3567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx00x1x
fmlall. */
- return 3587;
+ return 3592;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxx100xxx
fdot. */
- return 3572;
+ return 3577;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxx100xxx
fdot. */
- return 3573;
+ return 3578;
}
}
}
@@ -3691,7 +3691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxx1000xx
fmlal. */
- return 3580;
+ return 3585;
}
else
{
@@ -3699,7 +3699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxx1000xx
fmlal. */
- return 3581;
+ return 3586;
}
}
}
@@ -3754,7 +3754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx010xxxxx001xx
fmlal. */
- return 3578;
+ return 3583;
}
else
{
@@ -3762,7 +3762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx010xxxxx001xx
fmlal. */
- return 3579;
+ return 3584;
}
}
}
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx001xxxxx000xx
fmlall. */
- return 3585;
+ return 3590;
}
}
else
@@ -3914,7 +3914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx011xxxxx00xxx
fmlal. */
- return 3577;
+ return 3582;
}
}
else
@@ -3929,7 +3929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx111xxxxx00xxx
fmla. */
- return 3400;
+ return 3405;
}
else
{
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx111xxxxx00xxx
bfmla. */
- return 3357;
+ return 3362;
}
}
else
@@ -3960,7 +3960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011010x1x00xx111xxxxx00xxx
fadd. */
- return 3526;
+ return 3531;
}
else
{
@@ -3968,7 +3968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011110x1x00xx111xxxxx00xxx
bfadd. */
- return 3351;
+ return 3356;
}
}
}
@@ -3990,7 +3990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011010x1x10xx111xxxxx00xxx
fadd. */
- return 3527;
+ return 3532;
}
else
{
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011110x1x10xx111xxxxx00xxx
bfadd. */
- return 3352;
+ return 3357;
}
}
}
@@ -4012,7 +4012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx111xxxxx00xxx
fmla. */
- return 3401;
+ return 3406;
}
else
{
@@ -4020,7 +4020,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111xxxx0xx111xxxxx00xxx
bfmla. */
- return 3358;
+ return 3363;
}
}
}
@@ -4146,7 +4146,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxx110xxx
fdot. */
- return 3566;
+ return 3571;
}
else
{
@@ -4154,7 +4154,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxx110xxx
fdot. */
- return 3567;
+ return 3572;
}
}
}
@@ -4449,7 +4449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx100xxxxx01xxx
fdot. */
- return 3570;
+ return 3575;
}
else
{
@@ -4457,7 +4457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx100xxxxx01xxx
fdot. */
- return 3571;
+ return 3576;
}
}
else
@@ -4468,7 +4468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx100xxxxx01xxx
fmla. */
- return 3402;
+ return 3407;
}
else
{
@@ -4476,7 +4476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx100xxxxx01xxx
fmla. */
- return 3403;
+ return 3408;
}
}
}
@@ -4488,7 +4488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxx00xx100xxxxx01xxx
bfmla. */
- return 3359;
+ return 3364;
}
else
{
@@ -4496,7 +4496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxx10xx100xxxxx01xxx
bfmla. */
- return 3360;
+ return 3365;
}
}
}
@@ -4762,7 +4762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx111xxxxx01xxx
fmls. */
- return 3406;
+ return 3411;
}
else
{
@@ -4770,7 +4770,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx111xxxxx01xxx
bfmls. */
- return 3363;
+ return 3368;
}
}
else
@@ -4793,7 +4793,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011010x1x00xx111xxxxx01xxx
fsub. */
- return 3528;
+ return 3533;
}
else
{
@@ -4801,7 +4801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011110x1x00xx111xxxxx01xxx
bfsub. */
- return 3353;
+ return 3358;
}
}
}
@@ -4823,7 +4823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011010x1x10xx111xxxxx01xxx
fsub. */
- return 3529;
+ return 3534;
}
else
{
@@ -4831,7 +4831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011110x1x10xx111xxxxx01xxx
bfsub. */
- return 3354;
+ return 3359;
}
}
}
@@ -4845,7 +4845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx111xxxxx01xxx
fmls. */
- return 3407;
+ return 3412;
}
else
{
@@ -4853,7 +4853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111xxxx0xx111xxxxx01xxx
bfmls. */
- return 3364;
+ return 3369;
}
}
}
@@ -4919,7 +4919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx100xxxxx11xxx
fdot. */
- return 3564;
+ return 3569;
}
else
{
@@ -4927,7 +4927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx100xxxxx11xxx
fdot. */
- return 3565;
+ return 3570;
}
}
else
@@ -4938,7 +4938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx100xxxxx11xxx
fmls. */
- return 3408;
+ return 3413;
}
else
{
@@ -4946,7 +4946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx100xxxxx11xxx
fmls. */
- return 3409;
+ return 3414;
}
}
}
@@ -4958,7 +4958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxx00xx100xxxxx11xxx
bfmls. */
- return 3365;
+ return 3370;
}
else
{
@@ -4966,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxx10xx100xxxxx11xxx
bfmls. */
- return 3366;
+ return 3371;
}
}
}
@@ -5628,7 +5628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101x0000111000xxxxxxxxx0
fcvt. */
- return 3410;
+ return 3415;
}
else
{
@@ -5636,7 +5636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101x0000111000xxxxxxxxx1
fcvtl. */
- return 3411;
+ return 3416;
}
}
}
@@ -5694,7 +5694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x0100100111000xxxx0xxxxx
fcvt. */
- return 3497;
+ return 3502;
}
else
{
@@ -5702,7 +5702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x1100100111000xxxx0xxxxx
bfcvt. */
- return 3492;
+ return 3497;
}
}
else
@@ -5711,7 +5711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110100111000xxxx0xxxxx
fcvt. */
- return 3498;
+ return 3503;
}
}
else
@@ -5740,7 +5740,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx100111000xxxx1xxxxx
fcvtn. */
- return 3499;
+ return 3504;
}
}
}
@@ -5823,7 +5823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010x110111000xxxxxxxxx0
f1cvt. */
- return 3493;
+ return 3498;
}
else
{
@@ -5831,7 +5831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011010x110111000xxxxxxxxx0
f2cvt. */
- return 3494;
+ return 3499;
}
}
else
@@ -5842,7 +5842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110x110111000xxxxxxxxx0
bf1cvt. */
- return 3488;
+ return 3493;
}
else
{
@@ -5850,7 +5850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011110x110111000xxxxxxxxx0
bf2cvt. */
- return 3489;
+ return 3494;
}
}
}
@@ -5885,7 +5885,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001001xxx10111000xxxxxxxxx1
f1cvtl. */
- return 3495;
+ return 3500;
}
else
{
@@ -5893,7 +5893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxx10111000xxxxxxxxx1
f2cvtl. */
- return 3496;
+ return 3501;
}
}
else
@@ -5904,7 +5904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001011xxx10111000xxxxxxxxx1
bf1cvtl. */
- return 3490;
+ return 3495;
}
else
{
@@ -5912,7 +5912,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxx10111000xxxxxxxxx1
bf2cvtl. */
- return 3491;
+ return 3496;
}
}
}
@@ -8404,7 +8404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0111000001xxxxx101000xxxxxxxxxx
rcwswp. */
- return 3301;
+ return 3306;
}
else
{
@@ -8414,7 +8414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000001xxxxx101000xxxxxxxxxx
rcwsswp. */
- return 3309;
+ return 3314;
}
else
{
@@ -8434,7 +8434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0111000101xxxxx101000xxxxxxxxxx
rcwswpa. */
- return 3302;
+ return 3307;
}
else
{
@@ -8442,7 +8442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1111000101xxxxx101000xxxxxxxxxx
rcwsswpa. */
- return 3310;
+ [...]
[diff truncated at 100000 bytes]