[binutils-gdb] aarch64: Support for FEAT_CMPBR
Alice Carlotti
acarlotti@sourceware.org
Thu Jun 19 13:54:22 GMT 2025
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=a1f853de0ffdd4b9141479033f96cf56ca306b1b
commit a1f853de0ffdd4b9141479033f96cf56ca306b1b
Author: Ezra Sitorus <ezra.sitorus@arm.com>
Date: Wed Jun 4 20:42:53 2025 +0100
aarch64: Support for FEAT_CMPBR
FEAT_CMPBR - Compare and branch instructions. This patch adds these
instructions:
- CB<CC> (register)
- CB<CC> (immediate)
- CBH<CC>
- CBB<CC>
where CC is one of the following:
- EQ
- NE
- GT
- GE
- LT
- LE
- HI
- HS
- LO
- LS
Diff:
---
bfd/bfd-in2.h | 5 +
bfd/elfnn-aarch64.c | 3 +
bfd/libbfd.h | 1 +
bfd/reloc.c | 6 +
gas/config/tc-aarch64.c | 42 +-
gas/doc/c-aarch64.texi | 2 +
gas/testsuite/gas/aarch64/cmpbr-bad.d | 4 +
gas/testsuite/gas/aarch64/cmpbr-bad.l | 13 +
gas/testsuite/gas/aarch64/cmpbr-bad.s | 5 +
gas/testsuite/gas/aarch64/cmpbr-far.d | 4 +
gas/testsuite/gas/aarch64/cmpbr-far.l | 3 +
gas/testsuite/gas/aarch64/cmpbr-far.s | 13 +
gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.d | 4 +
gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.l | 3 +
gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.s | 3 +
gas/testsuite/gas/aarch64/cmpbr.d | 967 ++++
gas/testsuite/gas/aarch64/cmpbr.s | 727 +++
include/opcode/aarch64.h | 5 +
opcodes/aarch64-asm-2.c | 1317 ++---
opcodes/aarch64-dis-2.c | 6807 ++++++++++++++------------
opcodes/aarch64-opc-2.c | 103 +-
opcodes/aarch64-opc.c | 3 +
opcodes/aarch64-opc.h | 1 +
opcodes/aarch64-tbl.h | 66 +
24 files changed, 6176 insertions(+), 3931 deletions(-)
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index eca6d0c89e9..d5d1b518bcc 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -7025,6 +7025,11 @@ enum bfd_reloc_code_real
assembler and not (currently) written to any object files. */
BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
+ /* AArch64 9 bit pc-relative conditional branch and compare & branch.
+ The lowest two bits must be zero and are not stored in the
+ instruction, giving an 11 bit signed byte offset. */
+ BFD_RELOC_AARCH64_BRANCH9,
+
/* Tilera TILEPro Relocations. */
BFD_RELOC_TILEPRO_COPY,
BFD_RELOC_TILEPRO_GLOB_DAT,
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 548da1f8b30..8f399204f04 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -2268,6 +2268,9 @@ elfNN_aarch64_howto_from_bfd_reloc (bfd_reloc_code_real_type code)
if (code == BFD_RELOC_AARCH64_NONE)
return &elfNN_aarch64_howto_none;
+ if (code == BFD_RELOC_AARCH64_BRANCH9)
+ return &elfNN_aarch64_howto_none;
+
return NULL;
}
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index d367fea33d3..3cb3c144228 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -3230,6 +3230,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_AARCH64_LD_GOT_LO12_NC",
"BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC",
"BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC",
+ "BFD_RELOC_AARCH64_BRANCH9",
"BFD_RELOC_TILEPRO_COPY",
"BFD_RELOC_TILEPRO_GLOB_DAT",
"BFD_RELOC_TILEPRO_JMP_SLOT",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index d3ddafb7305..c9d53bb9e11 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -7418,6 +7418,12 @@ ENUM
ENUMDOC
AArch64 pseudo relocation code to be used internally by the AArch64
assembler and not (currently) written to any object files.
+ENUM
+ BFD_RELOC_AARCH64_BRANCH9
+ENUMDOC
+ AArch64 9 bit pc-relative conditional branch and compare & branch.
+ The lowest two bits must be zero and are not stored in the
+ instruction, giving an 11 bit signed byte offset.
ENUM
BFD_RELOC_TILEPRO_COPY
ENUMX
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index b4bd1bcb4bb..365772e672e 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -5175,6 +5175,13 @@ encode_branch_ofs_26 (uint32_t ofs)
return ofs & ((1 << 26) - 1);
}
+/* encode the 9-bit offset of FEAT_CMPBR compare and branch */
+static inline uint32_t
+encode_cond_branch_ofs_9 (uint32_t ofs)
+{
+ return (ofs & ((1 << 9) - 1)) << 5;
+}
+
/* encode the 19-bit offset of conditional branch and compare & branch */
static inline uint32_t
encode_cond_branch_ofs_19 (uint32_t ofs)
@@ -6385,6 +6392,8 @@ process_omitted_operand (enum aarch64_opnd type, const aarch64_opcode *opcode,
case AARCH64_OPND_UIMM3_OP2:
case AARCH64_OPND_IMM:
case AARCH64_OPND_IMM_2:
+ case AARCH64_OPND_IMMP1_2:
+ case AARCH64_OPND_IMMS1_2:
case AARCH64_OPND_WIDTH:
case AARCH64_OPND_UIMM7:
case AARCH64_OPND_NZCV:
@@ -7152,6 +7161,16 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->imm.value = val;
break;
+ case AARCH64_OPND_IMMP1_2:
+ po_imm_or_fail (1, 64);
+ info->imm.value = val - 1;
+ break;
+
+ case AARCH64_OPND_IMMS1_2:
+ po_imm_or_fail (-1, 62);
+ info->imm.value = val + 1;
+ break;
+
case AARCH64_OPND_SVE_AIMM:
case AARCH64_OPND_SVE_ASIMM:
po_imm_nc_or_fail ();
@@ -7448,6 +7467,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->imm.value = 0;
break;
+ case AARCH64_OPND_ADDR_PCREL9:
case AARCH64_OPND_ADDR_PCREL14:
case AARCH64_OPND_ADDR_PCREL19:
case AARCH64_OPND_ADDR_PCREL21:
@@ -7485,8 +7505,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case compbranch:
case condbranch:
/* e.g. CBZ or B.COND */
- gas_assert (operands[i] == AARCH64_OPND_ADDR_PCREL19);
- inst.reloc.type = BFD_RELOC_AARCH64_BRANCH19;
+ gas_assert (operands[i] == AARCH64_OPND_ADDR_PCREL9
+ || operands[i] == AARCH64_OPND_ADDR_PCREL19);
+ inst.reloc.type = (operands[i] == AARCH64_OPND_ADDR_PCREL9)
+ ? BFD_RELOC_AARCH64_BRANCH9
+ : BFD_RELOC_AARCH64_BRANCH19;
break;
case testbranch:
/* e.g. TBZ */
@@ -9688,6 +9711,20 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
}
break;
+ case BFD_RELOC_AARCH64_BRANCH9:
+ if (fixP->fx_done || !seg->use_rela_p)
+ {
+ if (value & 3)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("conditional branch target not word aligned"));
+ if (signed_overflow (value, 11))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("conditional branch out of range"));
+ insn = get_aarch64_insn (buf);
+ insn |= encode_cond_branch_ofs_9 (value >> 2);
+ put_aarch64_insn (buf, insn);
+ }
+ break;
case BFD_RELOC_AARCH64_BRANCH19:
if (fixP->fx_done || !seg->use_rela_p)
{
@@ -10692,6 +10729,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"ssbs", AARCH64_FEATURE (SSBS), AARCH64_NO_FEATURES},
{"memtag", AARCH64_FEATURE (MEMTAG), AARCH64_NO_FEATURES},
{"occmo", AARCH64_FEATURE (OCCMO), AARCH64_NO_FEATURES},
+ {"cmpbr", AARCH64_FEATURE (CMPBR), AARCH64_NO_FEATURES},
{"sve2", AARCH64_FEATURE (SVE2), AARCH64_FEATURE (SVE)},
{"sve2-sm4", AARCH64_FEATURE (SVE2_SM4),
AARCH64_FEATURES (2, SVE2, SM4)},
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index a1075a29e6c..9ef0dd6d281 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -167,6 +167,8 @@ automatically cause those extensions to be disabled.
@tab Enable the Branch Record Buffer extension.
@item @code{chk} @tab
@tab Enable the Check Feature Status Extension.
+@item @code{cmpbr} @tab
+ @tab Enable Compare and Branch instructions.
@item @code{compnum} @tab @code{simd}
@tab Enable the complex number SIMD extensions. An alias of @code{fcma}.
@item @code{cpa} @tab
diff --git a/gas/testsuite/gas/aarch64/cmpbr-bad.d b/gas/testsuite/gas/aarch64/cmpbr-bad.d
new file mode 100644
index 00000000000..6487979e85f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-bad.d
@@ -0,0 +1,4 @@
+#name: Test of invalid cmpbr operands
+#source: cmpbr-bad.s
+#as: -march=armv8-a+cmpbr
+#error_output: cmpbr-bad.l
diff --git a/gas/testsuite/gas/aarch64/cmpbr-bad.l b/gas/testsuite/gas/aarch64/cmpbr-bad.l
new file mode 100644
index 00000000000..f705cfd0043
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-bad.l
@@ -0,0 +1,13 @@
+.[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: operand mismatch -- `cbgt w0,x1,a'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cbgt w0, w1, #0x0
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: cbgt x0, x1, #0x0
+[^ :]+:[0-9]+: Error: immediate value out of range 0 to 63 at operand 2 -- `cbgt w0,#64,a'
+[^ :]+:[0-9]+: Error: operand mismatch -- `cbbgt x0,x1,a'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cbbgt w0, w1, #0x0
+[^ :]+:[0-9]+: Error: operand mismatch -- `cbhgt x0,x1,a'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cbhgt w0, w1, #0x0
diff --git a/gas/testsuite/gas/aarch64/cmpbr-bad.s b/gas/testsuite/gas/aarch64/cmpbr-bad.s
new file mode 100644
index 00000000000..8fb1e617254
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-bad.s
@@ -0,0 +1,5 @@
+a:
+ cbgt w0, x1, a
+ cbgt w0, #64, a
+ cbbgt x0, x1, a
+ cbhgt x0, x1, a
diff --git a/gas/testsuite/gas/aarch64/cmpbr-far.d b/gas/testsuite/gas/aarch64/cmpbr-far.d
new file mode 100644
index 00000000000..a027cdfb837
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-far.d
@@ -0,0 +1,4 @@
+#name: CMPBR instructions that branch too far
+#source: cmpbr-far.s
+#as: -march=armv8-a+cmpbr
+#error_output: cmpbr-far.l
diff --git a/gas/testsuite/gas/aarch64/cmpbr-far.l b/gas/testsuite/gas/aarch64/cmpbr-far.l
new file mode 100644
index 00000000000..6432035a1f3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-far.l
@@ -0,0 +1,3 @@
+.[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: conditional branch out of range
+[^ :]+:[0-9]+: Error: conditional branch out of range
diff --git a/gas/testsuite/gas/aarch64/cmpbr-far.s b/gas/testsuite/gas/aarch64/cmpbr-far.s
new file mode 100644
index 00000000000..927d4229a60
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-far.s
@@ -0,0 +1,13 @@
+a:
+ .rept 257
+ nop
+ .endr
+ cbgt w0, w1, a
+
+ cbgt w0, w1, b
+ .rept 255
+ nop
+ .endr
+
+b:
+ nop
diff --git a/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.d b/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.d
new file mode 100644
index 00000000000..444b554a8d9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.d
@@ -0,0 +1,4 @@
+#name: Test of out-of-range cmpbr operands
+#source: cmpbr-pseudo-bad.s
+#as: -march=armv8-a+cmpbr
+#error_output: cmpbr-pseudo-bad.l
diff --git a/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.l b/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.l
new file mode 100644
index 00000000000..3839baf9772
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.l
@@ -0,0 +1,3 @@
+.[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 64 at operand 2 -- `cbge w0,#0,a'
+[^ :]+:[0-9]+: Error: immediate value out of range -1 to 62 at operand 2 -- `cble w0,#63,a'
diff --git a/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.s b/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.s
new file mode 100644
index 00000000000..1fd0c3a3909
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr-pseudo-bad.s
@@ -0,0 +1,3 @@
+a:
+ cbge w0, #0, a
+ cble w0, #63, a
diff --git a/gas/testsuite/gas/aarch64/cmpbr.d b/gas/testsuite/gas/aarch64/cmpbr.d
new file mode 100644
index 00000000000..457fdd732cc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr.d
@@ -0,0 +1,967 @@
+#name: Test for FEAT_CMPBR
+#as: -march=armv8-a+cmpbr
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section .text:
+
+.* <cbgt_0>:
+.*: 75000000 cbgt w0, #0, 0 <cbgt_0>
+.*: 75003fe0 cbgt w0, #0, 0 <cbgt_0>
+
+.* <cbgt_1>:
+.*: 751f8000 cbgt w0, #63, 8 <cbgt_1>
+.*: 751fbfe0 cbgt w0, #63, 8 <cbgt_1>
+
+.* <cbgt_2>:
+.*: 7500001f cbgt wzr, #0, 10 <cbgt_2>
+.*: 75003fff cbgt wzr, #0, 10 <cbgt_2>
+
+.* <cbgt_3>:
+.*: 751f801f cbgt wzr, #63, 18 <cbgt_3>
+.*: 751fbfff cbgt wzr, #63, 18 <cbgt_3>
+
+.* <cbgt_4>:
+.*: f5000000 cbgt x0, #0, 20 <cbgt_4>
+.*: f5003fe0 cbgt x0, #0, 20 <cbgt_4>
+
+.* <cbgt_5>:
+.*: f51f8000 cbgt x0, #63, 28 <cbgt_5>
+.*: f51fbfe0 cbgt x0, #63, 28 <cbgt_5>
+
+.* <cbgt_6>:
+.*: f500001f cbgt xzr, #0, 30 <cbgt_6>
+.*: f5003fff cbgt xzr, #0, 30 <cbgt_6>
+
+.* <cbgt_7>:
+.*: f51f801f cbgt xzr, #63, 38 <cbgt_7>
+.*: f51fbfff cbgt xzr, #63, 38 <cbgt_7>
+
+.* <cblt_0>:
+.*: 75200000 cblt w0, #0, 40 <cblt_0>
+.*: 75203fe0 cblt w0, #0, 40 <cblt_0>
+
+.* <cblt_1>:
+.*: 753f8000 cblt w0, #63, 48 <cblt_1>
+.*: 753fbfe0 cblt w0, #63, 48 <cblt_1>
+
+.* <cblt_2>:
+.*: 7520001f cblt wzr, #0, 50 <cblt_2>
+.*: 75203fff cblt wzr, #0, 50 <cblt_2>
+
+.* <cblt_3>:
+.*: 753f801f cblt wzr, #63, 58 <cblt_3>
+.*: 753fbfff cblt wzr, #63, 58 <cblt_3>
+
+.* <cblt_4>:
+.*: f5200000 cblt x0, #0, 60 <cblt_4>
+.*: f5203fe0 cblt x0, #0, 60 <cblt_4>
+
+.* <cblt_5>:
+.*: f53f8000 cblt x0, #63, 68 <cblt_5>
+.*: f53fbfe0 cblt x0, #63, 68 <cblt_5>
+
+.* <cblt_6>:
+.*: f520001f cblt xzr, #0, 70 <cblt_6>
+.*: f5203fff cblt xzr, #0, 70 <cblt_6>
+
+.* <cblt_7>:
+.*: f53f801f cblt xzr, #63, 78 <cblt_7>
+.*: f53fbfff cblt xzr, #63, 78 <cblt_7>
+
+.* <cbhi_0>:
+.*: 75400000 cbhi w0, #0, 80 <cbhi_0>
+.*: 75403fe0 cbhi w0, #0, 80 <cbhi_0>
+
+.* <cbhi_1>:
+.*: 755f8000 cbhi w0, #63, 88 <cbhi_1>
+.*: 755fbfe0 cbhi w0, #63, 88 <cbhi_1>
+
+.* <cbhi_2>:
+.*: 7540001f cbhi wzr, #0, 90 <cbhi_2>
+.*: 75403fff cbhi wzr, #0, 90 <cbhi_2>
+
+.* <cbhi_3>:
+.*: 755f801f cbhi wzr, #63, 98 <cbhi_3>
+.*: 755fbfff cbhi wzr, #63, 98 <cbhi_3>
+
+.* <cbhi_4>:
+.*: f5400000 cbhi x0, #0, a0 <cbhi_4>
+.*: f5403fe0 cbhi x0, #0, a0 <cbhi_4>
+
+.* <cbhi_5>:
+.*: f55f8000 cbhi x0, #63, a8 <cbhi_5>
+.*: f55fbfe0 cbhi x0, #63, a8 <cbhi_5>
+
+.* <cbhi_6>:
+.*: f540001f cbhi xzr, #0, b0 <cbhi_6>
+.*: f5403fff cbhi xzr, #0, b0 <cbhi_6>
+
+.* <cbhi_7>:
+.*: f55f801f cbhi xzr, #63, b8 <cbhi_7>
+.*: f55fbfff cbhi xzr, #63, b8 <cbhi_7>
+
+.* <cblo_0>:
+.*: 75600000 cblo w0, #0, c0 <cblo_0>
+.*: 75603fe0 cblo w0, #0, c0 <cblo_0>
+
+.* <cblo_1>:
+.*: 757f8000 cblo w0, #63, c8 <cblo_1>
+.*: 757fbfe0 cblo w0, #63, c8 <cblo_1>
+
+.* <cblo_2>:
+.*: 7560001f cblo wzr, #0, d0 <cblo_2>
+.*: 75603fff cblo wzr, #0, d0 <cblo_2>
+
+.* <cblo_3>:
+.*: 757f801f cblo wzr, #63, d8 <cblo_3>
+.*: 757fbfff cblo wzr, #63, d8 <cblo_3>
+
+.* <cblo_4>:
+.*: f5600000 cblo x0, #0, e0 <cblo_4>
+.*: f5603fe0 cblo x0, #0, e0 <cblo_4>
+
+.* <cblo_5>:
+.*: f57f8000 cblo x0, #63, e8 <cblo_5>
+.*: f57fbfe0 cblo x0, #63, e8 <cblo_5>
+
+.* <cblo_6>:
+.*: f560001f cblo xzr, #0, f0 <cblo_6>
+.*: f5603fff cblo xzr, #0, f0 <cblo_6>
+
+.* <cblo_7>:
+.*: f57f801f cblo xzr, #63, f8 <cblo_7>
+.*: f57fbfff cblo xzr, #63, f8 <cblo_7>
+
+.* <cbeq_0>:
+.*: 75c00000 cbeq w0, #0, 100 <cbeq_0>
+.*: 75c03fe0 cbeq w0, #0, 100 <cbeq_0>
+
+.* <cbeq_1>:
+.*: 75df8000 cbeq w0, #63, 108 <cbeq_1>
+.*: 75dfbfe0 cbeq w0, #63, 108 <cbeq_1>
+
+.* <cbeq_2>:
+.*: 75c0001f cbeq wzr, #0, 110 <cbeq_2>
+.*: 75c03fff cbeq wzr, #0, 110 <cbeq_2>
+
+.* <cbeq_3>:
+.*: 75df801f cbeq wzr, #63, 118 <cbeq_3>
+.*: 75dfbfff cbeq wzr, #63, 118 <cbeq_3>
+
+.* <cbeq_4>:
+.*: f5c00000 cbeq x0, #0, 120 <cbeq_4>
+.*: f5c03fe0 cbeq x0, #0, 120 <cbeq_4>
+
+.* <cbeq_5>:
+.*: f5df8000 cbeq x0, #63, 128 <cbeq_5>
+.*: f5dfbfe0 cbeq x0, #63, 128 <cbeq_5>
+
+.* <cbeq_6>:
+.*: f5c0001f cbeq xzr, #0, 130 <cbeq_6>
+.*: f5c03fff cbeq xzr, #0, 130 <cbeq_6>
+
+.* <cbeq_7>:
+.*: f5df801f cbeq xzr, #63, 138 <cbeq_7>
+.*: f5dfbfff cbeq xzr, #63, 138 <cbeq_7>
+
+.* <cbne_0>:
+.*: 75e00000 cbne w0, #0, 140 <cbne_0>
+.*: 75e03fe0 cbne w0, #0, 140 <cbne_0>
+
+.* <cbne_1>:
+.*: 75ff8000 cbne w0, #63, 148 <cbne_1>
+.*: 75ffbfe0 cbne w0, #63, 148 <cbne_1>
+
+.* <cbne_2>:
+.*: 75e0001f cbne wzr, #0, 150 <cbne_2>
+.*: 75e03fff cbne wzr, #0, 150 <cbne_2>
+
+.* <cbne_3>:
+.*: 75ff801f cbne wzr, #63, 158 <cbne_3>
+.*: 75ffbfff cbne wzr, #63, 158 <cbne_3>
+
+.* <cbne_4>:
+.*: f5e00000 cbne x0, #0, 160 <cbne_4>
+.*: f5e03fe0 cbne x0, #0, 160 <cbne_4>
+
+.* <cbne_5>:
+.*: f5ff8000 cbne x0, #63, 168 <cbne_5>
+.*: f5ffbfe0 cbne x0, #63, 168 <cbne_5>
+
+.* <cbne_6>:
+.*: f5e0001f cbne xzr, #0, 170 <cbne_6>
+.*: f5e03fff cbne xzr, #0, 170 <cbne_6>
+
+.* <cbne_7>:
+.*: f5ff801f cbne xzr, #63, 178 <cbne_7>
+.*: f5ffbfff cbne xzr, #63, 178 <cbne_7>
+
+.* <cbgt_8>:
+.*: 74000000 cbgt w0, w0, 180 <cbgt_8>
+.*: 74003fe0 cbgt w0, w0, 180 <cbgt_8>
+
+.* <cbgt_9>:
+.*: 741f0000 cbgt w0, wzr, 188 <cbgt_9>
+.*: 741f3fe0 cbgt w0, wzr, 188 <cbgt_9>
+
+.* <cbgt_10>:
+.*: 7400001f cbgt wzr, w0, 190 <cbgt_10>
+.*: 74003fff cbgt wzr, w0, 190 <cbgt_10>
+
+.* <cbgt_11>:
+.*: 741f001f cbgt wzr, wzr, 198 <cbgt_11>
+.*: 741f3fff cbgt wzr, wzr, 198 <cbgt_11>
+
+.* <cbgt_12>:
+.*: f4000000 cbgt x0, x0, 1a0 <cbgt_12>
+.*: f4003fe0 cbgt x0, x0, 1a0 <cbgt_12>
+
+.* <cbgt_13>:
+.*: f41f0000 cbgt x0, xzr, 1a8 <cbgt_13>
+.*: f41f3fe0 cbgt x0, xzr, 1a8 <cbgt_13>
+
+.* <cbgt_14>:
+.*: f400001f cbgt xzr, x0, 1b0 <cbgt_14>
+.*: f4003fff cbgt xzr, x0, 1b0 <cbgt_14>
+
+.* <cbgt_15>:
+.*: f41f001f cbgt xzr, xzr, 1b8 <cbgt_15>
+.*: f41f3fff cbgt xzr, xzr, 1b8 <cbgt_15>
+
+.* <cbge_8>:
+.*: 74200000 cbge w0, w0, 1c0 <cbge_8>
+.*: 74203fe0 cbge w0, w0, 1c0 <cbge_8>
+
+.* <cbge_9>:
+.*: 743f0000 cbge w0, wzr, 1c8 <cbge_9>
+.*: 743f3fe0 cbge w0, wzr, 1c8 <cbge_9>
+
+.* <cbge_10>:
+.*: 7420001f cbge wzr, w0, 1d0 <cbge_10>
+.*: 74203fff cbge wzr, w0, 1d0 <cbge_10>
+
+.* <cbge_11>:
+.*: 743f001f cbge wzr, wzr, 1d8 <cbge_11>
+.*: 743f3fff cbge wzr, wzr, 1d8 <cbge_11>
+
+.* <cbge_12>:
+.*: f4200000 cbge x0, x0, 1e0 <cbge_12>
+.*: f4203fe0 cbge x0, x0, 1e0 <cbge_12>
+
+.* <cbge_13>:
+.*: f43f0000 cbge x0, xzr, 1e8 <cbge_13>
+.*: f43f3fe0 cbge x0, xzr, 1e8 <cbge_13>
+
+.* <cbge_14>:
+.*: f420001f cbge xzr, x0, 1f0 <cbge_14>
+.*: f4203fff cbge xzr, x0, 1f0 <cbge_14>
+
+.* <cbge_15>:
+.*: f43f001f cbge xzr, xzr, 1f8 <cbge_15>
+.*: f43f3fff cbge xzr, xzr, 1f8 <cbge_15>
+
+.* <cbhi_8>:
+.*: 74400000 cbhi w0, w0, 200 <cbhi_8>
+.*: 74403fe0 cbhi w0, w0, 200 <cbhi_8>
+
+.* <cbhi_9>:
+.*: 745f0000 cbhi w0, wzr, 208 <cbhi_9>
+.*: 745f3fe0 cbhi w0, wzr, 208 <cbhi_9>
+
+.* <cbhi_10>:
+.*: 7440001f cbhi wzr, w0, 210 <cbhi_10>
+.*: 74403fff cbhi wzr, w0, 210 <cbhi_10>
+
+.* <cbhi_11>:
+.*: 745f001f cbhi wzr, wzr, 218 <cbhi_11>
+.*: 745f3fff cbhi wzr, wzr, 218 <cbhi_11>
+
+.* <cbhi_12>:
+.*: f4400000 cbhi x0, x0, 220 <cbhi_12>
+.*: f4403fe0 cbhi x0, x0, 220 <cbhi_12>
+
+.* <cbhi_13>:
+.*: f45f0000 cbhi x0, xzr, 228 <cbhi_13>
+.*: f45f3fe0 cbhi x0, xzr, 228 <cbhi_13>
+
+.* <cbhi_14>:
+.*: f440001f cbhi xzr, x0, 230 <cbhi_14>
+.*: f4403fff cbhi xzr, x0, 230 <cbhi_14>
+
+.* <cbhi_15>:
+.*: f45f001f cbhi xzr, xzr, 238 <cbhi_15>
+.*: f45f3fff cbhi xzr, xzr, 238 <cbhi_15>
+
+.* <cbhs_8>:
+.*: 74600000 cbhs w0, w0, 240 <cbhs_8>
+.*: 74603fe0 cbhs w0, w0, 240 <cbhs_8>
+
+.* <cbhs_9>:
+.*: 747f0000 cbhs w0, wzr, 248 <cbhs_9>
+.*: 747f3fe0 cbhs w0, wzr, 248 <cbhs_9>
+
+.* <cbhs_10>:
+.*: 7460001f cbhs wzr, w0, 250 <cbhs_10>
+.*: 74603fff cbhs wzr, w0, 250 <cbhs_10>
+
+.* <cbhs_11>:
+.*: 747f001f cbhs wzr, wzr, 258 <cbhs_11>
+.*: 747f3fff cbhs wzr, wzr, 258 <cbhs_11>
+
+.* <cbhs_12>:
+.*: f4600000 cbhs x0, x0, 260 <cbhs_12>
+.*: f4603fe0 cbhs x0, x0, 260 <cbhs_12>
+
+.* <cbhs_13>:
+.*: f47f0000 cbhs x0, xzr, 268 <cbhs_13>
+.*: f47f3fe0 cbhs x0, xzr, 268 <cbhs_13>
+
+.* <cbhs_14>:
+.*: f460001f cbhs xzr, x0, 270 <cbhs_14>
+.*: f4603fff cbhs xzr, x0, 270 <cbhs_14>
+
+.* <cbhs_15>:
+.*: f47f001f cbhs xzr, xzr, 278 <cbhs_15>
+.*: f47f3fff cbhs xzr, xzr, 278 <cbhs_15>
+
+.* <cbeq_8>:
+.*: 74c00000 cbeq w0, w0, 280 <cbeq_8>
+.*: 74c03fe0 cbeq w0, w0, 280 <cbeq_8>
+
+.* <cbeq_9>:
+.*: 74df0000 cbeq w0, wzr, 288 <cbeq_9>
+.*: 74df3fe0 cbeq w0, wzr, 288 <cbeq_9>
+
+.* <cbeq_10>:
+.*: 74c0001f cbeq wzr, w0, 290 <cbeq_10>
+.*: 74c03fff cbeq wzr, w0, 290 <cbeq_10>
+
+.* <cbeq_11>:
+.*: 74df001f cbeq wzr, wzr, 298 <cbeq_11>
+.*: 74df3fff cbeq wzr, wzr, 298 <cbeq_11>
+
+.* <cbeq_12>:
+.*: f4c00000 cbeq x0, x0, 2a0 <cbeq_12>
+.*: f4c03fe0 cbeq x0, x0, 2a0 <cbeq_12>
+
+.* <cbeq_13>:
+.*: f4df0000 cbeq x0, xzr, 2a8 <cbeq_13>
+.*: f4df3fe0 cbeq x0, xzr, 2a8 <cbeq_13>
+
+.* <cbeq_14>:
+.*: f4c0001f cbeq xzr, x0, 2b0 <cbeq_14>
+.*: f4c03fff cbeq xzr, x0, 2b0 <cbeq_14>
+
+.* <cbeq_15>:
+.*: f4df001f cbeq xzr, xzr, 2b8 <cbeq_15>
+.*: f4df3fff cbeq xzr, xzr, 2b8 <cbeq_15>
+
+.* <cbne_8>:
+.*: 74e00000 cbne w0, w0, 2c0 <cbne_8>
+.*: 74e03fe0 cbne w0, w0, 2c0 <cbne_8>
+
+.* <cbne_9>:
+.*: 74ff0000 cbne w0, wzr, 2c8 <cbne_9>
+.*: 74ff3fe0 cbne w0, wzr, 2c8 <cbne_9>
+
+.* <cbne_10>:
+.*: 74e0001f cbne wzr, w0, 2d0 <cbne_10>
+.*: 74e03fff cbne wzr, w0, 2d0 <cbne_10>
+
+.* <cbne_11>:
+.*: 74ff001f cbne wzr, wzr, 2d8 <cbne_11>
+.*: 74ff3fff cbne wzr, wzr, 2d8 <cbne_11>
+
+.* <cbne_12>:
+.*: f4e00000 cbne x0, x0, 2e0 <cbne_12>
+.*: f4e03fe0 cbne x0, x0, 2e0 <cbne_12>
+
+.* <cbne_13>:
+.*: f4ff0000 cbne x0, xzr, 2e8 <cbne_13>
+.*: f4ff3fe0 cbne x0, xzr, 2e8 <cbne_13>
+
+.* <cbne_14>:
+.*: f4e0001f cbne xzr, x0, 2f0 <cbne_14>
+.*: f4e03fff cbne xzr, x0, 2f0 <cbne_14>
+
+.* <cbne_15>:
+.*: f4ff001f cbne xzr, xzr, 2f8 <cbne_15>
+.*: f4ff3fff cbne xzr, xzr, 2f8 <cbne_15>
+
+.* <cbbgt_0>:
+.*: 74008000 cbbgt w0, w0, 300 <cbbgt_0>
+.*: 7400bfe0 cbbgt w0, w0, 300 <cbbgt_0>
+
+.* <cbbgt_1>:
+.*: 741f8000 cbbgt w0, wzr, 308 <cbbgt_1>
+.*: 741fbfe0 cbbgt w0, wzr, 308 <cbbgt_1>
+
+.* <cbbgt_2>:
+.*: 7400801f cbbgt wzr, w0, 310 <cbbgt_2>
+.*: 7400bfff cbbgt wzr, w0, 310 <cbbgt_2>
+
+.* <cbbgt_3>:
+.*: 741f801f cbbgt wzr, wzr, 318 <cbbgt_3>
+.*: 741fbfff cbbgt wzr, wzr, 318 <cbbgt_3>
+
+.* <cbbge_0>:
+.*: 74208000 cbbge w0, w0, 320 <cbbge_0>
+.*: 7420bfe0 cbbge w0, w0, 320 <cbbge_0>
+
+.* <cbbge_1>:
+.*: 743f8000 cbbge w0, wzr, 328 <cbbge_1>
+.*: 743fbfe0 cbbge w0, wzr, 328 <cbbge_1>
+
+.* <cbbge_2>:
+.*: 7420801f cbbge wzr, w0, 330 <cbbge_2>
+.*: 7420bfff cbbge wzr, w0, 330 <cbbge_2>
+
+.* <cbbge_3>:
+.*: 743f801f cbbge wzr, wzr, 338 <cbbge_3>
+.*: 743fbfff cbbge wzr, wzr, 338 <cbbge_3>
+
+.* <cbbhi_0>:
+.*: 74408000 cbbhi w0, w0, 340 <cbbhi_0>
+.*: 7440bfe0 cbbhi w0, w0, 340 <cbbhi_0>
+
+.* <cbbhi_1>:
+.*: 745f8000 cbbhi w0, wzr, 348 <cbbhi_1>
+.*: 745fbfe0 cbbhi w0, wzr, 348 <cbbhi_1>
+
+.* <cbbhi_2>:
+.*: 7440801f cbbhi wzr, w0, 350 <cbbhi_2>
+.*: 7440bfff cbbhi wzr, w0, 350 <cbbhi_2>
+
+.* <cbbhi_3>:
+.*: 745f801f cbbhi wzr, wzr, 358 <cbbhi_3>
+.*: 745fbfff cbbhi wzr, wzr, 358 <cbbhi_3>
+
+.* <cbbhs_0>:
+.*: 74608000 cbbhs w0, w0, 360 <cbbhs_0>
+.*: 7460bfe0 cbbhs w0, w0, 360 <cbbhs_0>
+
+.* <cbbhs_1>:
+.*: 747f8000 cbbhs w0, wzr, 368 <cbbhs_1>
+.*: 747fbfe0 cbbhs w0, wzr, 368 <cbbhs_1>
+
+.* <cbbhs_2>:
+.*: 7460801f cbbhs wzr, w0, 370 <cbbhs_2>
+.*: 7460bfff cbbhs wzr, w0, 370 <cbbhs_2>
+
+.* <cbbhs_3>:
+.*: 747f801f cbbhs wzr, wzr, 378 <cbbhs_3>
+.*: 747fbfff cbbhs wzr, wzr, 378 <cbbhs_3>
+
+.* <cbbeq_0>:
+.*: 74c08000 cbbeq w0, w0, 380 <cbbeq_0>
+.*: 74c0bfe0 cbbeq w0, w0, 380 <cbbeq_0>
+
+.* <cbbeq_1>:
+.*: 74df8000 cbbeq w0, wzr, 388 <cbbeq_1>
+.*: 74dfbfe0 cbbeq w0, wzr, 388 <cbbeq_1>
+
+.* <cbbeq_2>:
+.*: 74c0801f cbbeq wzr, w0, 390 <cbbeq_2>
+.*: 74c0bfff cbbeq wzr, w0, 390 <cbbeq_2>
+
+.* <cbbeq_3>:
+.*: 74df801f cbbeq wzr, wzr, 398 <cbbeq_3>
+.*: 74dfbfff cbbeq wzr, wzr, 398 <cbbeq_3>
+
+.* <cbbne_0>:
+.*: 74e08000 cbbne w0, w0, 3a0 <cbbne_0>
+.*: 74e0bfe0 cbbne w0, w0, 3a0 <cbbne_0>
+
+.* <cbbne_1>:
+.*: 74ff8000 cbbne w0, wzr, 3a8 <cbbne_1>
+.*: 74ffbfe0 cbbne w0, wzr, 3a8 <cbbne_1>
+
+.* <cbbne_2>:
+.*: 74e0801f cbbne wzr, w0, 3b0 <cbbne_2>
+.*: 74e0bfff cbbne wzr, w0, 3b0 <cbbne_2>
+
+.* <cbbne_3>:
+.*: 74ff801f cbbne wzr, wzr, 3b8 <cbbne_3>
+.*: 74ffbfff cbbne wzr, wzr, 3b8 <cbbne_3>
+
+.* <cbhgt_0>:
+.*: 7400c000 cbhgt w0, w0, 3c0 <cbhgt_0>
+.*: 7400ffe0 cbhgt w0, w0, 3c0 <cbhgt_0>
+
+.* <cbhgt_1>:
+.*: 741fc000 cbhgt w0, wzr, 3c8 <cbhgt_1>
+.*: 741fffe0 cbhgt w0, wzr, 3c8 <cbhgt_1>
+
+.* <cbhgt_2>:
+.*: 7400c01f cbhgt wzr, w0, 3d0 <cbhgt_2>
+.*: 7400ffff cbhgt wzr, w0, 3d0 <cbhgt_2>
+
+.* <cbhgt_3>:
+.*: 741fc01f cbhgt wzr, wzr, 3d8 <cbhgt_3>
+.*: 741fffff cbhgt wzr, wzr, 3d8 <cbhgt_3>
+
+.* <cbhge_0>:
+.*: 7420c000 cbhge w0, w0, 3e0 <cbhge_0>
+.*: 7420ffe0 cbhge w0, w0, 3e0 <cbhge_0>
+
+.* <cbhge_1>:
+.*: 743fc000 cbhge w0, wzr, 3e8 <cbhge_1>
+.*: 743fffe0 cbhge w0, wzr, 3e8 <cbhge_1>
+
+.* <cbhge_2>:
+.*: 7420c01f cbhge wzr, w0, 3f0 <cbhge_2>
+.*: 7420ffff cbhge wzr, w0, 3f0 <cbhge_2>
+
+.* <cbhge_3>:
+.*: 743fc01f cbhge wzr, wzr, 3f8 <cbhge_3>
+.*: 743fffff cbhge wzr, wzr, 3f8 <cbhge_3>
+
+.* <cbhhi_0>:
+.*: 7440c000 cbhhi w0, w0, 400 <cbhhi_0>
+.*: 7440ffe0 cbhhi w0, w0, 400 <cbhhi_0>
+
+.* <cbhhi_1>:
+.*: 745fc000 cbhhi w0, wzr, 408 <cbhhi_1>
+.*: 745fffe0 cbhhi w0, wzr, 408 <cbhhi_1>
+
+.* <cbhhi_2>:
+.*: 7440c01f cbhhi wzr, w0, 410 <cbhhi_2>
+.*: 7440ffff cbhhi wzr, w0, 410 <cbhhi_2>
+
+.* <cbhhi_3>:
+.*: 745fc01f cbhhi wzr, wzr, 418 <cbhhi_3>
+.*: 745fffff cbhhi wzr, wzr, 418 <cbhhi_3>
+
+.* <cbhhs_0>:
+.*: 7460c000 cbhhs w0, w0, 420 <cbhhs_0>
+.*: 7460ffe0 cbhhs w0, w0, 420 <cbhhs_0>
+
+.* <cbhhs_1>:
+.*: 747fc000 cbhhs w0, wzr, 428 <cbhhs_1>
+.*: 747fffe0 cbhhs w0, wzr, 428 <cbhhs_1>
+
+.* <cbhhs_2>:
+.*: 7460c01f cbhhs wzr, w0, 430 <cbhhs_2>
+.*: 7460ffff cbhhs wzr, w0, 430 <cbhhs_2>
+
+.* <cbhhs_3>:
+.*: 747fc01f cbhhs wzr, wzr, 438 <cbhhs_3>
+.*: 747fffff cbhhs wzr, wzr, 438 <cbhhs_3>
+
+.* <cbheq_0>:
+.*: 74c0c000 cbheq w0, w0, 440 <cbheq_0>
+.*: 74c0ffe0 cbheq w0, w0, 440 <cbheq_0>
+
+.* <cbheq_1>:
+.*: 74dfc000 cbheq w0, wzr, 448 <cbheq_1>
+.*: 74dfffe0 cbheq w0, wzr, 448 <cbheq_1>
+
+.* <cbheq_2>:
+.*: 74c0c01f cbheq wzr, w0, 450 <cbheq_2>
+.*: 74c0ffff cbheq wzr, w0, 450 <cbheq_2>
+
+.* <cbheq_3>:
+.*: 74dfc01f cbheq wzr, wzr, 458 <cbheq_3>
+.*: 74dfffff cbheq wzr, wzr, 458 <cbheq_3>
+
+.* <cbhne_0>:
+.*: 74e0c000 cbhne w0, w0, 460 <cbhne_0>
+.*: 74e0ffe0 cbhne w0, w0, 460 <cbhne_0>
+
+.* <cbhne_1>:
+.*: 74ffc000 cbhne w0, wzr, 468 <cbhne_1>
+.*: 74ffffe0 cbhne w0, wzr, 468 <cbhne_1>
+
+.* <cbhne_2>:
+.*: 74e0c01f cbhne wzr, w0, 470 <cbhne_2>
+.*: 74e0ffff cbhne wzr, w0, 470 <cbhne_2>
+
+.* <cbhne_3>:
+.*: 74ffc01f cbhne wzr, wzr, 478 <cbhne_3>
+.*: 74ffffff cbhne wzr, wzr, 478 <cbhne_3>
+
+.* <cbge_0>:
+.*: 75000000 cbgt w0, #0, 480 <cbge_0>
+.*: 75003fe0 cbgt w0, #0, 480 <cbge_0>
+
+.* <cbge_1>:
+.*: 751f8000 cbgt w0, #63, 488 <cbge_1>
+.*: 751fbfe0 cbgt w0, #63, 488 <cbge_1>
+
+.* <cbge_2>:
+.*: 7500001f cbgt wzr, #0, 490 <cbge_2>
+.*: 75003fff cbgt wzr, #0, 490 <cbge_2>
+
+.* <cbge_3>:
+.*: 751f801f cbgt wzr, #63, 498 <cbge_3>
+.*: 751fbfff cbgt wzr, #63, 498 <cbge_3>
+
+.* <cbge_4>:
+.*: f5000000 cbgt x0, #0, 4a0 <cbge_4>
+.*: f5003fe0 cbgt x0, #0, 4a0 <cbge_4>
+
+.* <cbge_5>:
+.*: f51f8000 cbgt x0, #63, 4a8 <cbge_5>
+.*: f51fbfe0 cbgt x0, #63, 4a8 <cbge_5>
+
+.* <cbge_6>:
+.*: f500001f cbgt xzr, #0, 4b0 <cbge_6>
+.*: f5003fff cbgt xzr, #0, 4b0 <cbge_6>
+
+.* <cbge_7>:
+.*: f51f801f cbgt xzr, #63, 4b8 <cbge_7>
+.*: f51fbfff cbgt xzr, #63, 4b8 <cbge_7>
+
+.* <cble_0>:
+.*: 75200000 cblt w0, #0, 4c0 <cble_0>
+.*: 75203fe0 cblt w0, #0, 4c0 <cble_0>
+
+.* <cble_1>:
+.*: 753f8000 cblt w0, #63, 4c8 <cble_1>
+.*: 753fbfe0 cblt w0, #63, 4c8 <cble_1>
+
+.* <cble_2>:
+.*: 7520001f cblt wzr, #0, 4d0 <cble_2>
+.*: 75203fff cblt wzr, #0, 4d0 <cble_2>
+
+.* <cble_3>:
+.*: 753f801f cblt wzr, #63, 4d8 <cble_3>
+.*: 753fbfff cblt wzr, #63, 4d8 <cble_3>
+
+.* <cble_4>:
+.*: f5200000 cblt x0, #0, 4e0 <cble_4>
+.*: f5203fe0 cblt x0, #0, 4e0 <cble_4>
+
+.* <cble_5>:
+.*: f53f8000 cblt x0, #63, 4e8 <cble_5>
+.*: f53fbfe0 cblt x0, #63, 4e8 <cble_5>
+
+.* <cble_6>:
+.*: f520001f cblt xzr, #0, 4f0 <cble_6>
+.*: f5203fff cblt xzr, #0, 4f0 <cble_6>
+
+.* <cble_7>:
+.*: f53f801f cblt xzr, #63, 4f8 <cble_7>
+.*: f53fbfff cblt xzr, #63, 4f8 <cble_7>
+
+.* <cbhs_0>:
+.*: 75400000 cbhi w0, #0, 500 <cbhs_0>
+.*: 75403fe0 cbhi w0, #0, 500 <cbhs_0>
+
+.* <cbhs_1>:
+.*: 755f8000 cbhi w0, #63, 508 <cbhs_1>
+.*: 755fbfe0 cbhi w0, #63, 508 <cbhs_1>
+
+.* <cbhs_2>:
+.*: 7540001f cbhi wzr, #0, 510 <cbhs_2>
+.*: 75403fff cbhi wzr, #0, 510 <cbhs_2>
+
+.* <cbhs_3>:
+.*: 755f801f cbhi wzr, #63, 518 <cbhs_3>
+.*: 755fbfff cbhi wzr, #63, 518 <cbhs_3>
+
+.* <cbhs_4>:
+.*: f5400000 cbhi x0, #0, 520 <cbhs_4>
+.*: f5403fe0 cbhi x0, #0, 520 <cbhs_4>
+
+.* <cbhs_5>:
+.*: f55f8000 cbhi x0, #63, 528 <cbhs_5>
+.*: f55fbfe0 cbhi x0, #63, 528 <cbhs_5>
+
+.* <cbhs_6>:
+.*: f540001f cbhi xzr, #0, 530 <cbhs_6>
+.*: f5403fff cbhi xzr, #0, 530 <cbhs_6>
+
+.* <cbhs_7>:
+.*: f55f801f cbhi xzr, #63, 538 <cbhs_7>
+.*: f55fbfff cbhi xzr, #63, 538 <cbhs_7>
+
+.* <cbls_0>:
+.*: 75600000 cblo w0, #0, 540 <cbls_0>
+.*: 75603fe0 cblo w0, #0, 540 <cbls_0>
+
+.* <cbls_1>:
+.*: 757f8000 cblo w0, #63, 548 <cbls_1>
+.*: 757fbfe0 cblo w0, #63, 548 <cbls_1>
+
+.* <cbls_2>:
+.*: 7560001f cblo wzr, #0, 550 <cbls_2>
+.*: 75603fff cblo wzr, #0, 550 <cbls_2>
+
+.* <cbls_3>:
+.*: 757f801f cblo wzr, #63, 558 <cbls_3>
+.*: 757fbfff cblo wzr, #63, 558 <cbls_3>
+
+.* <cbls_4>:
+.*: f5600000 cblo x0, #0, 560 <cbls_4>
+.*: f5603fe0 cblo x0, #0, 560 <cbls_4>
+
+.* <cbls_5>:
+.*: f57f8000 cblo x0, #63, 568 <cbls_5>
+.*: f57fbfe0 cblo x0, #63, 568 <cbls_5>
+
+.* <cbls_6>:
+.*: f560001f cblo xzr, #0, 570 <cbls_6>
+.*: f5603fff cblo xzr, #0, 570 <cbls_6>
+
+.* <cbls_7>:
+.*: f57f801f cblo xzr, #63, 578 <cbls_7>
+.*: f57fbfff cblo xzr, #63, 578 <cbls_7>
+
+.* <cblt_8>:
+.*: 74000000 cbgt w0, w0, 580 <cblt_8>
+.*: 74003fe0 cbgt w0, w0, 580 <cblt_8>
+
+.* <cblt_9>:
+.*: 7400001f cbgt wzr, w0, 588 <cblt_9>
+.*: 74003fff cbgt wzr, w0, 588 <cblt_9>
+
+.* <cblt_10>:
+.*: 741f0000 cbgt w0, wzr, 590 <cblt_10>
+.*: 741f3fe0 cbgt w0, wzr, 590 <cblt_10>
+
+.* <cblt_11>:
+.*: 741f001f cbgt wzr, wzr, 598 <cblt_11>
+.*: 741f3fff cbgt wzr, wzr, 598 <cblt_11>
+
+.* <cblt_12>:
+.*: f4000000 cbgt x0, x0, 5a0 <cblt_12>
+.*: f4003fe0 cbgt x0, x0, 5a0 <cblt_12>
+
+.* <cblt_13>:
+.*: f400001f cbgt xzr, x0, 5a8 <cblt_13>
+.*: f4003fff cbgt xzr, x0, 5a8 <cblt_13>
+
+.* <cblt_14>:
+.*: f41f0000 cbgt x0, xzr, 5b0 <cblt_14>
+.*: f41f3fe0 cbgt x0, xzr, 5b0 <cblt_14>
+
+.* <cblt_15>:
+.*: f41f001f cbgt xzr, xzr, 5b8 <cblt_15>
+.*: f41f3fff cbgt xzr, xzr, 5b8 <cblt_15>
+
+.* <cble_8>:
+.*: 74200000 cbge w0, w0, 5c0 <cble_8>
+.*: 74203fe0 cbge w0, w0, 5c0 <cble_8>
+
+.* <cble_9>:
+.*: 7420001f cbge wzr, w0, 5c8 <cble_9>
+.*: 74203fff cbge wzr, w0, 5c8 <cble_9>
+
+.* <cble_10>:
+.*: 743f0000 cbge w0, wzr, 5d0 <cble_10>
+.*: 743f3fe0 cbge w0, wzr, 5d0 <cble_10>
+
+.* <cble_11>:
+.*: 743f001f cbge wzr, wzr, 5d8 <cble_11>
+.*: 743f3fff cbge wzr, wzr, 5d8 <cble_11>
+
+.* <cble_12>:
+.*: f4200000 cbge x0, x0, 5e0 <cble_12>
+.*: f4203fe0 cbge x0, x0, 5e0 <cble_12>
+
+.* <cble_13>:
+.*: f420001f cbge xzr, x0, 5e8 <cble_13>
+.*: f4203fff cbge xzr, x0, 5e8 <cble_13>
+
+.* <cble_14>:
+.*: f43f0000 cbge x0, xzr, 5f0 <cble_14>
+.*: f43f3fe0 cbge x0, xzr, 5f0 <cble_14>
+
+.* <cble_15>:
+.*: f43f001f cbge xzr, xzr, 5f8 <cble_15>
+.*: f43f3fff cbge xzr, xzr, 5f8 <cble_15>
+
+.* <cblo_8>:
+.*: 74400000 cbhi w0, w0, 600 <cblo_8>
+.*: 74403fe0 cbhi w0, w0, 600 <cblo_8>
+
+.* <cblo_9>:
+.*: 7440001f cbhi wzr, w0, 608 <cblo_9>
+.*: 74403fff cbhi wzr, w0, 608 <cblo_9>
+
+.* <cblo_10>:
+.*: 745f0000 cbhi w0, wzr, 610 <cblo_10>
+.*: 745f3fe0 cbhi w0, wzr, 610 <cblo_10>
+
+.* <cblo_11>:
+.*: 745f001f cbhi wzr, wzr, 618 <cblo_11>
+.*: 745f3fff cbhi wzr, wzr, 618 <cblo_11>
+
+.* <cblo_12>:
+.*: f4400000 cbhi x0, x0, 620 <cblo_12>
+.*: f4403fe0 cbhi x0, x0, 620 <cblo_12>
+
+.* <cblo_13>:
+.*: f440001f cbhi xzr, x0, 628 <cblo_13>
+.*: f4403fff cbhi xzr, x0, 628 <cblo_13>
+
+.* <cblo_14>:
+.*: f45f0000 cbhi x0, xzr, 630 <cblo_14>
+.*: f45f3fe0 cbhi x0, xzr, 630 <cblo_14>
+
+.* <cblo_15>:
+.*: f45f001f cbhi xzr, xzr, 638 <cblo_15>
+.*: f45f3fff cbhi xzr, xzr, 638 <cblo_15>
+
+.* <cbls_8>:
+.*: 74600000 cbhs w0, w0, 640 <cbls_8>
+.*: 74603fe0 cbhs w0, w0, 640 <cbls_8>
+
+.* <cbls_9>:
+.*: 7460001f cbhs wzr, w0, 648 <cbls_9>
+.*: 74603fff cbhs wzr, w0, 648 <cbls_9>
+
+.* <cbls_10>:
+.*: 747f0000 cbhs w0, wzr, 650 <cbls_10>
+.*: 747f3fe0 cbhs w0, wzr, 650 <cbls_10>
+
+.* <cbls_11>:
+.*: 747f001f cbhs wzr, wzr, 658 <cbls_11>
+.*: 747f3fff cbhs wzr, wzr, 658 <cbls_11>
+
+.* <cbls_12>:
+.*: f4600000 cbhs x0, x0, 660 <cbls_12>
+.*: f4603fe0 cbhs x0, x0, 660 <cbls_12>
+
+.* <cbls_13>:
+.*: f460001f cbhs xzr, x0, 668 <cbls_13>
+.*: f4603fff cbhs xzr, x0, 668 <cbls_13>
+
+.* <cbls_14>:
+.*: f47f0000 cbhs x0, xzr, 670 <cbls_14>
+.*: f47f3fe0 cbhs x0, xzr, 670 <cbls_14>
+
+.* <cbls_15>:
+.*: f47f001f cbhs xzr, xzr, 678 <cbls_15>
+.*: f47f3fff cbhs xzr, xzr, 678 <cbls_15>
+
+.* <cbblt_0>:
+.*: 74008000 cbbgt w0, w0, 680 <cbblt_0>
+.*: 7400bfe0 cbbgt w0, w0, 680 <cbblt_0>
+
+.* <cbblt_1>:
+.*: 7400801f cbbgt wzr, w0, 688 <cbblt_1>
+.*: 7400bfff cbbgt wzr, w0, 688 <cbblt_1>
+
+.* <cbblt_2>:
+.*: 741f8000 cbbgt w0, wzr, 690 <cbblt_2>
+.*: 741fbfe0 cbbgt w0, wzr, 690 <cbblt_2>
+
+.* <cbblt_3>:
+.*: 741f801f cbbgt wzr, wzr, 698 <cbblt_3>
+.*: 741fbfff cbbgt wzr, wzr, 698 <cbblt_3>
+
+.* <cbble_0>:
+.*: 74208000 cbbge w0, w0, 6a0 <cbble_0>
+.*: 7420bfe0 cbbge w0, w0, 6a0 <cbble_0>
+
+.* <cbble_1>:
+.*: 7420801f cbbge wzr, w0, 6a8 <cbble_1>
+.*: 7420bfff cbbge wzr, w0, 6a8 <cbble_1>
+
+.* <cbble_2>:
+.*: 743f8000 cbbge w0, wzr, 6b0 <cbble_2>
+.*: 743fbfe0 cbbge w0, wzr, 6b0 <cbble_2>
+
+.* <cbble_3>:
+.*: 743f801f cbbge wzr, wzr, 6b8 <cbble_3>
+.*: 743fbfff cbbge wzr, wzr, 6b8 <cbble_3>
+
+.* <cbblo_0>:
+.*: 74408000 cbbhi w0, w0, 6c0 <cbblo_0>
+.*: 7440bfe0 cbbhi w0, w0, 6c0 <cbblo_0>
+
+.* <cbblo_1>:
+.*: 7440801f cbbhi wzr, w0, 6c8 <cbblo_1>
+.*: 7440bfff cbbhi wzr, w0, 6c8 <cbblo_1>
+
+.* <cbblo_2>:
+.*: 745f8000 cbbhi w0, wzr, 6d0 <cbblo_2>
+.*: 745fbfe0 cbbhi w0, wzr, 6d0 <cbblo_2>
+
+.* <cbblo_3>:
+.*: 745f801f cbbhi wzr, wzr, 6d8 <cbblo_3>
+.*: 745fbfff cbbhi wzr, wzr, 6d8 <cbblo_3>
+
+.* <cbbls_0>:
+.*: 74608000 cbbhs w0, w0, 6e0 <cbbls_0>
+.*: 7460bfe0 cbbhs w0, w0, 6e0 <cbbls_0>
+
+.* <cbbls_1>:
+.*: 7460801f cbbhs wzr, w0, 6e8 <cbbls_1>
+.*: 7460bfff cbbhs wzr, w0, 6e8 <cbbls_1>
+
+.* <cbbls_2>:
+.*: 747f8000 cbbhs w0, wzr, 6f0 <cbbls_2>
+.*: 747fbfe0 cbbhs w0, wzr, 6f0 <cbbls_2>
+
+.* <cbbls_3>:
+.*: 747f801f cbbhs wzr, wzr, 6f8 <cbbls_3>
+.*: 747fbfff cbbhs wzr, wzr, 6f8 <cbbls_3>
+
+.* <cbhlt_0>:
+.*: 7400c000 cbhgt w0, w0, 700 <cbhlt_0>
+.*: 7400ffe0 cbhgt w0, w0, 700 <cbhlt_0>
+
+.* <cbhlt_1>:
+.*: 7400c01f cbhgt wzr, w0, 708 <cbhlt_1>
+.*: 7400ffff cbhgt wzr, w0, 708 <cbhlt_1>
+
+.* <cbhlt_2>:
+.*: 741fc000 cbhgt w0, wzr, 710 <cbhlt_2>
+.*: 741fffe0 cbhgt w0, wzr, 710 <cbhlt_2>
+
+.* <cbhlt_3>:
+.*: 741fc01f cbhgt wzr, wzr, 718 <cbhlt_3>
+.*: 741fffff cbhgt wzr, wzr, 718 <cbhlt_3>
+
+.* <cbhle_0>:
+.*: 7420c000 cbhge w0, w0, 720 <cbhle_0>
+.*: 7420ffe0 cbhge w0, w0, 720 <cbhle_0>
+
+.* <cbhle_1>:
+.*: 7420c01f cbhge wzr, w0, 728 <cbhle_1>
+.*: 7420ffff cbhge wzr, w0, 728 <cbhle_1>
+
+.* <cbhle_2>:
+.*: 743fc000 cbhge w0, wzr, 730 <cbhle_2>
+.*: 743fffe0 cbhge w0, wzr, 730 <cbhle_2>
+
+.* <cbhle_3>:
+.*: 743fc01f cbhge wzr, wzr, 738 <cbhle_3>
+.*: 743fffff cbhge wzr, wzr, 738 <cbhle_3>
+
+.* <cbhlo_0>:
+.*: 7440c000 cbhhi w0, w0, 740 <cbhlo_0>
+.*: 7440ffe0 cbhhi w0, w0, 740 <cbhlo_0>
+
+.* <cbhlo_1>:
+.*: 7440c01f cbhhi wzr, w0, 748 <cbhlo_1>
+.*: 7440ffff cbhhi wzr, w0, 748 <cbhlo_1>
+
+.* <cbhlo_2>:
+.*: 745fc000 cbhhi w0, wzr, 750 <cbhlo_2>
+.*: 745fffe0 cbhhi w0, wzr, 750 <cbhlo_2>
+
+.* <cbhlo_3>:
+.*: 745fc01f cbhhi wzr, wzr, 758 <cbhlo_3>
+.*: 745fffff cbhhi wzr, wzr, 758 <cbhlo_3>
+
+.* <cbhls_0>:
+.*: 7460c000 cbhhs w0, w0, 760 <cbhls_0>
+.*: 7460ffe0 cbhhs w0, w0, 760 <cbhls_0>
+
+.* <cbhls_1>:
+.*: 7460c01f cbhhs wzr, w0, 768 <cbhls_1>
+.*: 7460ffff cbhhs wzr, w0, 768 <cbhls_1>
+
+.* <cbhls_2>:
+.*: 747fc000 cbhhs w0, wzr, 770 <cbhls_2>
+.*: 747fffe0 cbhhs w0, wzr, 770 <cbhls_2>
+
+.* <cbhls_3>:
+.*: 747fc01f cbhhs wzr, wzr, 778 <cbhls_3>
+.*: 747fffff cbhhs wzr, wzr, 778 <cbhls_3>
diff --git a/gas/testsuite/gas/aarch64/cmpbr.s b/gas/testsuite/gas/aarch64/cmpbr.s
new file mode 100644
index 00000000000..ed6b1790762
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cmpbr.s
@@ -0,0 +1,727 @@
+cbgt_0:
+ cbgt w0, #0, cbgt_0
+ cbgt w0, #0, cbgt_0
+cbgt_1:
+ cbgt w0, #63, cbgt_1
+ cbgt w0, #63, cbgt_1
+cbgt_2:
+ cbgt wzr, #0, cbgt_2
+ cbgt wzr, #0, cbgt_2
+cbgt_3:
+ cbgt wzr, #63, cbgt_3
+ cbgt wzr, #63, cbgt_3
+cbgt_4:
+ cbgt x0, #0, cbgt_4
+ cbgt x0, #0, cbgt_4
+cbgt_5:
+ cbgt x0, #63, cbgt_5
+ cbgt x0, #63, cbgt_5
+cbgt_6:
+ cbgt xzr, #0, cbgt_6
+ cbgt xzr, #0, cbgt_6
+cbgt_7:
+ cbgt xzr, #63, cbgt_7
+ cbgt xzr, #63, cbgt_7
+cblt_0:
+ cblt w0, #0, cblt_0
+ cblt w0, #0, cblt_0
+cblt_1:
+ cblt w0, #63, cblt_1
+ cblt w0, #63, cblt_1
+cblt_2:
+ cblt wzr, #0, cblt_2
+ cblt wzr, #0, cblt_2
+cblt_3:
+ cblt wzr, #63, cblt_3
+ cblt wzr, #63, cblt_3
+cblt_4:
+ cblt x0, #0, cblt_4
+ cblt x0, #0, cblt_4
+cblt_5:
+ cblt x0, #63, cblt_5
+ cblt x0, #63, cblt_5
+cblt_6:
+ cblt xzr, #0, cblt_6
+ cblt xzr, #0, cblt_6
+cblt_7:
+ cblt xzr, #63, cblt_7
+ cblt xzr, #63, cblt_7
+cbhi_0:
+ cbhi w0, #0, cbhi_0
+ cbhi w0, #0, cbhi_0
+cbhi_1:
+ cbhi w0, #63, cbhi_1
+ cbhi w0, #63, cbhi_1
+cbhi_2:
+ cbhi wzr, #0, cbhi_2
+ cbhi wzr, #0, cbhi_2
+cbhi_3:
+ cbhi wzr, #63, cbhi_3
+ cbhi wzr, #63, cbhi_3
+cbhi_4:
+ cbhi x0, #0, cbhi_4
+ cbhi x0, #0, cbhi_4
+cbhi_5:
+ cbhi x0, #63, cbhi_5
+ cbhi x0, #63, cbhi_5
+cbhi_6:
+ cbhi xzr, #0, cbhi_6
+ cbhi xzr, #0, cbhi_6
+cbhi_7:
+ cbhi xzr, #63, cbhi_7
+ cbhi xzr, #63, cbhi_7
+cblo_0:
+ cblo w0, #0, cblo_0
+ cblo w0, #0, cblo_0
+cblo_1:
+ cblo w0, #63, cblo_1
+ cblo w0, #63, cblo_1
+cblo_2:
+ cblo wzr, #0, cblo_2
+ cblo wzr, #0, cblo_2
+cblo_3:
+ cblo wzr, #63, cblo_3
+ cblo wzr, #63, cblo_3
+cblo_4:
+ cblo x0, #0, cblo_4
+ cblo x0, #0, cblo_4
+cblo_5:
+ cblo x0, #63, cblo_5
+ cblo x0, #63, cblo_5
+cblo_6:
+ cblo xzr, #0, cblo_6
+ cblo xzr, #0, cblo_6
+cblo_7:
+ cblo xzr, #63, cblo_7
+ cblo xzr, #63, cblo_7
+cbeq_0:
+ cbeq w0, #0, cbeq_0
+ cbeq w0, #0, cbeq_0
+cbeq_1:
+ cbeq w0, #63, cbeq_1
+ cbeq w0, #63, cbeq_1
+cbeq_2:
+ cbeq wzr, #0, cbeq_2
+ cbeq wzr, #0, cbeq_2
+cbeq_3:
+ cbeq wzr, #63, cbeq_3
+ cbeq wzr, #63, cbeq_3
+cbeq_4:
+ cbeq x0, #0, cbeq_4
+ cbeq x0, #0, cbeq_4
+cbeq_5:
+ cbeq x0, #63, cbeq_5
+ cbeq x0, #63, cbeq_5
+cbeq_6:
+ cbeq xzr, #0, cbeq_6
+ cbeq xzr, #0, cbeq_6
+cbeq_7:
+ cbeq xzr, #63, cbeq_7
+ cbeq xzr, #63, cbeq_7
+cbne_0:
+ cbne w0, #0, cbne_0
+ cbne w0, #0, cbne_0
+cbne_1:
+ cbne w0, #63, cbne_1
+ cbne w0, #63, cbne_1
+cbne_2:
+ cbne wzr, #0, cbne_2
+ cbne wzr, #0, cbne_2
+cbne_3:
+ cbne wzr, #63, cbne_3
+ cbne wzr, #63, cbne_3
+cbne_4:
+ cbne x0, #0, cbne_4
+ cbne x0, #0, cbne_4
+cbne_5:
+ cbne x0, #63, cbne_5
+ cbne x0, #63, cbne_5
+cbne_6:
+ cbne xzr, #0, cbne_6
+ cbne xzr, #0, cbne_6
+cbne_7:
+ cbne xzr, #63, cbne_7
+ cbne xzr, #63, cbne_7
+
+cbgt_8:
+ cbgt w0, w0, cbgt_8
+ cbgt w0, w0, cbgt_8
+cbgt_9:
+ cbgt w0, wzr, cbgt_9
+ cbgt w0, wzr, cbgt_9
+cbgt_10:
+ cbgt wzr, w0, cbgt_10
+ cbgt wzr, w0, cbgt_10
+cbgt_11:
+ cbgt wzr, wzr, cbgt_11
+ cbgt wzr, wzr, cbgt_11
+cbgt_12:
+ cbgt x0, x0, cbgt_12
+ cbgt x0, x0, cbgt_12
+cbgt_13:
+ cbgt x0, xzr, cbgt_13
+ cbgt x0, xzr, cbgt_13
+cbgt_14:
+ cbgt xzr, x0, cbgt_14
+ cbgt xzr, x0, cbgt_14
+cbgt_15:
+ cbgt xzr, xzr, cbgt_15
+ cbgt xzr, xzr, cbgt_15
+cbge_8:
+ cbge w0, w0, cbge_8
+ cbge w0, w0, cbge_8
+cbge_9:
+ cbge w0, wzr, cbge_9
+ cbge w0, wzr, cbge_9
+cbge_10:
+ cbge wzr, w0, cbge_10
+ cbge wzr, w0, cbge_10
+cbge_11:
+ cbge wzr, wzr, cbge_11
+ cbge wzr, wzr, cbge_11
+cbge_12:
+ cbge x0, x0, cbge_12
+ cbge x0, x0, cbge_12
+cbge_13:
+ cbge x0, xzr, cbge_13
+ cbge x0, xzr, cbge_13
+cbge_14:
+ cbge xzr, x0, cbge_14
+ cbge xzr, x0, cbge_14
+cbge_15:
+ cbge xzr, xzr, cbge_15
+ cbge xzr, xzr, cbge_15
+cbhi_8:
+ cbhi w0, w0, cbhi_8
+ cbhi w0, w0, cbhi_8
+cbhi_9:
+ cbhi w0, wzr, cbhi_9
+ cbhi w0, wzr, cbhi_9
+cbhi_10:
+ cbhi wzr, w0, cbhi_10
+ cbhi wzr, w0, cbhi_10
+cbhi_11:
+ cbhi wzr, wzr, cbhi_11
+ cbhi wzr, wzr, cbhi_11
+cbhi_12:
+ cbhi x0, x0, cbhi_12
+ cbhi x0, x0, cbhi_12
+cbhi_13:
+ cbhi x0, xzr, cbhi_13
+ cbhi x0, xzr, cbhi_13
+cbhi_14:
+ cbhi xzr, x0, cbhi_14
+ cbhi xzr, x0, cbhi_14
+cbhi_15:
+ cbhi xzr, xzr, cbhi_15
+ cbhi xzr, xzr, cbhi_15
+cbhs_8:
+ cbhs w0, w0, cbhs_8
+ cbhs w0, w0, cbhs_8
+cbhs_9:
+ cbhs w0, wzr, cbhs_9
+ cbhs w0, wzr, cbhs_9
+cbhs_10:
+ cbhs wzr, w0, cbhs_10
+ cbhs wzr, w0, cbhs_10
+cbhs_11:
+ cbhs wzr, wzr, cbhs_11
+ cbhs wzr, wzr, cbhs_11
+cbhs_12:
+ cbhs x0, x0, cbhs_12
+ cbhs x0, x0, cbhs_12
+cbhs_13:
+ cbhs x0, xzr, cbhs_13
+ cbhs x0, xzr, cbhs_13
+cbhs_14:
+ cbhs xzr, x0, cbhs_14
+ cbhs xzr, x0, cbhs_14
+cbhs_15:
+ cbhs xzr, xzr, cbhs_15
+ cbhs xzr, xzr, cbhs_15
+cbeq_8:
+ cbeq w0, w0, cbeq_8
+ cbeq w0, w0, cbeq_8
+cbeq_9:
+ cbeq w0, wzr, cbeq_9
+ cbeq w0, wzr, cbeq_9
+cbeq_10:
+ cbeq wzr, w0, cbeq_10
+ cbeq wzr, w0, cbeq_10
+cbeq_11:
+ cbeq wzr, wzr, cbeq_11
+ cbeq wzr, wzr, cbeq_11
+cbeq_12:
+ cbeq x0, x0, cbeq_12
+ cbeq x0, x0, cbeq_12
+cbeq_13:
+ cbeq x0, xzr, cbeq_13
+ cbeq x0, xzr, cbeq_13
+cbeq_14:
+ cbeq xzr, x0, cbeq_14
+ cbeq xzr, x0, cbeq_14
+cbeq_15:
+ cbeq xzr, xzr, cbeq_15
+ cbeq xzr, xzr, cbeq_15
+cbne_8:
+ cbne w0, w0, cbne_8
+ cbne w0, w0, cbne_8
+cbne_9:
+ cbne w0, wzr, cbne_9
+ cbne w0, wzr, cbne_9
+cbne_10:
+ cbne wzr, w0, cbne_10
+ cbne wzr, w0, cbne_10
+cbne_11:
+ cbne wzr, wzr, cbne_11
+ cbne wzr, wzr, cbne_11
+cbne_12:
+ cbne x0, x0, cbne_12
+ cbne x0, x0, cbne_12
+cbne_13:
+ cbne x0, xzr, cbne_13
+ cbne x0, xzr, cbne_13
+cbne_14:
+ cbne xzr, x0, cbne_14
+ cbne xzr, x0, cbne_14
+cbne_15:
+ cbne xzr, xzr, cbne_15
+ cbne xzr, xzr, cbne_15
+
+cbbgt_0:
+ cbbgt w0, w0, cbbgt_0
+ cbbgt w0, w0, cbbgt_0
+cbbgt_1:
+ cbbgt w0, wzr, cbbgt_1
+ cbbgt w0, wzr, cbbgt_1
+cbbgt_2:
+ cbbgt wzr, w0, cbbgt_2
+ cbbgt wzr, w0, cbbgt_2
+cbbgt_3:
+ cbbgt wzr, wzr, cbbgt_3
+ cbbgt wzr, wzr, cbbgt_3
+cbbge_0:
+ cbbge w0, w0, cbbge_0
+ cbbge w0, w0, cbbge_0
+cbbge_1:
+ cbbge w0, wzr, cbbge_1
+ cbbge w0, wzr, cbbge_1
+cbbge_2:
+ cbbge wzr, w0, cbbge_2
+ cbbge wzr, w0, cbbge_2
+cbbge_3:
+ cbbge wzr, wzr, cbbge_3
+ cbbge wzr, wzr, cbbge_3
+cbbhi_0:
+ cbbhi w0, w0, cbbhi_0
+ cbbhi w0, w0, cbbhi_0
+cbbhi_1:
+ cbbhi w0, wzr, cbbhi_1
+ cbbhi w0, wzr, cbbhi_1
+cbbhi_2:
+ cbbhi wzr, w0, cbbhi_2
+ cbbhi wzr, w0, cbbhi_2
+cbbhi_3:
+ cbbhi wzr, wzr, cbbhi_3
+ cbbhi wzr, wzr, cbbhi_3
+cbbhs_0:
+ cbbhs w0, w0, cbbhs_0
+ cbbhs w0, w0, cbbhs_0
+cbbhs_1:
+ cbbhs w0, wzr, cbbhs_1
+ cbbhs w0, wzr, cbbhs_1
+cbbhs_2:
+ cbbhs wzr, w0, cbbhs_2
+ cbbhs wzr, w0, cbbhs_2
+cbbhs_3:
+ cbbhs wzr, wzr, cbbhs_3
+ cbbhs wzr, wzr, cbbhs_3
+cbbeq_0:
+ cbbeq w0, w0, cbbeq_0
+ cbbeq w0, w0, cbbeq_0
+cbbeq_1:
+ cbbeq w0, wzr, cbbeq_1
+ cbbeq w0, wzr, cbbeq_1
+cbbeq_2:
+ cbbeq wzr, w0, cbbeq_2
+ cbbeq wzr, w0, cbbeq_2
+cbbeq_3:
+ cbbeq wzr, wzr, cbbeq_3
+ cbbeq wzr, wzr, cbbeq_3
+cbbne_0:
+ cbbne w0, w0, cbbne_0
+ cbbne w0, w0, cbbne_0
+cbbne_1:
+ cbbne w0, wzr, cbbne_1
+ cbbne w0, wzr, cbbne_1
+cbbne_2:
+ cbbne wzr, w0, cbbne_2
+ cbbne wzr, w0, cbbne_2
+cbbne_3:
+ cbbne wzr, wzr, cbbne_3
+ cbbne wzr, wzr, cbbne_3
+
+cbhgt_0:
+ cbhgt w0, w0, cbhgt_0
+ cbhgt w0, w0, cbhgt_0
+cbhgt_1:
+ cbhgt w0, wzr, cbhgt_1
+ cbhgt w0, wzr, cbhgt_1
+cbhgt_2:
+ cbhgt wzr, w0, cbhgt_2
+ cbhgt wzr, w0, cbhgt_2
+cbhgt_3:
+ cbhgt wzr, wzr, cbhgt_3
+ cbhgt wzr, wzr, cbhgt_3
+cbhge_0:
+ cbhge w0, w0, cbhge_0
+ cbhge w0, w0, cbhge_0
+cbhge_1:
+ cbhge w0, wzr, cbhge_1
+ cbhge w0, wzr, cbhge_1
+cbhge_2:
+ cbhge wzr, w0, cbhge_2
+ cbhge wzr, w0, cbhge_2
+cbhge_3:
+ cbhge wzr, wzr, cbhge_3
+ cbhge wzr, wzr, cbhge_3
+cbhhi_0:
+ cbhhi w0, w0, cbhhi_0
+ cbhhi w0, w0, cbhhi_0
+cbhhi_1:
+ cbhhi w0, wzr, cbhhi_1
+ cbhhi w0, wzr, cbhhi_1
+cbhhi_2:
+ cbhhi wzr, w0, cbhhi_2
+ cbhhi wzr, w0, cbhhi_2
+cbhhi_3:
+ cbhhi wzr, wzr, cbhhi_3
+ cbhhi wzr, wzr, cbhhi_3
+cbhhs_0:
+ cbhhs w0, w0, cbhhs_0
+ cbhhs w0, w0, cbhhs_0
+cbhhs_1:
+ cbhhs w0, wzr, cbhhs_1
+ cbhhs w0, wzr, cbhhs_1
+cbhhs_2:
+ cbhhs wzr, w0, cbhhs_2
+ cbhhs wzr, w0, cbhhs_2
+cbhhs_3:
+ cbhhs wzr, wzr, cbhhs_3
+ cbhhs wzr, wzr, cbhhs_3
+cbheq_0:
+ cbheq w0, w0, cbheq_0
+ cbheq w0, w0, cbheq_0
+cbheq_1:
+ cbheq w0, wzr, cbheq_1
+ cbheq w0, wzr, cbheq_1
+cbheq_2:
+ cbheq wzr, w0, cbheq_2
+ cbheq wzr, w0, cbheq_2
+cbheq_3:
+ cbheq wzr, wzr, cbheq_3
+ cbheq wzr, wzr, cbheq_3
+cbhne_0:
+ cbhne w0, w0, cbhne_0
+ cbhne w0, w0, cbhne_0
+cbhne_1:
+ cbhne w0, wzr, cbhne_1
+ cbhne w0, wzr, cbhne_1
+cbhne_2:
+ cbhne wzr, w0, cbhne_2
+ cbhne wzr, w0, cbhne_2
+cbhne_3:
+ cbhne wzr, wzr, cbhne_3
+ cbhne wzr, wzr, cbhne_3
+
+cbge_0:
+ cbge w0, #1, cbge_0
+ cbge w0, #1, cbge_0
+cbge_1:
+ cbge w0, #64, cbge_1
+ cbge w0, #64, cbge_1
+cbge_2:
+ cbge wzr, #1, cbge_2
+ cbge wzr, #1, cbge_2
+cbge_3:
+ cbge wzr, #64, cbge_3
+ cbge wzr, #64, cbge_3
+cbge_4:
+ cbge x0, #1, cbge_4
+ cbge x0, #1, cbge_4
+cbge_5:
+ cbge x0, #64, cbge_5
+ cbge x0, #64, cbge_5
+cbge_6:
+ cbge xzr, #1, cbge_6
+ cbge xzr, #1, cbge_6
+cbge_7:
+ cbge xzr, #64, cbge_7
+ cbge xzr, #64, cbge_7
+cble_0:
+ cble w0, #-1, cble_0
+ cble w0, #-1, cble_0
+cble_1:
+ cble w0, #62, cble_1
+ cble w0, #62, cble_1
+cble_2:
+ cble wzr, #-1, cble_2
+ cble wzr, #-1, cble_2
+cble_3:
+ cble wzr, #62, cble_3
+ cble wzr, #62, cble_3
+cble_4:
+ cble x0, #-1, cble_4
+ cble x0, #-1, cble_4
+cble_5:
+ cble x0, #62, cble_5
+ cble x0, #62, cble_5
+cble_6:
+ cble xzr, #-1, cble_6
+ cble xzr, #-1, cble_6
+cble_7:
+ cble xzr, #62, cble_7
+ cble xzr, #62, cble_7
+cbhs_0:
+ cbhs w0, #1, cbhs_0
+ cbhs w0, #1, cbhs_0
+cbhs_1:
+ cbhs w0, #64, cbhs_1
+ cbhs w0, #64, cbhs_1
+cbhs_2:
+ cbhs wzr, #1, cbhs_2
+ cbhs wzr, #1, cbhs_2
+cbhs_3:
+ cbhs wzr, #64, cbhs_3
+ cbhs wzr, #64, cbhs_3
+cbhs_4:
+ cbhs x0, #1, cbhs_4
+ cbhs x0, #1, cbhs_4
+cbhs_5:
+ cbhs x0, #64, cbhs_5
+ cbhs x0, #64, cbhs_5
+cbhs_6:
+ cbhs xzr, #1, cbhs_6
+ cbhs xzr, #1, cbhs_6
+cbhs_7:
+ cbhs xzr, #64, cbhs_7
+ cbhs xzr, #64, cbhs_7
+cbls_0:
+ cbls w0, #-1, cbls_0
+ cbls w0, #-1, cbls_0
+cbls_1:
+ cbls w0, #62, cbls_1
+ cbls w0, #62, cbls_1
+cbls_2:
+ cbls wzr, #-1, cbls_2
+ cbls wzr, #-1, cbls_2
+cbls_3:
+ cbls wzr, #62, cbls_3
+ cbls wzr, #62, cbls_3
+cbls_4:
+ cbls x0, #-1, cbls_4
+ cbls x0, #-1, cbls_4
+cbls_5:
+ cbls x0, #62, cbls_5
+ cbls x0, #62, cbls_5
+cbls_6:
+ cbls xzr, #-1, cbls_6
+ cbls xzr, #-1, cbls_6
+cbls_7:
+ cbls xzr, #62, cbls_7
+ cbls xzr, #62, cbls_7
+
+cblt_8:
+ cblt w0, w0, cblt_8
+ cblt w0, w0, cblt_8
+cblt_9:
+ cblt w0, wzr, cblt_9
+ cblt w0, wzr, cblt_9
+cblt_10:
+ cblt wzr, w0, cblt_10
+ cblt wzr, w0, cblt_10
+cblt_11:
+ cblt wzr, wzr, cblt_11
+ cblt wzr, wzr, cblt_11
+cblt_12:
+ cblt x0, x0, cblt_12
+ cblt x0, x0, cblt_12
+cblt_13:
+ cblt x0, xzr, cblt_13
+ cblt x0, xzr, cblt_13
+cblt_14:
+ cblt xzr, x0, cblt_14
+ cblt xzr, x0, cblt_14
+cblt_15:
+ cblt xzr, xzr, cblt_15
+ cblt xzr, xzr, cblt_15
+cble_8:
+ cble w0, w0, cble_8
+ cble w0, w0, cble_8
+cble_9:
+ cble w0, wzr, cble_9
+ cble w0, wzr, cble_9
+cble_10:
+ cble wzr, w0, cble_10
+ cble wzr, w0, cble_10
+cble_11:
+ cble wzr, wzr, cble_11
+ cble wzr, wzr, cble_11
+cble_12:
+ cble x0, x0, cble_12
+ cble x0, x0, cble_12
+cble_13:
+ cble x0, xzr, cble_13
+ cble x0, xzr, cble_13
+cble_14:
+ cble xzr, x0, cble_14
+ cble xzr, x0, cble_14
+cble_15:
+ cble xzr, xzr, cble_15
+ cble xzr, xzr, cble_15
+cblo_8:
+ cblo w0, w0, cblo_8
+ cblo w0, w0, cblo_8
+cblo_9:
+ cblo w0, wzr, cblo_9
+ cblo w0, wzr, cblo_9
+cblo_10:
+ cblo wzr, w0, cblo_10
+ cblo wzr, w0, cblo_10
+cblo_11:
+ cblo wzr, wzr, cblo_11
+ cblo wzr, wzr, cblo_11
+cblo_12:
+ cblo x0, x0, cblo_12
+ cblo x0, x0, cblo_12
+cblo_13:
+ cblo x0, xzr, cblo_13
+ cblo x0, xzr, cblo_13
+cblo_14:
+ cblo xzr, x0, cblo_14
+ cblo xzr, x0, cblo_14
+cblo_15:
+ cblo xzr, xzr, cblo_15
+ cblo xzr, xzr, cblo_15
+cbls_8:
+ cbls w0, w0, cbls_8
+ cbls w0, w0, cbls_8
+cbls_9:
+ cbls w0, wzr, cbls_9
+ cbls w0, wzr, cbls_9
+cbls_10:
+ cbls wzr, w0, cbls_10
+ cbls wzr, w0, cbls_10
+cbls_11:
+ cbls wzr, wzr, cbls_11
+ cbls wzr, wzr, cbls_11
+cbls_12:
+ cbls x0, x0, cbls_12
+ cbls x0, x0, cbls_12
+cbls_13:
+ cbls x0, xzr, cbls_13
+ cbls x0, xzr, cbls_13
+cbls_14:
+ cbls xzr, x0, cbls_14
+ cbls xzr, x0, cbls_14
+cbls_15:
+ cbls xzr, xzr, cbls_15
+ cbls xzr, xzr, cbls_15
+
+cbblt_0:
+ cbblt w0, w0, cbblt_0
+ cbblt w0, w0, cbblt_0
+cbblt_1:
+ cbblt w0, wzr, cbblt_1
+ cbblt w0, wzr, cbblt_1
+cbblt_2:
+ cbblt wzr, w0, cbblt_2
+ cbblt wzr, w0, cbblt_2
+cbblt_3:
+ cbblt wzr, wzr, cbblt_3
+ cbblt wzr, wzr, cbblt_3
+cbble_0:
+ cbble w0, w0, cbble_0
+ cbble w0, w0, cbble_0
+cbble_1:
+ cbble w0, wzr, cbble_1
+ cbble w0, wzr, cbble_1
+cbble_2:
+ cbble wzr, w0, cbble_2
+ cbble wzr, w0, cbble_2
+cbble_3:
+ cbble wzr, wzr, cbble_3
+ cbble wzr, wzr, cbble_3
+cbblo_0:
+ cbblo w0, w0, cbblo_0
+ cbblo w0, w0, cbblo_0
+cbblo_1:
+ cbblo w0, wzr, cbblo_1
+ cbblo w0, wzr, cbblo_1
+cbblo_2:
+ cbblo wzr, w0, cbblo_2
+ cbblo wzr, w0, cbblo_2
+cbblo_3:
+ cbblo wzr, wzr, cbblo_3
+ cbblo wzr, wzr, cbblo_3
+cbbls_0:
+ cbbls w0, w0, cbbls_0
+ cbbls w0, w0, cbbls_0
+cbbls_1:
+ cbbls w0, wzr, cbbls_1
+ cbbls w0, wzr, cbbls_1
+cbbls_2:
+ cbbls wzr, w0, cbbls_2
+ cbbls wzr, w0, cbbls_2
+cbbls_3:
+ cbbls wzr, wzr, cbbls_3
+ cbbls wzr, wzr, cbbls_3
+
+cbhlt_0:
+ cbhlt w0, w0, cbhlt_0
+ cbhlt w0, w0, cbhlt_0
+cbhlt_1:
+ cbhlt w0, wzr, cbhlt_1
+ cbhlt w0, wzr, cbhlt_1
+cbhlt_2:
+ cbhlt wzr, w0, cbhlt_2
+ cbhlt wzr, w0, cbhlt_2
+cbhlt_3:
+ cbhlt wzr, wzr, cbhlt_3
+ cbhlt wzr, wzr, cbhlt_3
+cbhle_0:
+ cbhle w0, w0, cbhle_0
+ cbhle w0, w0, cbhle_0
+cbhle_1:
+ cbhle w0, wzr, cbhle_1
+ cbhle w0, wzr, cbhle_1
+cbhle_2:
+ cbhle wzr, w0, cbhle_2
+ cbhle wzr, w0, cbhle_2
+cbhle_3:
+ cbhle wzr, wzr, cbhle_3
+ cbhle wzr, wzr, cbhle_3
+cbhlo_0:
+ cbhlo w0, w0, cbhlo_0
+ cbhlo w0, w0, cbhlo_0
+cbhlo_1:
+ cbhlo w0, wzr, cbhlo_1
+ cbhlo w0, wzr, cbhlo_1
+cbhlo_2:
+ cbhlo wzr, w0, cbhlo_2
+ cbhlo wzr, w0, cbhlo_2
+cbhlo_3:
+ cbhlo wzr, wzr, cbhlo_3
+ cbhlo wzr, wzr, cbhlo_3
+cbhls_0:
+ cbhls w0, w0, cbhls_0
+ cbhls w0, w0, cbhls_0
+cbhls_1:
+ cbhls w0, wzr, cbhls_1
+ cbhls w0, wzr, cbhls_1
+cbhls_2:
+ cbhls wzr, w0, cbhls_2
+ cbhls wzr, w0, cbhls_2
+cbhls_3:
+ cbhls wzr, wzr, cbhls_3
+ cbhls wzr, wzr, cbhls_3
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 1c7d6f1c1b7..a2cc97ab509 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -135,6 +135,8 @@ enum aarch64_feature_bit {
AARCH64_FEATURE_ID_PFR2,
/* SSBS mechanism enabled. */
AARCH64_FEATURE_SSBS,
+ /* Compare and branch instructions. */
+ AARCH64_FEATURE_CMPBR,
/* Memory Tagging Extension. */
AARCH64_FEATURE_MEMTAG,
/* Outer Cacheable Cache Maintenance Operation. */
@@ -690,6 +692,8 @@ enum aarch64_opnd
AARCH64_OPND_WIDTH, /* Immediate #<width> in e.g. BFI. */
AARCH64_OPND_IMM, /* Immediate. */
AARCH64_OPND_IMM_2, /* Immediate. */
+ AARCH64_OPND_IMMP1_2, /* Immediate plus 1. */
+ AARCH64_OPND_IMMS1_2, /* Immediate minus 1. */
AARCH64_OPND_UIMM3_OP1,/* Unsigned 3-bit immediate in the op1 field. */
AARCH64_OPND_UIMM3_OP2,/* Unsigned 3-bit immediate in the op2 field. */
AARCH64_OPND_UIMM4, /* Unsigned 4-bit immediate in the CRm field. */
@@ -717,6 +721,7 @@ enum aarch64_opnd
AARCH64_OPND_COND1, /* Same as the above, but excluding AL and NV. */
AARCH64_OPND_ADDR_ADRP, /* Memory address for ADRP */
+ AARCH64_OPND_ADDR_PCREL9, /* 9-bit PC-relative address for e.g. CB<cc>. */
AARCH64_OPND_ADDR_PCREL14, /* 14-bit PC-relative address for e.g. TBZ. */
AARCH64_OPND_ADDR_PCREL19, /* 19-bit PC-relative address for e.g. LDR. */
AARCH64_OPND_ADDR_PCREL21, /* 21-bit PC-relative address for e.g. ADR. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 222c4572355..b35a45790bb 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -135,535 +135,599 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 629: /* ubfm */
value = 629; /* --> ubfm. */
break;
- case 665: /* cset */
- case 664: /* cinc */
- case 663: /* csinc */
- value = 663; /* --> csinc. */
- break;
- case 668: /* csetm */
- case 667: /* cinv */
- case 666: /* csinv */
- value = 666; /* --> csinv. */
- break;
- case 670: /* cneg */
- case 669: /* csneg */
- value = 669; /* --> csneg. */
- break;
- case 689: /* rev64 */
- case 688: /* rev */
- value = 688; /* --> rev. */
- break;
- case 714: /* lsl */
- case 713: /* lslv */
- value = 713; /* --> lslv. */
- break;
- case 716: /* lsr */
- case 715: /* lsrv */
- value = 715; /* --> lsrv. */
- break;
- case 718: /* asr */
- case 717: /* asrv */
- value = 717; /* --> asrv. */
- break;
- case 720: /* ror */
- case 719: /* rorv */
- value = 719; /* --> rorv. */
- break;
- case 723: /* cmpp */
- case 722: /* subps */
- value = 722; /* --> subps. */
- break;
- case 736: /* mul */
- case 735: /* madd */
- value = 735; /* --> madd. */
- break;
- case 738: /* mneg */
- case 737: /* msub */
- value = 737; /* --> msub. */
- break;
- case 740: /* smull */
- case 739: /* smaddl */
- value = 739; /* --> smaddl. */
- break;
- case 742: /* smnegl */
- case 741: /* smsubl */
- value = 741; /* --> smsubl. */
- break;
- case 745: /* umull */
- case 744: /* umaddl */
- value = 744; /* --> umaddl. */
- break;
- case 747: /* umnegl */
- case 746: /* umsubl */
- value = 746; /* --> umsubl. */
- break;
- case 759: /* ror */
- case 758: /* extr */
- value = 758; /* --> extr. */
- break;
- case 1008: /* bic */
- case 1007: /* and */
- value = 1007; /* --> and. */
- break;
- case 1010: /* mov */
- case 1009: /* orr */
- value = 1009; /* --> orr. */
- break;
- case 1013: /* tst */
- case 1012: /* ands */
- value = 1012; /* --> ands. */
- break;
- case 1018: /* uxtw */
- case 1017: /* mov */
- case 1016: /* orr */
- value = 1016; /* --> orr. */
+ case 659: /* cblt */
+ case 658: /* cbgt */
+ value = 658; /* --> cbgt. */
+ break;
+ case 661: /* cble */
+ case 660: /* cbge */
+ value = 660; /* --> cbge. */
+ break;
+ case 663: /* cblo */
+ case 662: /* cbhi */
+ value = 662; /* --> cbhi. */
+ break;
+ case 665: /* cbls */
+ case 664: /* cbhs */
+ value = 664; /* --> cbhs. */
+ break;
+ case 669: /* cbge */
+ case 668: /* cbgt */
+ value = 668; /* --> cbgt. */
+ break;
+ case 671: /* cble */
+ case 670: /* cblt */
+ value = 670; /* --> cblt. */
+ break;
+ case 673: /* cbhs */
+ case 672: /* cbhi */
+ value = 672; /* --> cbhi. */
+ break;
+ case 675: /* cbls */
+ case 674: /* cblo */
+ value = 674; /* --> cblo. */
+ break;
+ case 679: /* cbblt */
+ case 678: /* cbbgt */
+ value = 678; /* --> cbbgt. */
+ break;
+ case 681: /* cbble */
+ case 680: /* cbbge */
+ value = 680; /* --> cbbge. */
+ break;
+ case 683: /* cbblo */
+ case 682: /* cbbhi */
+ value = 682; /* --> cbbhi. */
+ break;
+ case 685: /* cbbls */
+ case 684: /* cbbhs */
+ value = 684; /* --> cbbhs. */
+ break;
+ case 689: /* cbhlt */
+ case 688: /* cbhgt */
+ value = 688; /* --> cbhgt. */
+ break;
+ case 691: /* cbhle */
+ case 690: /* cbhge */
+ value = 690; /* --> cbhge. */
+ break;
+ case 693: /* cbhlo */
+ case 692: /* cbhhi */
+ value = 692; /* --> cbhhi. */
+ break;
+ case 695: /* cbhls */
+ case 694: /* cbhhs */
+ value = 694; /* --> cbhhs. */
+ break;
+ case 705: /* cset */
+ case 704: /* cinc */
+ case 703: /* csinc */
+ value = 703; /* --> csinc. */
+ break;
+ case 708: /* csetm */
+ case 707: /* cinv */
+ case 706: /* csinv */
+ value = 706; /* --> csinv. */
+ break;
+ case 710: /* cneg */
+ case 709: /* csneg */
+ value = 709; /* --> csneg. */
+ break;
+ case 729: /* rev64 */
+ case 728: /* rev */
+ value = 728; /* --> rev. */
+ break;
+ case 754: /* lsl */
+ case 753: /* lslv */
+ value = 753; /* --> lslv. */
+ break;
+ case 756: /* lsr */
+ case 755: /* lsrv */
+ value = 755; /* --> lsrv. */
+ break;
+ case 758: /* asr */
+ case 757: /* asrv */
+ value = 757; /* --> asrv. */
+ break;
+ case 760: /* ror */
+ case 759: /* rorv */
+ value = 759; /* --> rorv. */
+ break;
+ case 763: /* cmpp */
+ case 762: /* subps */
+ value = 762; /* --> subps. */
+ break;
+ case 776: /* mul */
+ case 775: /* madd */
+ value = 775; /* --> madd. */
+ break;
+ case 778: /* mneg */
+ case 777: /* msub */
+ value = 777; /* --> msub. */
+ break;
+ case 780: /* smull */
+ case 779: /* smaddl */
+ value = 779; /* --> smaddl. */
+ break;
+ case 782: /* smnegl */
+ case 781: /* smsubl */
+ value = 781; /* --> smsubl. */
+ break;
+ case 785: /* umull */
+ case 784: /* umaddl */
+ value = 784; /* --> umaddl. */
+ break;
+ case 787: /* umnegl */
+ case 786: /* umsubl */
+ value = 786; /* --> umsubl. */
+ break;
+ case 799: /* ror */
+ case 798: /* extr */
+ value = 798; /* --> extr. */
+ break;
+ case 1048: /* bic */
+ case 1047: /* and */
+ value = 1047; /* --> and. */
+ break;
+ case 1050: /* mov */
+ case 1049: /* orr */
+ value = 1049; /* --> orr. */
+ break;
+ case 1053: /* tst */
+ case 1052: /* ands */
+ value = 1052; /* --> ands. */
+ break;
+ case 1058: /* uxtw */
+ case 1057: /* mov */
+ case 1056: /* orr */
+ value = 1056; /* --> orr. */
break;
- case 1020: /* mvn */
- case 1019: /* orn */
- value = 1019; /* --> orn. */
+ case 1060: /* mvn */
+ case 1059: /* orn */
+ value = 1059; /* --> orn. */
break;
- case 1024: /* tst */
- case 1023: /* ands */
- value = 1023; /* --> ands. */
+ case 1064: /* tst */
+ case 1063: /* ands */
+ value = 1063; /* --> ands. */
break;
- case 1150: /* staddb */
- case 1054: /* ldaddb */
- value = 1054; /* --> ldaddb. */
+ case 1190: /* staddb */
+ case 1094: /* ldaddb */
+ value = 1094; /* --> ldaddb. */
break;
- case 1151: /* staddh */
- case 1055: /* ldaddh */
- value = 1055; /* --> ldaddh. */
+ case 1191: /* staddh */
+ case 1095: /* ldaddh */
+ value = 1095; /* --> ldaddh. */
break;
- case 1152: /* stadd */
- case 1056: /* ldadd */
- value = 1056; /* --> ldadd. */
+ case 1192: /* stadd */
+ case 1096: /* ldadd */
+ value = 1096; /* --> ldadd. */
break;
- case 1153: /* staddlb */
- case 1058: /* ldaddlb */
- value = 1058; /* --> ldaddlb. */
+ case 1193: /* staddlb */
+ case 1098: /* ldaddlb */
+ value = 1098; /* --> ldaddlb. */
break;
- case 1154: /* staddlh */
- case 1061: /* ldaddlh */
- value = 1061; /* --> ldaddlh. */
+ case 1194: /* staddlh */
+ case 1101: /* ldaddlh */
+ value = 1101; /* --> ldaddlh. */
break;
- case 1155: /* staddl */
- case 1064: /* ldaddl */
- value = 1064; /* --> ldaddl. */
+ case 1195: /* staddl */
+ case 1104: /* ldaddl */
+ value = 1104; /* --> ldaddl. */
break;
- case 1156: /* stclrb */
- case 1066: /* ldclrb */
- value = 1066; /* --> ldclrb. */
+ case 1196: /* stclrb */
+ case 1106: /* ldclrb */
+ value = 1106; /* --> ldclrb. */
break;
- case 1157: /* stclrh */
- case 1067: /* ldclrh */
- value = 1067; /* --> ldclrh. */
+ case 1197: /* stclrh */
+ case 1107: /* ldclrh */
+ value = 1107; /* --> ldclrh. */
break;
- case 1158: /* stclr */
- case 1068: /* ldclr */
- value = 1068; /* --> ldclr. */
+ case 1198: /* stclr */
+ case 1108: /* ldclr */
+ value = 1108; /* --> ldclr. */
break;
- case 1159: /* stclrlb */
- case 1070: /* ldclrlb */
- value = 1070; /* --> ldclrlb. */
+ case 1199: /* stclrlb */
+ case 1110: /* ldclrlb */
+ value = 1110; /* --> ldclrlb. */
break;
- case 1160: /* stclrlh */
- case 1073: /* ldclrlh */
- value = 1073; /* --> ldclrlh. */
+ case 1200: /* stclrlh */
+ case 1113: /* ldclrlh */
+ value = 1113; /* --> ldclrlh. */
break;
- case 1161: /* stclrl */
- case 1076: /* ldclrl */
- value = 1076; /* --> ldclrl. */
+ case 1201: /* stclrl */
+ case 1116: /* ldclrl */
+ value = 1116; /* --> ldclrl. */
break;
- case 1162: /* steorb */
- case 1078: /* ldeorb */
- value = 1078; /* --> ldeorb. */
+ case 1202: /* steorb */
+ case 1118: /* ldeorb */
+ value = 1118; /* --> ldeorb. */
break;
- case 1163: /* steorh */
- case 1079: /* ldeorh */
- value = 1079; /* --> ldeorh. */
+ case 1203: /* steorh */
+ case 1119: /* ldeorh */
+ value = 1119; /* --> ldeorh. */
break;
- case 1164: /* steor */
- case 1080: /* ldeor */
- value = 1080; /* --> ldeor. */
+ case 1204: /* steor */
+ case 1120: /* ldeor */
+ value = 1120; /* --> ldeor. */
break;
- case 1165: /* steorlb */
- case 1082: /* ldeorlb */
- value = 1082; /* --> ldeorlb. */
+ case 1205: /* steorlb */
+ case 1122: /* ldeorlb */
+ value = 1122; /* --> ldeorlb. */
break;
- case 1166: /* steorlh */
- case 1085: /* ldeorlh */
- value = 1085; /* --> ldeorlh. */
+ case 1206: /* steorlh */
+ case 1125: /* ldeorlh */
+ value = 1125; /* --> ldeorlh. */
break;
- case 1167: /* steorl */
- case 1088: /* ldeorl */
- value = 1088; /* --> ldeorl. */
+ case 1207: /* steorl */
+ case 1128: /* ldeorl */
+ value = 1128; /* --> ldeorl. */
break;
- case 1168: /* stsetb */
- case 1090: /* ldsetb */
- value = 1090; /* --> ldsetb. */
+ case 1208: /* stsetb */
+ case 1130: /* ldsetb */
+ value = 1130; /* --> ldsetb. */
break;
- case 1169: /* stseth */
- case 1091: /* ldseth */
- value = 1091; /* --> ldseth. */
+ case 1209: /* stseth */
+ case 1131: /* ldseth */
+ value = 1131; /* --> ldseth. */
break;
- case 1170: /* stset */
- case 1092: /* ldset */
- value = 1092; /* --> ldset. */
+ case 1210: /* stset */
+ case 1132: /* ldset */
+ value = 1132; /* --> ldset. */
break;
- case 1171: /* stsetlb */
- case 1094: /* ldsetlb */
- value = 1094; /* --> ldsetlb. */
+ case 1211: /* stsetlb */
+ case 1134: /* ldsetlb */
+ value = 1134; /* --> ldsetlb. */
break;
- case 1172: /* stsetlh */
- case 1097: /* ldsetlh */
- value = 1097; /* --> ldsetlh. */
+ case 1212: /* stsetlh */
+ case 1137: /* ldsetlh */
+ value = 1137; /* --> ldsetlh. */
break;
- case 1173: /* stsetl */
- case 1100: /* ldsetl */
- value = 1100; /* --> ldsetl. */
+ case 1213: /* stsetl */
+ case 1140: /* ldsetl */
+ value = 1140; /* --> ldsetl. */
break;
- case 1174: /* stsmaxb */
- case 1102: /* ldsmaxb */
- value = 1102; /* --> ldsmaxb. */
+ case 1214: /* stsmaxb */
+ case 1142: /* ldsmaxb */
+ value = 1142; /* --> ldsmaxb. */
break;
- case 1175: /* stsmaxh */
- case 1103: /* ldsmaxh */
- value = 1103; /* --> ldsmaxh. */
+ case 1215: /* stsmaxh */
+ case 1143: /* ldsmaxh */
+ value = 1143; /* --> ldsmaxh. */
break;
- case 1176: /* stsmax */
- case 1104: /* ldsmax */
- value = 1104; /* --> ldsmax. */
- break;
- case 1177: /* stsmaxlb */
- case 1106: /* ldsmaxlb */
- value = 1106; /* --> ldsmaxlb. */
- break;
- case 1178: /* stsmaxlh */
- case 1109: /* ldsmaxlh */
- value = 1109; /* --> ldsmaxlh. */
- break;
- case 1179: /* stsmaxl */
- case 1112: /* ldsmaxl */
- value = 1112; /* --> ldsmaxl. */
- break;
- case 1180: /* stsminb */
- case 1114: /* ldsminb */
- value = 1114; /* --> ldsminb. */
- break;
- case 1181: /* stsminh */
- case 1115: /* ldsminh */
- value = 1115; /* --> ldsminh. */
- break;
- case 1182: /* stsmin */
- case 1116: /* ldsmin */
- value = 1116; /* --> ldsmin. */
- break;
- case 1183: /* stsminlb */
- case 1118: /* ldsminlb */
- value = 1118; /* --> ldsminlb. */
- break;
- case 1184: /* stsminlh */
- case 1121: /* ldsminlh */
- value = 1121; /* --> ldsminlh. */
- break;
- case 1185: /* stsminl */
- case 1124: /* ldsminl */
- value = 1124; /* --> ldsminl. */
- break;
- case 1186: /* stumaxb */
- case 1126: /* ldumaxb */
- value = 1126; /* --> ldumaxb. */
- break;
- case 1187: /* stumaxh */
- case 1127: /* ldumaxh */
- value = 1127; /* --> ldumaxh. */
- break;
- case 1188: /* stumax */
- case 1128: /* ldumax */
- value = 1128; /* --> ldumax. */
- break;
- case 1189: /* stumaxlb */
- case 1130: /* ldumaxlb */
- value = 1130; /* --> ldumaxlb. */
- break;
- case 1190: /* stumaxlh */
- case 1133: /* ldumaxlh */
- value = 1133; /* --> ldumaxlh. */
- break;
- case 1191: /* stumaxl */
- case 1136: /* ldumaxl */
- value = 1136; /* --> ldumaxl. */
- break;
- case 1192: /* stuminb */
- case 1138: /* lduminb */
- value = 1138; /* --> lduminb. */
- break;
- case 1193: /* stuminh */
- case 1139: /* lduminh */
- value = 1139; /* --> lduminh. */
- break;
- case 1194: /* stumin */
- case 1140: /* ldumin */
- value = 1140; /* --> ldumin. */
- break;
- case 1195: /* stuminlb */
- case 1142: /* lduminlb */
- value = 1142; /* --> lduminlb. */
- break;
- case 1196: /* stuminlh */
- case 1145: /* lduminlh */
- value = 1145; /* --> lduminlh. */
- break;
- case 1197: /* stuminl */
- case 1148: /* lduminl */
- value = 1148; /* --> lduminl. */
- break;
- case 1229: /* mov */
- case 1228: /* movn */
- value = 1228; /* --> movn. */
- break;
- case 1231: /* mov */
- case 1230: /* movz */
- value = 1230; /* --> movz. */
- break;
- case 3211: /* clrbhb */
- case 1311: /* autibsp */
- case 1310: /* autibz */
- case 1309: /* autiasp */
- case 1308: /* autiaz */
- case 1307: /* pacibsp */
- case 1306: /* pacibz */
- case 1305: /* paciasp */
- case 1304: /* paciaz */
- case 1283: /* gcsb */
- case 1263: /* clearbhb */
- case 1262: /* tsb */
- case 1261: /* psb */
- case 1260: /* esb */
- case 1259: /* autib1716 */
- case 1258: /* autia1716 */
- case 1257: /* pacib1716 */
- case 1256: /* pacia1716 */
- case 1255: /* xpaclri */
- case 1254: /* dgh */
- case 1253: /* sevl */
- case 1252: /* sev */
- case 1251: /* wfi */
- case 1250: /* wfe */
- case 1249: /* yield */
- case 1248: /* bti */
- case 1247: /* csdb */
- case 1246: /* nop */
- case 1245: /* hint */
- value = 1245; /* --> hint. */
- break;
- case 1269: /* pssbb */
- case 1268: /* ssbb */
- case 1267: /* dfb */
- case 1265: /* dsb */
- value = 1265; /* --> dsb. */
- break;
- case 1266: /* dsb */
- value = 1266; /* --> dsb. */
- break;
- case 3212: /* trcit */
- case 1297: /* brb */
- case 1296: /* cosp */
- case 1295: /* cpp */
- case 1294: /* dvp */
- case 1293: /* cfp */
- case 1289: /* tlbi */
- case 1288: /* ic */
- case 1287: /* dc */
- case 1286: /* at */
- case 1284: /* sys */
- value = 1284; /* --> sys. */
- break;
- case 1290: /* tlbip */
- case 1285: /* sysp */
- value = 1285; /* --> sysp. */
- break;
- case 1291: /* wfet */
- value = 1291; /* --> wfet. */
- break;
- case 1292: /* wfit */
- value = 1292; /* --> wfit. */
- break;
- case 2097: /* bic */
- case 1360: /* and */
- value = 1360; /* --> and. */
- break;
- case 1343: /* mov */
- case 1362: /* and */
- value = 1362; /* --> and. */
- break;
- case 1347: /* movs */
- case 1363: /* ands */
- value = 1363; /* --> ands. */
- break;
- case 2098: /* cmple */
- case 1398: /* cmpge */
- value = 1398; /* --> cmpge. */
- break;
- case 2101: /* cmplt */
- case 1401: /* cmpgt */
- value = 1401; /* --> cmpgt. */
- break;
- case 2099: /* cmplo */
- case 1403: /* cmphi */
- value = 1403; /* --> cmphi. */
- break;
- case 2100: /* cmpls */
- case 1406: /* cmphs */
- value = 1406; /* --> cmphs. */
- break;
- case 1340: /* mov */
- case 1428: /* cpy */
- value = 1428; /* --> cpy. */
- break;
- case 1342: /* mov */
- case 1429: /* cpy */
- value = 1429; /* --> cpy. */
- break;
- case 2108: /* fmov */
- case 1345: /* mov */
- case 1430: /* cpy */
- value = 1430; /* --> cpy. */
- break;
- case 1334: /* mov */
- case 1442: /* dup */
- value = 1442; /* --> dup. */
- break;
- case 1337: /* mov */
- case 1333: /* mov */
- case 1443: /* dup */
- value = 1443; /* --> dup. */
- break;
- case 2107: /* fmov */
- case 1339: /* mov */
- case 1444: /* dup */
- value = 1444; /* --> dup. */
- break;
- case 1338: /* mov */
- case 1445: /* dupm */
- value = 1445; /* --> dupm. */
- break;
- case 2102: /* eon */
- case 1447: /* eor */
- value = 1447; /* --> eor. */
- break;
- case 1348: /* not */
- case 1449: /* eor */
- value = 1449; /* --> eor. */
- break;
- case 1349: /* nots */
- case 1450: /* eors */
- value = 1450; /* --> eors. */
- break;
- case 2103: /* facle */
- case 1455: /* facge */
- value = 1455; /* --> facge. */
- break;
- case 2104: /* faclt */
- case 1456: /* facgt */
- value = 1456; /* --> facgt. */
- break;
- case 2105: /* fcmle */
- case 1469: /* fcmge */
- value = 1469; /* --> fcmge. */
- break;
- case 2106: /* fcmlt */
- case 1471: /* fcmgt */
- value = 1471; /* --> fcmgt. */
+ case 1216: /* stsmax */
+ case 1144: /* ldsmax */
+ value = 1144; /* --> ldsmax. */
+ break;
+ case 1217: /* stsmaxlb */
+ case 1146: /* ldsmaxlb */
+ value = 1146; /* --> ldsmaxlb. */
+ break;
+ case 1218: /* stsmaxlh */
+ case 1149: /* ldsmaxlh */
+ value = 1149; /* --> ldsmaxlh. */
+ break;
+ case 1219: /* stsmaxl */
+ case 1152: /* ldsmaxl */
+ value = 1152; /* --> ldsmaxl. */
+ break;
+ case 1220: /* stsminb */
+ case 1154: /* ldsminb */
+ value = 1154; /* --> ldsminb. */
+ break;
+ case 1221: /* stsminh */
+ case 1155: /* ldsminh */
+ value = 1155; /* --> ldsminh. */
+ break;
+ case 1222: /* stsmin */
+ case 1156: /* ldsmin */
+ value = 1156; /* --> ldsmin. */
+ break;
+ case 1223: /* stsminlb */
+ case 1158: /* ldsminlb */
+ value = 1158; /* --> ldsminlb. */
+ break;
+ case 1224: /* stsminlh */
+ case 1161: /* ldsminlh */
+ value = 1161; /* --> ldsminlh. */
+ break;
+ case 1225: /* stsminl */
+ case 1164: /* ldsminl */
+ value = 1164; /* --> ldsminl. */
+ break;
+ case 1226: /* stumaxb */
+ case 1166: /* ldumaxb */
+ value = 1166; /* --> ldumaxb. */
+ break;
+ case 1227: /* stumaxh */
+ case 1167: /* ldumaxh */
+ value = 1167; /* --> ldumaxh. */
+ break;
+ case 1228: /* stumax */
+ case 1168: /* ldumax */
+ value = 1168; /* --> ldumax. */
+ break;
+ case 1229: /* stumaxlb */
+ case 1170: /* ldumaxlb */
+ value = 1170; /* --> ldumaxlb. */
+ break;
+ case 1230: /* stumaxlh */
+ case 1173: /* ldumaxlh */
+ value = 1173; /* --> ldumaxlh. */
+ break;
+ case 1231: /* stumaxl */
+ case 1176: /* ldumaxl */
+ value = 1176; /* --> ldumaxl. */
+ break;
+ case 1232: /* stuminb */
+ case 1178: /* lduminb */
+ value = 1178; /* --> lduminb. */
+ break;
+ case 1233: /* stuminh */
+ case 1179: /* lduminh */
+ value = 1179; /* --> lduminh. */
+ break;
+ case 1234: /* stumin */
+ case 1180: /* ldumin */
+ value = 1180; /* --> ldumin. */
+ break;
+ case 1235: /* stuminlb */
+ case 1182: /* lduminlb */
+ value = 1182; /* --> lduminlb. */
+ break;
+ case 1236: /* stuminlh */
+ case 1185: /* lduminlh */
+ value = 1185; /* --> lduminlh. */
+ break;
+ case 1237: /* stuminl */
+ case 1188: /* lduminl */
+ value = 1188; /* --> lduminl. */
+ break;
+ case 1269: /* mov */
+ case 1268: /* movn */
+ value = 1268; /* --> movn. */
+ break;
+ case 1271: /* mov */
+ case 1270: /* movz */
+ value = 1270; /* --> movz. */
+ break;
+ case 3251: /* clrbhb */
+ case 1351: /* autibsp */
+ case 1350: /* autibz */
+ case 1349: /* autiasp */
+ case 1348: /* autiaz */
+ case 1347: /* pacibsp */
+ case 1346: /* pacibz */
+ case 1345: /* paciasp */
+ case 1344: /* paciaz */
+ case 1323: /* gcsb */
+ case 1303: /* clearbhb */
+ case 1302: /* tsb */
+ case 1301: /* psb */
+ case 1300: /* esb */
+ case 1299: /* autib1716 */
+ case 1298: /* autia1716 */
+ case 1297: /* pacib1716 */
+ case 1296: /* pacia1716 */
+ case 1295: /* xpaclri */
+ case 1294: /* dgh */
+ case 1293: /* sevl */
+ case 1292: /* sev */
+ case 1291: /* wfi */
+ case 1290: /* wfe */
+ case 1289: /* yield */
+ case 1288: /* bti */
+ case 1287: /* csdb */
+ case 1286: /* nop */
+ case 1285: /* hint */
+ value = 1285; /* --> hint. */
+ break;
+ case 1309: /* pssbb */
+ case 1308: /* ssbb */
+ case 1307: /* dfb */
+ case 1305: /* dsb */
+ value = 1305; /* --> dsb. */
+ break;
+ case 1306: /* dsb */
+ value = 1306; /* --> dsb. */
+ break;
+ case 3252: /* trcit */
+ case 1337: /* brb */
+ case 1336: /* cosp */
+ case 1335: /* cpp */
+ case 1334: /* dvp */
+ case 1333: /* cfp */
+ case 1329: /* tlbi */
+ case 1328: /* ic */
+ case 1327: /* dc */
+ case 1326: /* at */
+ case 1324: /* sys */
+ value = 1324; /* --> sys. */
+ break;
+ case 1330: /* tlbip */
+ case 1325: /* sysp */
+ value = 1325; /* --> sysp. */
+ break;
+ case 1331: /* wfet */
+ value = 1331; /* --> wfet. */
+ break;
+ case 1332: /* wfit */
+ value = 1332; /* --> wfit. */
+ break;
+ case 2137: /* bic */
+ case 1400: /* and */
+ value = 1400; /* --> and. */
+ break;
+ case 1383: /* mov */
+ case 1402: /* and */
+ value = 1402; /* --> and. */
+ break;
+ case 1387: /* movs */
+ case 1403: /* ands */
+ value = 1403; /* --> ands. */
+ break;
+ case 2138: /* cmple */
+ case 1438: /* cmpge */
+ value = 1438; /* --> cmpge. */
+ break;
+ case 2141: /* cmplt */
+ case 1441: /* cmpgt */
+ value = 1441; /* --> cmpgt. */
+ break;
+ case 2139: /* cmplo */
+ case 1443: /* cmphi */
+ value = 1443; /* --> cmphi. */
+ break;
+ case 2140: /* cmpls */
+ case 1446: /* cmphs */
+ value = 1446; /* --> cmphs. */
+ break;
+ case 1380: /* mov */
+ case 1468: /* cpy */
+ value = 1468; /* --> cpy. */
+ break;
+ case 1382: /* mov */
+ case 1469: /* cpy */
+ value = 1469; /* --> cpy. */
+ break;
+ case 2148: /* fmov */
+ case 1385: /* mov */
+ case 1470: /* cpy */
+ value = 1470; /* --> cpy. */
+ break;
+ case 1374: /* mov */
+ case 1482: /* dup */
+ value = 1482; /* --> dup. */
+ break;
+ case 1377: /* mov */
+ case 1373: /* mov */
+ case 1483: /* dup */
+ value = 1483; /* --> dup. */
+ break;
+ case 2147: /* fmov */
+ case 1379: /* mov */
+ case 1484: /* dup */
+ value = 1484; /* --> dup. */
+ break;
+ case 1378: /* mov */
+ case 1485: /* dupm */
+ value = 1485; /* --> dupm. */
+ break;
+ case 2142: /* eon */
+ case 1487: /* eor */
+ value = 1487; /* --> eor. */
+ break;
+ case 1388: /* not */
+ case 1489: /* eor */
+ value = 1489; /* --> eor. */
+ break;
+ case 1389: /* nots */
+ case 1490: /* eors */
+ value = 1490; /* --> eors. */
+ break;
+ case 2143: /* facle */
+ case 1495: /* facge */
+ value = 1495; /* --> facge. */
+ break;
+ case 2144: /* faclt */
+ case 1496: /* facgt */
+ value = 1496; /* --> facgt. */
+ break;
+ case 2145: /* fcmle */
+ case 1509: /* fcmge */
+ value = 1509; /* --> fcmge. */
+ break;
+ case 2146: /* fcmlt */
+ case 1511: /* fcmgt */
+ value = 1511; /* --> fcmgt. */
break;
- case 1331: /* fmov */
- case 1477: /* fcpy */
- value = 1477; /* --> fcpy. */
+ case 1371: /* fmov */
+ case 1517: /* fcpy */
+ value = 1517; /* --> fcpy. */
break;
- case 1330: /* fmov */
- case 1500: /* fdup */
- value = 1500; /* --> fdup. */
+ case 1370: /* fmov */
+ case 1540: /* fdup */
+ value = 1540; /* --> fdup. */
break;
- case 1786: /* ldr */
- case 1785: /* ldr */
- value = 1785; /* --> ldr. */
+ case 1826: /* ldr */
+ case 1825: /* ldr */
+ value = 1825; /* --> ldr. */
break;
- case 1332: /* mov */
- case 1816: /* orr */
- value = 1816; /* --> orr. */
+ case 1372: /* mov */
+ case 1856: /* orr */
+ value = 1856; /* --> orr. */
break;
- case 2109: /* orn */
- case 1817: /* orr */
- value = 1817; /* --> orr. */
+ case 2149: /* orn */
+ case 1857: /* orr */
+ value = 1857; /* --> orr. */
break;
- case 1336: /* mov */
- case 1335: /* mov */
- case 1819: /* orr */
- value = 1819; /* --> orr. */
+ case 1376: /* mov */
+ case 1375: /* mov */
+ case 1859: /* orr */
+ value = 1859; /* --> orr. */
break;
- case 1346: /* movs */
- case 1820: /* orrs */
- value = 1820; /* --> orrs. */
+ case 1386: /* movs */
+ case 1860: /* orrs */
+ value = 1860; /* --> orrs. */
break;
- case 1823: /* pfalse */
- case 1822: /* pfalse */
- value = 1822; /* --> pfalse. */
+ case 1863: /* pfalse */
+ case 1862: /* pfalse */
+ value = 1862; /* --> pfalse. */
break;
- case 1341: /* mov */
- case 1883: /* sel */
- value = 1883; /* --> sel. */
+ case 1381: /* mov */
+ case 1923: /* sel */
+ value = 1923; /* --> sel. */
break;
- case 1344: /* mov */
- case 1884: /* sel */
- value = 1884; /* --> sel. */
+ case 1384: /* mov */
+ case 1924: /* sel */
+ value = 1924; /* --> sel. */
break;
- case 2005: /* str */
- case 2004: /* str */
- value = 2004; /* --> str. */
+ case 2045: /* str */
+ case 2044: /* str */
+ value = 2044; /* --> str. */
break;
- case 2432: /* mov */
- case 2434: /* mova */
- value = 2434; /* --> mova. */
+ case 2472: /* mov */
+ case 2474: /* mova */
+ value = 2474; /* --> mova. */
break;
- case 2433: /* mov */
- case 2435: /* mova */
- value = 2435; /* --> mova. */
+ case 2473: /* mov */
+ case 2475: /* mova */
+ value = 2475; /* --> mova. */
break;
- case 2453: /* psel */
- case 2452: /* psel */
- value = 2452; /* --> psel. */
+ case 2493: /* psel */
+ case 2492: /* psel */
+ value = 2492; /* --> psel. */
break;
- case 2658: /* mov */
- case 2666: /* mova */
- value = 2666; /* --> mova. */
+ case 2698: /* mov */
+ case 2706: /* mova */
+ value = 2706; /* --> mova. */
break;
- case 2659: /* mov */
- case 2667: /* mova */
- value = 2667; /* --> mova. */
+ case 2699: /* mov */
+ case 2707: /* mova */
+ value = 2707; /* --> mova. */
break;
- case 2660: /* mov */
- case 2668: /* mova */
- value = 2668; /* --> mova. */
+ case 2700: /* mov */
+ case 2708: /* mova */
+ value = 2708; /* --> mova. */
break;
- case 2661: /* mov */
- case 2669: /* mova */
- value = 2669; /* --> mova. */
+ case 2701: /* mov */
+ case 2709: /* mova */
+ value = 2709; /* --> mova. */
break;
- case 2662: /* mov */
- case 2670: /* mova */
- value = 2670; /* --> mova. */
+ case 2702: /* mov */
+ case 2710: /* mova */
+ value = 2710; /* --> mova. */
break;
- case 2663: /* mov */
- case 2671: /* mova */
- value = 2671; /* --> mova. */
+ case 2703: /* mov */
+ case 2711: /* mova */
+ value = 2711; /* --> mova. */
break;
- case 2664: /* mov */
- case 2672: /* mova */
- value = 2672; /* --> mova. */
+ case 2704: /* mov */
+ case 2712: /* mova */
+ value = 2712; /* --> mova. */
break;
- case 2665: /* mov */
- case 2673: /* mova */
- value = 2673; /* --> mova. */
+ case 2705: /* mov */
+ case 2713: /* mova */
+ value = 2713; /* --> mova. */
break;
default: return NULL;
}
@@ -708,12 +772,9 @@ aarch64_insert_operand (const aarch64_operand *self,
case 32:
case 33:
case 34:
- case 123:
- case 124:
- case 125:
- case 188:
- case 189:
- case 190:
+ case 126:
+ case 127:
+ case 128:
case 191:
case 192:
case 193:
@@ -725,34 +786,37 @@ aarch64_insert_operand (const aarch64_operand *self,
case 199:
case 200:
case 201:
- case 217:
- case 218:
- case 219:
+ case 202:
+ case 203:
+ case 204:
case 220:
- case 230:
- case 231:
- case 232:
+ case 221:
+ case 222:
+ case 223:
case 233:
case 234:
- case 245:
- case 249:
- case 253:
- case 254:
- case 262:
- case 263:
- case 264:
- case 271:
- case 272:
- case 273:
+ case 235:
+ case 236:
+ case 237:
+ case 248:
+ case 252:
+ case 256:
+ case 257:
+ case 265:
+ case 266:
+ case 267:
case 274:
- case 308:
- case 312:
+ case 275:
+ case 276:
+ case 277:
+ case 311:
+ case 315:
return aarch64_ins_regno (self, info, code, inst, errors);
case 6:
- case 119:
- case 120:
- case 318:
+ case 122:
+ case 123:
case 321:
+ case 324:
return aarch64_ins_none (self, info, code, inst, errors);
case 17:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -767,19 +831,16 @@ aarch64_insert_operand (const aarch64_operand *self,
case 37:
case 38:
case 39:
- case 323:
+ case 326:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 40:
case 41:
case 42:
- case 235:
- case 236:
+ case 238:
case 239:
- case 275:
- case 276:
- case 291:
- case 292:
- case 293:
+ case 242:
+ case 278:
+ case 279:
case 294:
case 295:
case 296:
@@ -794,12 +855,15 @@ aarch64_insert_operand (const aarch64_operand *self,
case 305:
case 306:
case 307:
+ case 308:
case 309:
case 310:
- case 311:
+ case 312:
case 313:
case 314:
- case 315:
+ case 316:
+ case 317:
+ case 318:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 43:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -832,31 +896,34 @@ aarch64_insert_operand (const aarch64_operand *self,
case 75:
case 76:
case 77:
- case 89:
- case 90:
+ case 78:
+ case 79:
case 91:
case 92:
- case 118:
- case 122:
- case 185:
- case 187:
- case 208:
- case 209:
- case 210:
+ case 93:
+ case 94:
+ case 95:
+ case 121:
+ case 125:
+ case 188:
+ case 190:
case 211:
case 212:
case 213:
case 214:
case 215:
case 216:
- case 277:
- case 316:
- case 317:
+ case 217:
+ case 218:
+ case 219:
+ case 280:
case 319:
case 320:
case 322:
- case 327:
- case 328:
+ case 323:
+ case 325:
+ case 330:
+ case 331:
return aarch64_ins_imm (self, info, code, inst, errors);
case 52:
case 53:
@@ -866,88 +933,85 @@ aarch64_insert_operand (const aarch64_operand *self,
case 56:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
case 60:
- case 175:
+ case 178:
return aarch64_ins_fpimm (self, info, code, inst, errors);
- case 78:
- case 183:
+ case 80:
+ case 186:
return aarch64_ins_limm (self, info, code, inst, errors);
- case 79:
+ case 81:
return aarch64_ins_aimm (self, info, code, inst, errors);
- case 80:
+ case 82:
return aarch64_ins_imm_half (self, info, code, inst, errors);
- case 81:
- return aarch64_ins_fbits (self, info, code, inst, errors);
case 83:
- case 84:
- case 180:
- return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
+ return aarch64_ins_fbits (self, info, code, inst, errors);
case 85:
- case 179:
- case 181:
- return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
case 86:
+ case 183:
+ return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
case 87:
+ case 182:
+ case 184:
+ return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
+ case 88:
+ case 89:
return aarch64_ins_cond (self, info, code, inst, errors);
- case 93:
- case 102:
- return aarch64_ins_addr_simple (self, info, code, inst, errors);
- case 94:
- return aarch64_ins_addr_regoff (self, info, code, inst, errors);
- case 95:
case 96:
+ case 105:
+ return aarch64_ins_addr_simple (self, info, code, inst, errors);
case 97:
+ return aarch64_ins_addr_regoff (self, info, code, inst, errors);
+ case 98:
case 99:
- case 101:
+ case 100:
+ case 102:
+ case 104:
return aarch64_ins_addr_simm (self, info, code, inst, errors);
- case 98:
+ case 101:
return aarch64_ins_addr_simm10 (self, info, code, inst, errors);
- case 100:
- return aarch64_ins_addr_uimm12 (self, info, code, inst, errors);
case 103:
- return aarch64_ins_addr_offset (self, info, code, inst, errors);
- case 104:
- return aarch64_ins_simd_addr_post (self, info, code, inst, errors);
- case 105:
+ return aarch64_ins_addr_uimm12 (self, info, code, inst, errors);
case 106:
- return aarch64_ins_sysreg (self, info, code, inst, errors);
+ return aarch64_ins_addr_offset (self, info, code, inst, errors);
case 107:
- return aarch64_ins_pstatefield (self, info, code, inst, errors);
+ return aarch64_ins_simd_addr_post (self, info, code, inst, errors);
case 108:
case 109:
+ return aarch64_ins_sysreg (self, info, code, inst, errors);
case 110:
+ return aarch64_ins_pstatefield (self, info, code, inst, errors);
case 111:
case 112:
case 113:
- return aarch64_ins_sysins_op (self, info, code, inst, errors);
case 114:
+ case 115:
case 116:
+ return aarch64_ins_sysins_op (self, info, code, inst, errors);
+ case 117:
+ case 119:
return aarch64_ins_barrier (self, info, code, inst, errors);
- case 115:
+ case 118:
return aarch64_ins_barrier_dsb_nxs (self, info, code, inst, errors);
- case 117:
+ case 120:
return aarch64_ins_prfop (self, info, code, inst, errors);
- case 121:
+ case 124:
return aarch64_ins_hint (self, info, code, inst, errors);
- case 126:
- case 127:
- return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
- case 128:
case 129:
case 130:
+ return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
case 131:
- return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 132:
- return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 133:
- return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
case 134:
+ return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 135:
+ return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 136:
+ return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
case 137:
- return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 138:
case 139:
case 140:
+ return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 141:
case 142:
case 143:
@@ -965,124 +1029,127 @@ aarch64_insert_operand (const aarch64_operand *self,
case 155:
case 156:
case 157:
- return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 158:
case 159:
case 160:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 161:
case 162:
case 163:
case 164:
case 165:
- return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 166:
case 167:
case 168:
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 169:
- return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 170:
- return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 171:
- return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 172:
- return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 173:
- return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 174:
- return aarch64_ins_sve_asimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
+ case 175:
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
case 176:
- return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
+ return aarch64_ins_sve_aimm (self, info, code, inst, errors);
case 177:
+ return aarch64_ins_sve_asimm (self, info, code, inst, errors);
+ case 179:
+ return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
+ case 180:
return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
- case 178:
+ case 181:
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
- case 182:
+ case 185:
return aarch64_ins_inv_limm (self, info, code, inst, errors);
- case 184:
+ case 187:
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
- case 186:
+ case 189:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 202:
- case 203:
- case 204:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 205:
case 206:
case 207:
- case 290:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
+ case 208:
+ case 209:
+ case 210:
+ case 293:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 221:
- case 222:
- case 223:
case 224:
- return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
case 225:
case 226:
case 227:
+ return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
case 228:
- return aarch64_ins_sme_za_vrs2 (self, info, code, inst, errors);
case 229:
+ case 230:
+ case 231:
+ return aarch64_ins_sme_za_vrs2 (self, info, code, inst, errors);
+ case 232:
return aarch64_ins_sme_za_tile_to_vec (self, info, code, inst, errors);
- case 237:
- case 238:
case 240:
case 241:
- case 242:
case 243:
case 244:
- return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 245:
case 246:
case 247:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
- case 248:
+ return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 249:
case 250:
- case 270:
- return aarch64_ins_sve_reglist (self, info, code, inst, errors);
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
case 251:
- case 252:
+ case 253:
+ case 273:
+ return aarch64_ins_sve_reglist (self, info, code, inst, errors);
+ case 254:
case 255:
- case 256:
- case 257:
case 258:
case 259:
- case 269:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 260:
case 261:
+ case 262:
+ case 272:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
+ case 263:
+ case 264:
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
- case 265:
- case 267:
- case 278:
- return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
- case 266:
case 268:
- return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 279:
- case 280:
+ case 270:
case 281:
+ return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 269:
+ case 271:
+ return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 282:
case 283:
case 284:
case 285:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 286:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 287:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 288:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 289:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 290:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 291:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 292:
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
- case 324:
- case 325:
- case 326:
- return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
+ case 327:
+ case 328:
case 329:
- case 330:
- case 331:
+ return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
case 332:
- return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
case 333:
+ case 334:
+ case 335:
+ return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
+ case 336:
return aarch64_ins_rcpc3_addr_offset (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index c096dbc9725..7138ab38650 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -50,7 +50,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000000xxxxxxxxxxxxxxxxxxxxx
udf. */
- return 754;
+ return 794;
}
else
{
@@ -62,7 +62,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx00xxx
fmopa. */
- return 2409;
+ return 2449;
}
else
{
@@ -70,7 +70,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx10xxx
fmops. */
- return 2412;
+ return 2452;
}
}
else
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2513;
+ return 2553;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2514;
+ return 2554;
}
}
}
@@ -102,7 +102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000x10xxxxxxxxxxxxxxxx0xxxx
fmopa. */
- return 2410;
+ return 2450;
}
else
{
@@ -110,7 +110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000x10xxxxxxxxxxxxxxxx1xxxx
fmops. */
- return 2413;
+ return 2453;
}
}
}
@@ -128,7 +128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx00000xxxxxxxxxxxxxxxxx
mova. */
- return 2435;
+ return 2475;
}
else
{
@@ -140,7 +140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
[...]
[diff truncated at 100000 bytes]
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