[binutils-gdb] aarch64: rcpc3: add support in general_constraint_met_p

[Victor Do Nascimento]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=5c77e72e015ec1fcdcbf78b4f2a4f245922e666f

commit 5c77e72e015ec1fcdcbf78b4f2a4f245922e666f
Author: Victor Do Nascimento <victor.donascimento@arm.com>
Date:   Tue Jan 9 10:04:11 2024 +0000

    aarch64: rcpc3: add support in general_constraint_met_p
    
    Given the introduction of the new address operand types for rcpc3
    instructions, this patch adds the necessary logic to teach
    `general_constraint_met_p` how to proper handle these.

Diff:
---
 opcodes/aarch64-opc.c | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 06d74870cba..5b76f2cfa21 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -2114,6 +2114,19 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
 	      return 0;
 	    }
 	  break;
+	case rcpc3:
+	  if (opnd->addr.writeback)
+	    if ((type == AARCH64_OPND_RCPC3_ADDR_PREIND_WB
+		 && !opnd->addr.preind)
+		|| (type == AARCH64_OPND_RCPC3_ADDR_POSTIND
+		    && !opnd->addr.postind))
+	      {
+		set_syntax_error (mismatch_detail, idx,
+				  _("unexpected address writeback"));
+		return 0;
+	      }
+
+	  break;
 	default:
 	  assert (opnd->addr.writeback == 0);
 	  break;
@@ -2493,6 +2506,33 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
 	  modifiers = 1 << AARCH64_MOD_UXTW;
 	  goto sve_zz_operand;
 
+	case AARCH64_OPND_RCPC3_ADDR_OPT_PREIND_WB:
+	case AARCH64_OPND_RCPC3_ADDR_OPT_POSTIND:
+	case AARCH64_OPND_RCPC3_ADDR_PREIND_WB:
+	case AARCH64_OPND_RCPC3_ADDR_POSTIND:
+	  {
+	    int num_bytes = calc_ldst_datasize (opnds);
+	    int abs_offset = (type == AARCH64_OPND_RCPC3_ADDR_OPT_PREIND_WB
+			      || type == AARCH64_OPND_RCPC3_ADDR_PREIND_WB)
+	      ? opnd->addr.offset.imm * -1
+	      : opnd->addr.offset.imm;
+	    if ((int) num_bytes != abs_offset
+		&& opnd->addr.offset.imm != 0)
+	      {
+		set_other_error (mismatch_detail, idx,
+				 _("invalid increment amount"));
+		return 0;
+	      }
+	  }
+	  break;
+
+	case AARCH64_OPND_RCPC3_ADDR_OFFSET:
+	  if (!value_in_range_p (opnd->addr.offset.imm, -256, 255))
+	    {
+	      set_imm_out_of_range_error (mismatch_detail, idx, -256, 255);
+	      return 0;
+	    }
+
 	default:
 	  break;
 	}