[binutils-gdb] [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Extension
Sudakshina Das
sudi@sourceware.org
Mon Nov 12 13:31:00 GMT 2018
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=193614f2b908c2b55c188cb14c3ef78993ff85b0
commit 193614f2b908c2b55c188cb14c3ef78993ff85b0
Author: Sudakshina Das <sudi.das@arm.com>
Date: Mon Nov 12 12:52:55 2018 +0000
[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Extension
This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions which is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.
This patch add support to the Tag generation instructions from
MTE. These are the following instructions added in this patch:
- IRG <Xd|SP>, <Xn|SP>{, Xm}
- ADDG <Xd|SP>, <Xn|SP>, #<uimm1>. #<uimm2>
- SUBG <Xd|SP>, <Xn|SP>, #<uimm1>. #<uimm2>
- GMI <Xd>, <Xn|SP>, <Xm>
where
<Xd|SP> : Is the 64-bit destination GPR or Stack pointer.
<Xn|SP> : Is the 64-bit source GPR or Stack pointer.
<uimm6> : Is the unsigned immediate, a multiple of 16
in the range 0 to 1008.
<uimm4> : Is the unsigned immediate, in the range 0 to 15.
*** include/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (aarch64_opnd): Add
AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
*** opcodes/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.h (aarch64_field_kind): New FLD_imm4_3.
(OPD_F_SHIFT_BY_4, operand_need_shift_by_four): New.
* aarch64-opc.c (fields): Add entry for imm4_3.
(operand_general_constraint_met_p): Add cases for
AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
(aarch64_print_operand): Likewise.
* aarch64-tbl.h (QL_ADDG): New.
(aarch64_opcode_table): Add addg, subg, irg and gmi.
(AARCH64_OPERANDS): Define UIMM4_ADDG and UIMM10.
* aarch64-asm.c (aarch64_ins_imm): Add case for
operand_need_shift_by_four.
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
*** gas/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (parse_operands): Add switch case for
AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: New.
* testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.d: Likewise.
Diff:
---
gas/ChangeLog | 10 +
gas/config/tc-aarch64.c | 2 +
gas/testsuite/gas/aarch64/armv8_5-a-memtag.d | 35 +
gas/testsuite/gas/aarch64/armv8_5-a-memtag.s | 37 +
gas/testsuite/gas/aarch64/illegal-memtag.d | 3 +
gas/testsuite/gas/aarch64/illegal-memtag.l | 14 +
gas/testsuite/gas/aarch64/illegal-memtag.s | 19 +
include/ChangeLog | 5 +
include/opcode/aarch64.h | 2 +
opcodes/ChangeLog | 17 +
opcodes/aarch64-asm-2.c | 1068 +++---
opcodes/aarch64-asm.c | 2 +
opcodes/aarch64-dis-2.c | 4674 +++++++++++++-------------
opcodes/aarch64-dis.c | 2 +
opcodes/aarch64-opc-2.c | 116 +-
opcodes/aarch64-opc.c | 19 +
opcodes/aarch64-opc.h | 11 +
opcodes/aarch64-tbl.h | 14 +
18 files changed, 3137 insertions(+), 2913 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2986f0d..605fd05 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,15 @@
2018-11-12 Sudakshina Das <sudi.das@arm.com>
+ * config/tc-aarch64.c (parse_operands): Add switch case for
+ AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
+ * testsuite/gas/aarch64/armv8_5-a-memtag.s: New.
+ * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
+ * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+ * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
+ * testsuite/gas/aarch64/illegal-memtag.d: Likewise.
+
+2018-11-12 Sudakshina Das <sudi.das@arm.com>
+
* config/tc-aarch64.c (aarch64_features): Add "memtag"
as a new option.
* doc/c-aarch64.texi: Document the same.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index b9aceb2..5f79e92 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -5742,6 +5742,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SIMM5:
case AARCH64_OPND_FBITS:
case AARCH64_OPND_UIMM4:
+ case AARCH64_OPND_UIMM4_ADDG:
+ case AARCH64_OPND_UIMM10:
case AARCH64_OPND_UIMM3_OP1:
case AARCH64_OPND_UIMM3_OP2:
case AARCH64_OPND_IMM_VLSL:
diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
new file mode 100644
index 0000000..4610461
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
@@ -0,0 +1,35 @@
+#as: -march=armv8.5-a+memtag
+# objdump: -d
+
+.*: .*
+
+
+Disassembly of section \.text:
+
+0+0 <func>:
+.*: 9ac01000 irg x0, x0, x0
+.*: 9ac0101b irg x27, x0, x0
+.*: 9ac01360 irg x0, x27, x0
+.*: 9adb1000 irg x0, x0, x27
+.*: 9adb137b irg x27, x27, x27
+.*: 9adf101f irg sp, x0
+.*: 9adf13e0 irg x0, sp
+.*: 9ac01400 gmi x0, x0, x0
+.*: 9ac0141b gmi x27, x0, x0
+.*: 9ac01760 gmi x0, x27, x0
+.*: 9adb1400 gmi x0, x0, x27
+.*: 9adb177b gmi x27, x27, x27
+.*: 9ac017e0 gmi x0, sp, x0
+.*: 9ac0141f gmi xzr, x0, x0
+.*: 91800000 addg x0, x0, #0x0, #0x0
+.*: 9180001b addg x27, x0, #0x0, #0x0
+.*: 91800360 addg x0, x27, #0x0, #0x0
+.*: 9180037b addg x27, x27, #0x0, #0x0
+.*: 91bf3fe0 addg x0, sp, #0x3f0, #0xf
+.*: 91aa3c1f addg sp, x0, #0x2a0, #0xf
+.*: d1800000 subg x0, x0, #0x0, #0x0
+.*: d180001b subg x27, x0, #0x0, #0x0
+.*: d1800360 subg x0, x27, #0x0, #0x0
+.*: d180037b subg x27, x27, #0x0, #0x0
+.*: d1bf3fe0 subg x0, sp, #0x3f0, #0xf
+.*: d1bf141f subg sp, x0, #0x3f0, #0x5
diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s
new file mode 100644
index 0000000..96a3f37
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s
@@ -0,0 +1,37 @@
+func:
+ # OP x[0,30], x[0,30], x[0,30]
+ .macro expand_3_reg op
+ \op x0, x0, x0
+ \op x27, x0, x0
+ \op x0, x27, x0
+ \op x0, x0, x27
+ \op x27, x27, x27
+ .endm
+
+ # OP x[0,30], x[0,30], #[0,30], #[0,14]
+ .macro expand_2_reg op
+ \op x0, x0, #0, #0
+ \op x27, x0, #0, #0
+ \op x0, x27, #0, #0
+ \op x27, x27, #0, #0
+ .endm
+
+ # IRG
+ expand_3_reg irg
+ irg sp, x0
+ irg x0, sp
+
+ # GMI
+ expand_3_reg gmi
+ gmi x0, sp, x0
+ gmi xzr, x0, x0
+
+ # ADDG
+ expand_2_reg addg
+ addg x0, sp, #0x3f0, #0xf
+ addg sp, x0, #0x2a0, #0xf
+
+ # SUBG
+ expand_2_reg subg
+ subg x0, sp, #0x3f0, #0xf
+ subg sp, x0, #0x3f0, #0x5
diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.d b/gas/testsuite/gas/aarch64/illegal-memtag.d
new file mode 100644
index 0000000..913661a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-memtag.d
@@ -0,0 +1,3 @@
+#as: -march=armv8.5-a+memtag
+#source: illegal-memtag.s
+#error_output: illegal-memtag.l
diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.l b/gas/testsuite/gas/aarch64/illegal-memtag.l
new file mode 100644
index 0000000..501faa7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-memtag.l
@@ -0,0 +1,14 @@
+[^:]*: Assembler messages:
+[^:]*:[0-9]+: Error: immediate value must be a multiple of 16 at operand 3 -- `addg x1,x2,#0x3ef,#0x6'
+[^:]*:[0-9]+: Error: immediate value out of range 0 to 1008 at operand 3 -- `subg x1,x2,#0x400,#0x3'
+[^:]*:[0-9]+: Error: immediate value out of range 0 to 1008 at operand 3 -- `subg x1,x2,-16,#0x3'
+[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 4 -- `addg x1,x2,#0x3f0,#0x10'
+[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 4 -- `subg x1,x2,#0x3f0,-4'
+[^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `irg xzr,x2,x3'
+[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `irg x1,xzr,x3'
+[^:]*:[0-9]+: Error: operand 3 must be an integer register -- `irg x1,x2,sp'
+[^:]*:[0-9]+: Error: operand 3 must be an integer register -- `gmi x1,x2,sp'
+[^:]*:[0-9]+: Error: operand 1 must be an integer register -- `gmi sp,x2,x3'
+[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `gmi x1,xzr,x3'
+[^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `addg xzr,x2,#0,#0'
+[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `subg x1,xzr,#0,#0'
diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.s b/gas/testsuite/gas/aarch64/illegal-memtag.s
new file mode 100644
index 0000000..05f3ead
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-memtag.s
@@ -0,0 +1,19 @@
+func:
+ # ADDG/SUBG : Fail uimm6
+ addg x1, x2, #0x3ef, #0x6
+ subg x1, x2, #0x400, #0x3
+ subg x1, x2, -16, #0x3
+
+ # ADDG/SUBG : Fail uimm4
+ addg x1, x2, #0x3f0, #0x10
+ subg x1, x2, #0x3f0, -4
+
+ # Illegal SP/XZR registers
+ irg xzr, x2, x3
+ irg x1, xzr, x3
+ irg x1, x2, sp
+ gmi x1, x2, sp
+ gmi sp, x2, x3
+ gmi x1, xzr, x3
+ addg xzr, x2, #0, #0
+ subg x1, xzr, #0, #0
diff --git a/include/ChangeLog b/include/ChangeLog
index 08057ef..2bdee25 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,5 +1,10 @@
2018-11-12 Sudakshina Das <sudi.das@arm.com>
+ * opcode/aarch64.h (aarch64_opnd): Add
+ AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
+
+2018-11-12 Sudakshina Das <sudi.das@arm.com>
+
* opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
2018-11-07 Roman Bolshakov <r.bolshakov@yadro.com>
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 813c36a..d6e639d 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -246,7 +246,9 @@ enum aarch64_opnd
AARCH64_OPND_UIMM3_OP1,/* Unsigned 3-bit immediate in the op1 field. */
AARCH64_OPND_UIMM3_OP2,/* Unsigned 3-bit immediate in the op2 field. */
AARCH64_OPND_UIMM4, /* Unsigned 4-bit immediate in the CRm field. */
+ AARCH64_OPND_UIMM4_ADDG,/* Unsigned 4-bit immediate in addg/subg. */
AARCH64_OPND_UIMM7, /* Unsigned 7-bit immediate in the CRm:op2 fields. */
+ AARCH64_OPND_UIMM10, /* Unsigned 10-bit immediate in addg/subg. */
AARCH64_OPND_BIT_NUM, /* Immediate. */
AARCH64_OPND_EXCEPTION,/* imm16 operand in exception instructions. */
AARCH64_OPND_CCMP_IMM,/* Immediate in conditional compare instructions. */
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4fc11f7..66633c7 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,22 @@
2018-11-12 Sudakshina Das <sudi.das@arm.com>
+ * aarch64-opc.h (aarch64_field_kind): New FLD_imm4_3.
+ (OPD_F_SHIFT_BY_4, operand_need_shift_by_four): New.
+ * aarch64-opc.c (fields): Add entry for imm4_3.
+ (operand_general_constraint_met_p): Add cases for
+ AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
+ (aarch64_print_operand): Likewise.
+ * aarch64-tbl.h (QL_ADDG): New.
+ (aarch64_opcode_table): Add addg, subg, irg and gmi.
+ (AARCH64_OPERANDS): Define UIMM4_ADDG and UIMM10.
+ * aarch64-asm.c (aarch64_ins_imm): Add case for
+ operand_need_shift_by_four.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
+2018-11-12 Sudakshina Das <sudi.das@arm.com>
+
* aarch64-tbl.h (aarch64_feature_memtag): New.
(MEMTAG, MEMTAG_INSN): New.
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index f668e7d..36dff0b 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -58,529 +58,529 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 17: /* subs */
value = 17; /* --> subs. */
break;
- case 21: /* cmn */
- case 20: /* adds */
- value = 20; /* --> adds. */
+ case 23: /* cmn */
+ case 22: /* adds */
+ value = 22; /* --> adds. */
break;
- case 23: /* neg */
- case 22: /* sub */
- value = 22; /* --> sub. */
+ case 25: /* neg */
+ case 24: /* sub */
+ value = 24; /* --> sub. */
break;
- case 25: /* cmp */
- case 26: /* negs */
- case 24: /* subs */
- value = 24; /* --> subs. */
- break;
- case 151: /* mov */
- case 150: /* umov */
- value = 150; /* --> umov. */
+ case 27: /* cmp */
+ case 28: /* negs */
+ case 26: /* subs */
+ value = 26; /* --> subs. */
break;
case 153: /* mov */
- case 152: /* ins */
- value = 152; /* --> ins. */
+ case 152: /* umov */
+ value = 152; /* --> umov. */
break;
case 155: /* mov */
case 154: /* ins */
value = 154; /* --> ins. */
break;
- case 241: /* mvn */
- case 240: /* not */
- value = 240; /* --> not. */
- break;
- case 316: /* mov */
- case 315: /* orr */
- value = 315; /* --> orr. */
- break;
- case 387: /* sxtl */
- case 386: /* sshll */
- value = 386; /* --> sshll. */
- break;
- case 389: /* sxtl2 */
- case 388: /* sshll2 */
- value = 388; /* --> sshll2. */
- break;
- case 411: /* uxtl */
- case 410: /* ushll */
- value = 410; /* --> ushll. */
- break;
- case 413: /* uxtl2 */
- case 412: /* ushll2 */
- value = 412; /* --> ushll2. */
- break;
- case 534: /* mov */
- case 533: /* dup */
- value = 533; /* --> dup. */
- break;
- case 621: /* sxtw */
- case 620: /* sxth */
- case 619: /* sxtb */
- case 622: /* asr */
- case 618: /* sbfx */
- case 617: /* sbfiz */
- case 616: /* sbfm */
- value = 616; /* --> sbfm. */
- break;
- case 625: /* bfc */
- case 626: /* bfxil */
- case 624: /* bfi */
- case 623: /* bfm */
- value = 623; /* --> bfm. */
- break;
- case 631: /* uxth */
- case 630: /* uxtb */
- case 633: /* lsr */
- case 632: /* lsl */
- case 629: /* ubfx */
- case 628: /* ubfiz */
- case 627: /* ubfm */
- value = 627; /* --> ubfm. */
- break;
- case 663: /* cset */
- case 662: /* cinc */
- case 661: /* csinc */
- value = 661; /* --> csinc. */
- break;
- case 666: /* csetm */
- case 665: /* cinv */
- case 664: /* csinv */
- value = 664; /* --> csinv. */
- break;
- case 668: /* cneg */
- case 667: /* csneg */
- value = 667; /* --> csneg. */
- break;
- case 686: /* rev */
- case 687: /* rev64 */
- value = 686; /* --> rev. */
- break;
- case 712: /* lsl */
- case 711: /* lslv */
- value = 711; /* --> lslv. */
- break;
- case 714: /* lsr */
- case 713: /* lsrv */
- value = 713; /* --> lsrv. */
- break;
- case 716: /* asr */
- case 715: /* asrv */
- value = 715; /* --> asrv. */
- break;
- case 718: /* ror */
- case 717: /* rorv */
- value = 717; /* --> rorv. */
- break;
- case 729: /* mul */
- case 728: /* madd */
- value = 728; /* --> madd. */
- break;
- case 731: /* mneg */
- case 730: /* msub */
- value = 730; /* --> msub. */
- break;
- case 733: /* smull */
- case 732: /* smaddl */
- value = 732; /* --> smaddl. */
- break;
- case 735: /* smnegl */
- case 734: /* smsubl */
- value = 734; /* --> smsubl. */
- break;
- case 738: /* umull */
- case 737: /* umaddl */
- value = 737; /* --> umaddl. */
- break;
- case 740: /* umnegl */
- case 739: /* umsubl */
- value = 739; /* --> umsubl. */
- break;
- case 751: /* ror */
- case 750: /* extr */
- value = 750; /* --> extr. */
- break;
- case 970: /* bic */
- case 969: /* and */
- value = 969; /* --> and. */
- break;
- case 972: /* mov */
- case 971: /* orr */
- value = 971; /* --> orr. */
- break;
- case 975: /* tst */
- case 974: /* ands */
- value = 974; /* --> ands. */
- break;
- case 980: /* uxtw */
- case 979: /* mov */
- case 978: /* orr */
- value = 978; /* --> orr. */
- break;
- case 982: /* mvn */
- case 981: /* orn */
- value = 981; /* --> orn. */
- break;
- case 986: /* tst */
- case 985: /* ands */
- value = 985; /* --> ands. */
- break;
- case 1112: /* staddb */
- case 1016: /* ldaddb */
- value = 1016; /* --> ldaddb. */
- break;
- case 1113: /* staddh */
- case 1017: /* ldaddh */
- value = 1017; /* --> ldaddh. */
- break;
- case 1114: /* stadd */
- case 1018: /* ldadd */
- value = 1018; /* --> ldadd. */
- break;
- case 1115: /* staddlb */
- case 1020: /* ldaddlb */
- value = 1020; /* --> ldaddlb. */
+ case 157: /* mov */
+ case 156: /* ins */
+ value = 156; /* --> ins. */
+ break;
+ case 243: /* mvn */
+ case 242: /* not */
+ value = 242; /* --> not. */
+ break;
+ case 318: /* mov */
+ case 317: /* orr */
+ value = 317; /* --> orr. */
+ break;
+ case 389: /* sxtl */
+ case 388: /* sshll */
+ value = 388; /* --> sshll. */
+ break;
+ case 391: /* sxtl2 */
+ case 390: /* sshll2 */
+ value = 390; /* --> sshll2. */
+ break;
+ case 413: /* uxtl */
+ case 412: /* ushll */
+ value = 412; /* --> ushll. */
+ break;
+ case 415: /* uxtl2 */
+ case 414: /* ushll2 */
+ value = 414; /* --> ushll2. */
+ break;
+ case 536: /* mov */
+ case 535: /* dup */
+ value = 535; /* --> dup. */
+ break;
+ case 623: /* sxtw */
+ case 622: /* sxth */
+ case 621: /* sxtb */
+ case 624: /* asr */
+ case 620: /* sbfx */
+ case 619: /* sbfiz */
+ case 618: /* sbfm */
+ value = 618; /* --> sbfm. */
+ break;
+ case 627: /* bfc */
+ case 628: /* bfxil */
+ case 626: /* bfi */
+ case 625: /* bfm */
+ value = 625; /* --> bfm. */
+ break;
+ case 633: /* uxth */
+ case 632: /* uxtb */
+ case 635: /* lsr */
+ case 634: /* lsl */
+ case 631: /* ubfx */
+ case 630: /* ubfiz */
+ case 629: /* ubfm */
+ value = 629; /* --> ubfm. */
+ break;
+ case 665: /* cset */
+ case 664: /* cinc */
+ case 663: /* csinc */
+ value = 663; /* --> csinc. */
+ break;
+ case 668: /* csetm */
+ case 667: /* cinv */
+ case 666: /* csinv */
+ value = 666; /* --> csinv. */
+ break;
+ case 670: /* cneg */
+ case 669: /* csneg */
+ value = 669; /* --> csneg. */
+ break;
+ case 688: /* rev */
+ case 689: /* rev64 */
+ value = 688; /* --> rev. */
+ break;
+ case 714: /* lsl */
+ case 713: /* lslv */
+ value = 713; /* --> lslv. */
+ break;
+ case 716: /* lsr */
+ case 715: /* lsrv */
+ value = 715; /* --> lsrv. */
+ break;
+ case 718: /* asr */
+ case 717: /* asrv */
+ value = 717; /* --> asrv. */
+ break;
+ case 720: /* ror */
+ case 719: /* rorv */
+ value = 719; /* --> rorv. */
+ break;
+ case 733: /* mul */
+ case 732: /* madd */
+ value = 732; /* --> madd. */
+ break;
+ case 735: /* mneg */
+ case 734: /* msub */
+ value = 734; /* --> msub. */
+ break;
+ case 737: /* smull */
+ case 736: /* smaddl */
+ value = 736; /* --> smaddl. */
+ break;
+ case 739: /* smnegl */
+ case 738: /* smsubl */
+ value = 738; /* --> smsubl. */
+ break;
+ case 742: /* umull */
+ case 741: /* umaddl */
+ value = 741; /* --> umaddl. */
+ break;
+ case 744: /* umnegl */
+ case 743: /* umsubl */
+ value = 743; /* --> umsubl. */
+ break;
+ case 755: /* ror */
+ case 754: /* extr */
+ value = 754; /* --> extr. */
+ break;
+ case 974: /* bic */
+ case 973: /* and */
+ value = 973; /* --> and. */
+ break;
+ case 976: /* mov */
+ case 975: /* orr */
+ value = 975; /* --> orr. */
+ break;
+ case 979: /* tst */
+ case 978: /* ands */
+ value = 978; /* --> ands. */
+ break;
+ case 984: /* uxtw */
+ case 983: /* mov */
+ case 982: /* orr */
+ value = 982; /* --> orr. */
+ break;
+ case 986: /* mvn */
+ case 985: /* orn */
+ value = 985; /* --> orn. */
+ break;
+ case 990: /* tst */
+ case 989: /* ands */
+ value = 989; /* --> ands. */
+ break;
+ case 1116: /* staddb */
+ case 1020: /* ldaddb */
+ value = 1020; /* --> ldaddb. */
+ break;
+ case 1117: /* staddh */
+ case 1021: /* ldaddh */
+ value = 1021; /* --> ldaddh. */
+ break;
+ case 1118: /* stadd */
+ case 1022: /* ldadd */
+ value = 1022; /* --> ldadd. */
break;
- case 1116: /* staddlh */
- case 1023: /* ldaddlh */
- value = 1023; /* --> ldaddlh. */
+ case 1119: /* staddlb */
+ case 1024: /* ldaddlb */
+ value = 1024; /* --> ldaddlb. */
break;
- case 1117: /* staddl */
- case 1026: /* ldaddl */
- value = 1026; /* --> ldaddl. */
+ case 1120: /* staddlh */
+ case 1027: /* ldaddlh */
+ value = 1027; /* --> ldaddlh. */
break;
- case 1118: /* stclrb */
- case 1028: /* ldclrb */
- value = 1028; /* --> ldclrb. */
+ case 1121: /* staddl */
+ case 1030: /* ldaddl */
+ value = 1030; /* --> ldaddl. */
break;
- case 1119: /* stclrh */
- case 1029: /* ldclrh */
- value = 1029; /* --> ldclrh. */
+ case 1122: /* stclrb */
+ case 1032: /* ldclrb */
+ value = 1032; /* --> ldclrb. */
break;
- case 1120: /* stclr */
- case 1030: /* ldclr */
- value = 1030; /* --> ldclr. */
+ case 1123: /* stclrh */
+ case 1033: /* ldclrh */
+ value = 1033; /* --> ldclrh. */
break;
- case 1121: /* stclrlb */
- case 1032: /* ldclrlb */
- value = 1032; /* --> ldclrlb. */
+ case 1124: /* stclr */
+ case 1034: /* ldclr */
+ value = 1034; /* --> ldclr. */
break;
- case 1122: /* stclrlh */
- case 1035: /* ldclrlh */
- value = 1035; /* --> ldclrlh. */
+ case 1125: /* stclrlb */
+ case 1036: /* ldclrlb */
+ value = 1036; /* --> ldclrlb. */
break;
- case 1123: /* stclrl */
- case 1038: /* ldclrl */
- value = 1038; /* --> ldclrl. */
+ case 1126: /* stclrlh */
+ case 1039: /* ldclrlh */
+ value = 1039; /* --> ldclrlh. */
break;
- case 1124: /* steorb */
- case 1040: /* ldeorb */
- value = 1040; /* --> ldeorb. */
+ case 1127: /* stclrl */
+ case 1042: /* ldclrl */
+ value = 1042; /* --> ldclrl. */
break;
- case 1125: /* steorh */
- case 1041: /* ldeorh */
- value = 1041; /* --> ldeorh. */
+ case 1128: /* steorb */
+ case 1044: /* ldeorb */
+ value = 1044; /* --> ldeorb. */
break;
- case 1126: /* steor */
- case 1042: /* ldeor */
- value = 1042; /* --> ldeor. */
+ case 1129: /* steorh */
+ case 1045: /* ldeorh */
+ value = 1045; /* --> ldeorh. */
break;
- case 1127: /* steorlb */
- case 1044: /* ldeorlb */
- value = 1044; /* --> ldeorlb. */
+ case 1130: /* steor */
+ case 1046: /* ldeor */
+ value = 1046; /* --> ldeor. */
break;
- case 1128: /* steorlh */
- case 1047: /* ldeorlh */
- value = 1047; /* --> ldeorlh. */
+ case 1131: /* steorlb */
+ case 1048: /* ldeorlb */
+ value = 1048; /* --> ldeorlb. */
break;
- case 1129: /* steorl */
- case 1050: /* ldeorl */
- value = 1050; /* --> ldeorl. */
+ case 1132: /* steorlh */
+ case 1051: /* ldeorlh */
+ value = 1051; /* --> ldeorlh. */
break;
- case 1130: /* stsetb */
- case 1052: /* ldsetb */
- value = 1052; /* --> ldsetb. */
+ case 1133: /* steorl */
+ case 1054: /* ldeorl */
+ value = 1054; /* --> ldeorl. */
break;
- case 1131: /* stseth */
- case 1053: /* ldseth */
- value = 1053; /* --> ldseth. */
+ case 1134: /* stsetb */
+ case 1056: /* ldsetb */
+ value = 1056; /* --> ldsetb. */
break;
- case 1132: /* stset */
- case 1054: /* ldset */
- value = 1054; /* --> ldset. */
+ case 1135: /* stseth */
+ case 1057: /* ldseth */
+ value = 1057; /* --> ldseth. */
break;
- case 1133: /* stsetlb */
- case 1056: /* ldsetlb */
- value = 1056; /* --> ldsetlb. */
+ case 1136: /* stset */
+ case 1058: /* ldset */
+ value = 1058; /* --> ldset. */
break;
- case 1134: /* stsetlh */
- case 1059: /* ldsetlh */
- value = 1059; /* --> ldsetlh. */
+ case 1137: /* stsetlb */
+ case 1060: /* ldsetlb */
+ value = 1060; /* --> ldsetlb. */
break;
- case 1135: /* stsetl */
- case 1062: /* ldsetl */
- value = 1062; /* --> ldsetl. */
+ case 1138: /* stsetlh */
+ case 1063: /* ldsetlh */
+ value = 1063; /* --> ldsetlh. */
break;
- case 1136: /* stsmaxb */
- case 1064: /* ldsmaxb */
- value = 1064; /* --> ldsmaxb. */
+ case 1139: /* stsetl */
+ case 1066: /* ldsetl */
+ value = 1066; /* --> ldsetl. */
break;
- case 1137: /* stsmaxh */
- case 1065: /* ldsmaxh */
- value = 1065; /* --> ldsmaxh. */
+ case 1140: /* stsmaxb */
+ case 1068: /* ldsmaxb */
+ value = 1068; /* --> ldsmaxb. */
break;
- case 1138: /* stsmax */
- case 1066: /* ldsmax */
- value = 1066; /* --> ldsmax. */
- break;
- case 1139: /* stsmaxlb */
- case 1068: /* ldsmaxlb */
- value = 1068; /* --> ldsmaxlb. */
- break;
- case 1140: /* stsmaxlh */
- case 1071: /* ldsmaxlh */
- value = 1071; /* --> ldsmaxlh. */
- break;
- case 1141: /* stsmaxl */
- case 1074: /* ldsmaxl */
- value = 1074; /* --> ldsmaxl. */
- break;
- case 1142: /* stsminb */
- case 1076: /* ldsminb */
- value = 1076; /* --> ldsminb. */
- break;
- case 1143: /* stsminh */
- case 1077: /* ldsminh */
- value = 1077; /* --> ldsminh. */
- break;
- case 1144: /* stsmin */
- case 1078: /* ldsmin */
- value = 1078; /* --> ldsmin. */
- break;
- case 1145: /* stsminlb */
- case 1080: /* ldsminlb */
- value = 1080; /* --> ldsminlb. */
- break;
- case 1146: /* stsminlh */
- case 1083: /* ldsminlh */
- value = 1083; /* --> ldsminlh. */
- break;
- case 1147: /* stsminl */
- case 1086: /* ldsminl */
- value = 1086; /* --> ldsminl. */
- break;
- case 1148: /* stumaxb */
- case 1088: /* ldumaxb */
- value = 1088; /* --> ldumaxb. */
- break;
- case 1149: /* stumaxh */
- case 1089: /* ldumaxh */
- value = 1089; /* --> ldumaxh. */
- break;
- case 1150: /* stumax */
- case 1090: /* ldumax */
- value = 1090; /* --> ldumax. */
- break;
- case 1151: /* stumaxlb */
- case 1092: /* ldumaxlb */
- value = 1092; /* --> ldumaxlb. */
- break;
- case 1152: /* stumaxlh */
- case 1095: /* ldumaxlh */
- value = 1095; /* --> ldumaxlh. */
- break;
- case 1153: /* stumaxl */
- case 1098: /* ldumaxl */
- value = 1098; /* --> ldumaxl. */
- break;
- case 1154: /* stuminb */
- case 1100: /* lduminb */
- value = 1100; /* --> lduminb. */
- break;
- case 1155: /* stuminh */
- case 1101: /* lduminh */
- value = 1101; /* --> lduminh. */
- break;
- case 1156: /* stumin */
- case 1102: /* ldumin */
- value = 1102; /* --> ldumin. */
- break;
- case 1157: /* stuminlb */
- case 1104: /* lduminlb */
- value = 1104; /* --> lduminlb. */
- break;
- case 1158: /* stuminlh */
- case 1107: /* lduminlh */
- value = 1107; /* --> lduminlh. */
- break;
- case 1159: /* stuminl */
- case 1110: /* lduminl */
- value = 1110; /* --> lduminl. */
- break;
- case 1161: /* mov */
- case 1160: /* movn */
- value = 1160; /* --> movn. */
- break;
- case 1163: /* mov */
- case 1162: /* movz */
- value = 1162; /* --> movz. */
- break;
- case 1209: /* autibsp */
- case 1208: /* autibz */
- case 1207: /* autiasp */
- case 1206: /* autiaz */
- case 1205: /* pacibsp */
- case 1204: /* pacibz */
- case 1203: /* paciasp */
- case 1202: /* paciaz */
- case 1183: /* psb */
- case 1182: /* esb */
- case 1181: /* autib1716 */
- case 1180: /* autia1716 */
- case 1179: /* pacib1716 */
- case 1178: /* pacia1716 */
- case 1177: /* xpaclri */
- case 1176: /* sevl */
- case 1175: /* sev */
- case 1174: /* wfi */
- case 1173: /* wfe */
- case 1172: /* yield */
- case 1171: /* bti */
- case 1170: /* csdb */
- case 1169: /* nop */
- case 1168: /* hint */
- value = 1168; /* --> hint. */
- break;
- case 1187: /* pssbb */
- case 1186: /* ssbb */
- case 1185: /* dsb */
- value = 1185; /* --> dsb. */
- break;
- case 1198: /* cpp */
- case 1197: /* dvp */
- case 1196: /* cfp */
- case 1195: /* tlbi */
- case 1194: /* ic */
- case 1193: /* dc */
- case 1192: /* at */
- case 1191: /* sys */
- value = 1191; /* --> sys. */
- break;
- case 2007: /* bic */
- case 1257: /* and */
- value = 1257; /* --> and. */
+ case 1141: /* stsmaxh */
+ case 1069: /* ldsmaxh */
+ value = 1069; /* --> ldsmaxh. */
break;
- case 1240: /* mov */
- case 1259: /* and */
- value = 1259; /* --> and. */
+ case 1142: /* stsmax */
+ case 1070: /* ldsmax */
+ value = 1070; /* --> ldsmax. */
+ break;
+ case 1143: /* stsmaxlb */
+ case 1072: /* ldsmaxlb */
+ value = 1072; /* --> ldsmaxlb. */
+ break;
+ case 1144: /* stsmaxlh */
+ case 1075: /* ldsmaxlh */
+ value = 1075; /* --> ldsmaxlh. */
+ break;
+ case 1145: /* stsmaxl */
+ case 1078: /* ldsmaxl */
+ value = 1078; /* --> ldsmaxl. */
+ break;
+ case 1146: /* stsminb */
+ case 1080: /* ldsminb */
+ value = 1080; /* --> ldsminb. */
+ break;
+ case 1147: /* stsminh */
+ case 1081: /* ldsminh */
+ value = 1081; /* --> ldsminh. */
+ break;
+ case 1148: /* stsmin */
+ case 1082: /* ldsmin */
+ value = 1082; /* --> ldsmin. */
+ break;
+ case 1149: /* stsminlb */
+ case 1084: /* ldsminlb */
+ value = 1084; /* --> ldsminlb. */
+ break;
+ case 1150: /* stsminlh */
+ case 1087: /* ldsminlh */
+ value = 1087; /* --> ldsminlh. */
+ break;
+ case 1151: /* stsminl */
+ case 1090: /* ldsminl */
+ value = 1090; /* --> ldsminl. */
+ break;
+ case 1152: /* stumaxb */
+ case 1092: /* ldumaxb */
+ value = 1092; /* --> ldumaxb. */
+ break;
+ case 1153: /* stumaxh */
+ case 1093: /* ldumaxh */
+ value = 1093; /* --> ldumaxh. */
+ break;
+ case 1154: /* stumax */
+ case 1094: /* ldumax */
+ value = 1094; /* --> ldumax. */
+ break;
+ case 1155: /* stumaxlb */
+ case 1096: /* ldumaxlb */
+ value = 1096; /* --> ldumaxlb. */
+ break;
+ case 1156: /* stumaxlh */
+ case 1099: /* ldumaxlh */
+ value = 1099; /* --> ldumaxlh. */
+ break;
+ case 1157: /* stumaxl */
+ case 1102: /* ldumaxl */
+ value = 1102; /* --> ldumaxl. */
+ break;
+ case 1158: /* stuminb */
+ case 1104: /* lduminb */
+ value = 1104; /* --> lduminb. */
+ break;
+ case 1159: /* stuminh */
+ case 1105: /* lduminh */
+ value = 1105; /* --> lduminh. */
+ break;
+ case 1160: /* stumin */
+ case 1106: /* ldumin */
+ value = 1106; /* --> ldumin. */
+ break;
+ case 1161: /* stuminlb */
+ case 1108: /* lduminlb */
+ value = 1108; /* --> lduminlb. */
+ break;
+ case 1162: /* stuminlh */
+ case 1111: /* lduminlh */
+ value = 1111; /* --> lduminlh. */
+ break;
+ case 1163: /* stuminl */
+ case 1114: /* lduminl */
+ value = 1114; /* --> lduminl. */
+ break;
+ case 1165: /* mov */
+ case 1164: /* movn */
+ value = 1164; /* --> movn. */
+ break;
+ case 1167: /* mov */
+ case 1166: /* movz */
+ value = 1166; /* --> movz. */
+ break;
+ case 1213: /* autibsp */
+ case 1212: /* autibz */
+ case 1211: /* autiasp */
+ case 1210: /* autiaz */
+ case 1209: /* pacibsp */
+ case 1208: /* pacibz */
+ case 1207: /* paciasp */
+ case 1206: /* paciaz */
+ case 1187: /* psb */
+ case 1186: /* esb */
+ case 1185: /* autib1716 */
+ case 1184: /* autia1716 */
+ case 1183: /* pacib1716 */
+ case 1182: /* pacia1716 */
+ case 1181: /* xpaclri */
+ case 1180: /* sevl */
+ case 1179: /* sev */
+ case 1178: /* wfi */
+ case 1177: /* wfe */
+ case 1176: /* yield */
+ case 1175: /* bti */
+ case 1174: /* csdb */
+ case 1173: /* nop */
+ case 1172: /* hint */
+ value = 1172; /* --> hint. */
+ break;
+ case 1191: /* pssbb */
+ case 1190: /* ssbb */
+ case 1189: /* dsb */
+ value = 1189; /* --> dsb. */
+ break;
+ case 1202: /* cpp */
+ case 1201: /* dvp */
+ case 1200: /* cfp */
+ case 1199: /* tlbi */
+ case 1198: /* ic */
+ case 1197: /* dc */
+ case 1196: /* at */
+ case 1195: /* sys */
+ value = 1195; /* --> sys. */
+ break;
+ case 2011: /* bic */
+ case 1261: /* and */
+ value = 1261; /* --> and. */
+ break;
+ case 1244: /* mov */
+ case 1263: /* and */
+ value = 1263; /* --> and. */
+ break;
+ case 1248: /* movs */
+ case 1264: /* ands */
+ value = 1264; /* --> ands. */
+ break;
+ case 2012: /* cmple */
+ case 1299: /* cmpge */
+ value = 1299; /* --> cmpge. */
+ break;
+ case 2015: /* cmplt */
+ case 1302: /* cmpgt */
+ value = 1302; /* --> cmpgt. */
+ break;
+ case 2013: /* cmplo */
+ case 1304: /* cmphi */
+ value = 1304; /* --> cmphi. */
+ break;
+ case 2014: /* cmpls */
+ case 1307: /* cmphs */
+ value = 1307; /* --> cmphs. */
break;
- case 1244: /* movs */
- case 1260: /* ands */
- value = 1260; /* --> ands. */
+ case 1241: /* mov */
+ case 1329: /* cpy */
+ value = 1329; /* --> cpy. */
break;
- case 2008: /* cmple */
- case 1295: /* cmpge */
- value = 1295; /* --> cmpge. */
+ case 1243: /* mov */
+ case 1330: /* cpy */
+ value = 1330; /* --> cpy. */
break;
- case 2011: /* cmplt */
- case 1298: /* cmpgt */
- value = 1298; /* --> cmpgt. */
+ case 2022: /* fmov */
+ case 1246: /* mov */
+ case 1331: /* cpy */
+ value = 1331; /* --> cpy. */
break;
- case 2009: /* cmplo */
- case 1300: /* cmphi */
- value = 1300; /* --> cmphi. */
+ case 1236: /* mov */
+ case 1343: /* dup */
+ value = 1343; /* --> dup. */
break;
- case 2010: /* cmpls */
- case 1303: /* cmphs */
- value = 1303; /* --> cmphs. */
+ case 1238: /* mov */
+ case 1235: /* mov */
+ case 1344: /* dup */
+ value = 1344; /* --> dup. */
break;
- case 1237: /* mov */
- case 1325: /* cpy */
- value = 1325; /* --> cpy. */
+ case 2021: /* fmov */
+ case 1240: /* mov */
+ case 1345: /* dup */
+ value = 1345; /* --> dup. */
break;
case 1239: /* mov */
- case 1326: /* cpy */
- value = 1326; /* --> cpy. */
+ case 1346: /* dupm */
+ value = 1346; /* --> dupm. */
break;
- case 2018: /* fmov */
- case 1242: /* mov */
- case 1327: /* cpy */
- value = 1327; /* --> cpy. */
+ case 2016: /* eon */
+ case 1348: /* eor */
+ value = 1348; /* --> eor. */
break;
- case 1232: /* mov */
- case 1339: /* dup */
- value = 1339; /* --> dup. */
+ case 1249: /* not */
+ case 1350: /* eor */
+ value = 1350; /* --> eor. */
break;
- case 1234: /* mov */
- case 1231: /* mov */
- case 1340: /* dup */
- value = 1340; /* --> dup. */
- break;
- case 2017: /* fmov */
- case 1236: /* mov */
- case 1341: /* dup */
- value = 1341; /* --> dup. */
- break;
- case 1235: /* mov */
- case 1342: /* dupm */
- value = 1342; /* --> dupm. */
+ case 1250: /* nots */
+ case 1351: /* eors */
+ value = 1351; /* --> eors. */
break;
- case 2012: /* eon */
- case 1344: /* eor */
- value = 1344; /* --> eor. */
+ case 2017: /* facle */
+ case 1356: /* facge */
+ value = 1356; /* --> facge. */
break;
- case 1245: /* not */
- case 1346: /* eor */
- value = 1346; /* --> eor. */
+ case 2018: /* faclt */
+ case 1357: /* facgt */
+ value = 1357; /* --> facgt. */
break;
- case 1246: /* nots */
- case 1347: /* eors */
- value = 1347; /* --> eors. */
+ case 2019: /* fcmle */
+ case 1370: /* fcmge */
+ value = 1370; /* --> fcmge. */
break;
- case 2013: /* facle */
- case 1352: /* facge */
- value = 1352; /* --> facge. */
+ case 2020: /* fcmlt */
+ case 1372: /* fcmgt */
+ value = 1372; /* --> fcmgt. */
break;
- case 2014: /* faclt */
- case 1353: /* facgt */
- value = 1353; /* --> facgt. */
+ case 1233: /* fmov */
+ case 1378: /* fcpy */
+ value = 1378; /* --> fcpy. */
break;
- case 2015: /* fcmle */
- case 1366: /* fcmge */
- value = 1366; /* --> fcmge. */
+ case 1232: /* fmov */
+ case 1401: /* fdup */
+ value = 1401; /* --> fdup. */
break;
- case 2016: /* fcmlt */
- case 1368: /* fcmgt */
- value = 1368; /* --> fcmgt. */
- break;
- case 1229: /* fmov */
- case 1374: /* fcpy */
- value = 1374; /* --> fcpy. */
- break;
- case 1228: /* fmov */
- case 1397: /* fdup */
- value = 1397; /* --> fdup. */
- break;
- case 1230: /* mov */
- case 1728: /* orr */
- value = 1728; /* --> orr. */
+ case 1234: /* mov */
+ case 1732: /* orr */
+ value = 1732; /* --> orr. */
break;
- case 2019: /* orn */
- case 1729: /* orr */
- value = 1729; /* --> orr. */
+ case 2023: /* orn */
+ case 1733: /* orr */
+ value = 1733; /* --> orr. */
break;
- case 1233: /* mov */
- case 1731: /* orr */
- value = 1731; /* --> orr. */
+ case 1237: /* mov */
+ case 1735: /* orr */
+ value = 1735; /* --> orr. */
break;
- case 1243: /* movs */
- case 1732: /* orrs */
- value = 1732; /* --> orrs. */
+ case 1247: /* movs */
+ case 1736: /* orrs */
+ value = 1736; /* --> orrs. */
break;
- case 1238: /* mov */
- case 1794: /* sel */
- value = 1794; /* --> sel. */
+ case 1242: /* mov */
+ case 1798: /* sel */
+ value = 1798; /* --> sel. */
break;
- case 1241: /* mov */
- case 1795: /* sel */
- value = 1795; /* --> sel. */
+ case 1245: /* mov */
+ case 1799: /* sel */
+ value = 1799; /* --> sel. */
break;
default: return NULL;
}
@@ -623,8 +623,6 @@ aarch64_insert_operand (const aarch64_operand *self,
case 27:
case 28:
case 29:
- case 155:
- case 156:
case 157:
case 158:
case 159:
@@ -633,8 +631,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 162:
case 163:
case 164:
- case 177:
- case 178:
+ case 165:
+ case 166:
case 179:
case 180:
case 181:
@@ -642,8 +640,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 183:
case 184:
case 185:
- case 189:
- case 192:
+ case 186:
+ case 187:
+ case 191:
+ case 194:
return aarch64_ins_regno (self, info, code, inst, errors);
case 13:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -655,7 +655,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 31:
case 32:
case 33:
- case 194:
+ case 196:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 34:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -683,20 +683,22 @@ aarch64_insert_operand (const aarch64_operand *self,
case 62:
case 63:
case 64:
- case 76:
- case 77:
+ case 65:
+ case 66:
case 78:
case 79:
- case 152:
+ case 80:
+ case 81:
case 154:
- case 169:
- case 170:
+ case 156:
case 171:
case 172:
case 173:
case 174:
case 175:
case 176:
+ case 177:
+ case 178:
return aarch64_ins_imm (self, info, code, inst, errors);
case 42:
case 43:
@@ -706,80 +708,78 @@ aarch64_insert_operand (const aarch64_operand *self,
case 46:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
case 50:
- case 143:
+ case 145:
return aarch64_ins_fpimm (self, info, code, inst, errors);
- case 65:
- case 150:
+ case 67:
+ case 152:
return aarch64_ins_limm (self, info, code, inst, errors);
- case 66:
+ case 68:
return aarch64_ins_aimm (self, info, code, inst, errors);
- case 67:
+ case 69:
return aarch64_ins_imm_half (self, info, code, inst, errors);
- case 68:
- return aarch64_ins_fbits (self, info, code, inst, errors);
case 70:
- case 71:
- case 148:
- return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
+ return aarch64_ins_fbits (self, info, code, inst, errors);
case 72:
- case 147:
- return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
case 73:
+ case 150:
+ return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
case 74:
+ case 149:
+ return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
+ case 75:
+ case 76:
return aarch64_ins_cond (self, info, code, inst, errors);
- case 80:
- case 87:
- return aarch64_ins_addr_simple (self, info, code, inst, errors);
- case 81:
- return aarch64_ins_addr_regoff (self, info, code, inst, errors);
case 82:
+ case 89:
+ return aarch64_ins_addr_simple (self, info, code, inst, errors);
case 83:
+ return aarch64_ins_addr_regoff (self, info, code, inst, errors);
case 84:
- return aarch64_ins_addr_simm (self, info, code, inst, errors);
case 85:
- return aarch64_ins_addr_simm10 (self, info, code, inst, errors);
case 86:
- return aarch64_ins_addr_uimm12 (self, info, code, inst, errors);
+ return aarch64_ins_addr_simm (self, info, code, inst, errors);
+ case 87:
+ return aarch64_ins_addr_simm10 (self, info, code, inst, errors);
case 88:
- return aarch64_ins_addr_offset (self, info, code, inst, errors);
- case 89:
- return aarch64_ins_simd_addr_post (self, info, code, inst, errors);
+ return aarch64_ins_addr_uimm12 (self, info, code, inst, errors);
case 90:
- return aarch64_ins_sysreg (self, info, code, inst, errors);
+ return aarch64_ins_addr_offset (self, info, code, inst, errors);
case 91:
- return aarch64_ins_pstatefield (self, info, code, inst, errors);
+ return aarch64_ins_simd_addr_post (self, info, code, inst, errors);
case 92:
+ return aarch64_ins_sysreg (self, info, code, inst, errors);
case 93:
+ return aarch64_ins_pstatefield (self, info, code, inst, errors);
case 94:
case 95:
case 96:
- return aarch64_ins_sysins_op (self, info, code, inst, errors);
case 97:
case 98:
- return aarch64_ins_barrier (self, info, code, inst, errors);
+ return aarch64_ins_sysins_op (self, info, code, inst, errors);
case 99:
- return aarch64_ins_prfop (self, info, code, inst, errors);
case 100:
+ return aarch64_ins_barrier (self, info, code, inst, errors);
case 101:
- return aarch64_ins_hint (self, info, code, inst, errors);
+ return aarch64_ins_prfop (self, info, code, inst, errors);
case 102:
- return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
case 103:
+ return aarch64_ins_hint (self, info, code, inst, errors);
case 104:
+ return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
case 105:
case 106:
- return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 107:
- return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 108:
- return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 109:
+ return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 110:
+ return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
case 111:
case 112:
- return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 113:
case 114:
+ return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 115:
case 116:
case 117:
@@ -791,57 +791,59 @@ aarch64_insert_operand (const aarch64_operand *self,
case 123:
case 124:
case 125:
- return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 126:
case 127:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 128:
case 129:
case 130:
case 131:
case 132:
case 133:
- return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 134:
case 135:
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 136:
case 137:
- return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 138:
- return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 139:
- return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 140:
- return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 141:
- return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 142:
- return aarch64_ins_sve_asimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ case 143:
+ return aarch64_ins_sve_aimm (self, info, code, inst, errors);
case 144:
+ return aarch64_ins_sve_asimm (self, info, code, inst, errors);
+ case 146:
return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
- case 145:
+ case 147:
return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
- case 146:
+ case 148:
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
- case 149:
- return aarch64_ins_inv_limm (self, info, code, inst, errors);
case 151:
- return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
+ return aarch64_ins_inv_limm (self, info, code, inst, errors);
case 153:
+ return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
+ case 155:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 165:
- case 166:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 167:
case 168:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
+ case 169:
+ case 170:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 186:
- case 187:
case 188:
- return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 189:
case 190:
+ return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 192:
return aarch64_ins_sve_index (self, info, code, inst, errors);
- case 191:
case 193:
+ case 195:
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index b865d50..fc7ac88 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -381,6 +381,8 @@ aarch64_ins_imm (const aarch64_operand *self, const aarch64_opnd_info *info,
imm = info->imm.value;
if (operand_need_shift_by_two (self))
imm >>= 2;
+ if (operand_need_shift_by_four (self))
+ imm >>= 4;
insert_all_fields (self, code, imm);
return TRUE;
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 1ce1285..f3c5bea 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -40,7 +40,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0xxx0000xxxxxxxxxxxxxxxxxxxxxxxx
adr. */
- return 1165;
+ return 1169;
}
else
{
@@ -48,7 +48,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1xxx0000xxxxxxxxxxxxxxxxxxxxxxxx
adrp. */
- return 1166;
+ return 1170;
}
}
else
@@ -115,7 +115,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x000xxxxx0xxxxxxxxxxxxxxx
stxrb. */
- return 920;
+ return 924;
}
else
{
@@ -123,7 +123,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x000xxxxx0xxxxxxxxxxxxxxx
stxrh. */
- return 926;
+ return 930;
}
}
else
@@ -132,7 +132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x000xxxxx0xxxxxxxxxxxxxxx
stxr. */
- return 932;
+ return 936;
}
}
else
@@ -143,7 +143,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x00100x001xxxxx0xxxxxxxxxxxxxxx
casp. */
- return 1000;
+ return 1004;
}
else
{
@@ -151,7 +151,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x001xxxxx0xxxxxxxxxxxxxxx
stxp. */
- return 934;
+ return 938;
}
}
}
@@ -167,7 +167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x000xxxxx1xxxxxxxxxxxxxxx
stlxrb. */
- return 921;
+ return 925;
}
else
{
@@ -175,7 +175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x000xxxxx1xxxxxxxxxxxxxxx
stlxrh. */
- return 927;
+ return 931;
}
}
else
@@ -184,7 +184,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x000xxxxx1xxxxxxxxxxxxxxx
stlxr. */
- return 933;
+ return 937;
}
}
else
@@ -195,7 +195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x00100x001xxxxx1xxxxxxxxxxxxxxx
caspl. */
- return 1002;
+ return 1006;
}
else
{
@@ -203,7 +203,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x001xxxxx1xxxxxxxxxxxxxxx
stlxp. */
- return 935;
+ return 939;
}
}
}
@@ -214,7 +214,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx10100x00xxxxxxxxxxxxxxxxxxxxxx
stnp. */
- return 951;
+ return 955;
}
}
else
@@ -231,7 +231,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x00100x100xxxxx0xxxxxxxxxxxxxxx
stllrb. */
- return 949;
+ return 953;
}
else
{
@@ -239,7 +239,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x100xxxxx0xxxxxxxxxxxxxxx
stllr. */
- return 948;
+ return 952;
}
}
else
@@ -252,7 +252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x101xxxxx0xxxxxxxxxxxxxxx
casb. */
- return 988;
+ return 992;
}
else
{
@@ -260,7 +260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x101xxxxx0xxxxxxxxxxxxxxx
cash. */
- return 989;
+ return 993;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x101xxxxx0xxxxxxxxxxxxxxx
cas. */
- return 990;
+ return 994;
}
}
}
@@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x100xxxxx1xxxxxxxxxxxxxxx
stlrb. */
- return 924;
+ return 928;
}
else
{
@@ -293,7 +293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x100xxxxx1xxxxxxxxxxxxxxx
stlrh. */
- return 930;
+ return 934;
}
}
else
@@ -302,7 +302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x100xxxxx1xxxxxxxxxxxxxxx
stlr. */
- return 940;
+ return 944;
}
}
else
@@ -315,7 +315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x101xxxxx1xxxxxxxxxxxxxxx
caslb. */
- return 992;
+ return 996;
}
else
{
@@ -323,7 +323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x101xxxxx1xxxxxxxxxxxxxxx
caslh. */
- return 995;
+ return 999;
}
}
else
@@ -332,7 +332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x101xxxxx1xxxxxxxxxxxxxxx
casl. */
- return 998;
+ return 1002;
}
}
}
@@ -343,7 +343,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx10100x10xxxxxxxxxxxxxxxxxxxxxx
stp. */
- return 960;
+ return 964;
}
}
}
@@ -365,7 +365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x010xxxxx0xxxxxxxxxxxxxxx
ldxrb. */
- return 922;
+ return 926;
}
else
{
@@ -373,7 +373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x010xxxxx0xxxxxxxxxxxxxxx
ldxrh. */
- return 928;
+ return 932;
}
}
else
@@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x010xxxxx0xxxxxxxxxxxxxxx
ldxr. */
- return 936;
+ return 940;
}
}
else
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x00100x011xxxxx0xxxxxxxxxxxxxxx
caspa. */
- return 1001;
+ return 1005;
}
else
{
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x011xxxxx0xxxxxxxxxxxxxxx
ldxp. */
- return 938;
+ return 942;
}
}
}
@@ -417,7 +417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x010xxxxx1xxxxxxxxxxxxxxx
ldaxrb. */
- return 923;
+ return 927;
}
else
{
@@ -425,7 +425,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x010xxxxx1xxxxxxxxxxxxxxx
ldaxrh. */
- return 929;
+ return 933;
}
}
else
@@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x010xxxxx1xxxxxxxxxxxxxxx
ldaxr. */
- return 937;
+ return 941;
}
}
else
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x00100x011xxxxx1xxxxxxxxxxxxxxx
caspal. */
- return 1003;
+ return 1007;
}
else
{
@@ -453,7 +453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x011xxxxx1xxxxxxxxxxxxxxx
ldaxp. */
- return 939;
+ return 943;
}
}
}
@@ -466,7 +466,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x010100x01xxxxxxxxxxxxxxxxxxxxxx
ldnp. */
- return 952;
+ return 956;
}
else
{
@@ -474,7 +474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x110100x01xxxxxxxxxxxxxxxxxxxxxx
ldpsw. */
- return 959;
+ return 963;
}
}
}
@@ -494,7 +494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x110xxxxx0xxxxxxxxxxxxxxx
ldlarb. */
- return 946;
+ return 950;
}
else
{
@@ -502,7 +502,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x110xxxxx0xxxxxxxxxxxxxxx
ldlarh. */
- return 947;
+ return 951;
}
}
else
@@ -511,7 +511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x110xxxxx0xxxxxxxxxxxxxxx
ldlar. */
- return 945;
+ return 949;
}
}
else
@@ -524,7 +524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x111xxxxx0xxxxxxxxxxxxxxx
casab. */
- return 991;
+ return 995;
}
else
{
@@ -532,7 +532,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x111xxxxx0xxxxxxxxxxxxxxx
casah. */
- return 994;
+ return 998;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x111xxxxx0xxxxxxxxxxxxxxx
casa. */
- return 997;
+ return 1001;
}
}
}
@@ -557,7 +557,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x110xxxxx1xxxxxxxxxxxxxxx
ldarb. */
- return 925;
+ return 929;
}
else
{
@@ -565,7 +565,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x110xxxxx1xxxxxxxxxxxxxxx
ldarh. */
- return 931;
+ return 935;
}
}
else
@@ -574,7 +574,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x110xxxxx1xxxxxxxxxxxxxxx
ldar. */
- return 941;
+ return 945;
}
}
else
@@ -587,7 +587,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0000100x111xxxxx1xxxxxxxxxxxxxxx
casalb. */
- return 993;
+ return 997;
}
else
{
@@ -595,7 +595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0100100x111xxxxx1xxxxxxxxxxxxxxx
casalh. */
- return 996;
+ return 1000;
}
}
else
@@ -604,7 +604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x00100x111xxxxx1xxxxxxxxxxxxxxx
casal. */
- return 999;
+ return 1003;
}
}
}
@@ -617,7 +617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x010100x11xxxxxxxxxxxxxxxxxxxxxx
ldp. */
- return 961;
+ return 965;
}
else
{
@@ -625,7 +625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x110100x11xxxxxxxxxxxxxxxxxxxxxx
ldpsw. */
- return 964;
+ return 968;
}
}
}
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x011000xxxxxxxxxxxxxxxxxxxxxxxx
ldr. */
- return 965;
+ return 969;
}
else
{
@@ -653,7 +653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011000xxxxxxxxxxxxxxxxxxxxxxxx
ldrsw. */
- return 967;
+ return 971;
}
else
{
@@ -661,7 +661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011000xxxxxxxxxxxxxxxxxxxxxxxx
prfm. */
- return 968;
+ return 972;
}
}
}
@@ -685,7 +685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000000xxxxxxxxx00xxxxxxxxxx
sturb. */
- return 906;
+ return 910;
}
else
{
@@ -693,7 +693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000000xxxxxxxxx00xxxxxxxxxx
sturh. */
- return 911;
+ return 915;
}
}
else
@@ -702,7 +702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000000xxxxxxxxx00xxxxxxxxxx
stur. */
- return 914;
+ return 918;
}
}
else
@@ -715,7 +715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000010xxxxxxxxx00xxxxxxxxxx
ldurb. */
- return 907;
+ return 911;
}
else
{
@@ -723,7 +723,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000010xxxxxxxxx00xxxxxxxxxx
ldurh. */
- return 912;
+ return 916;
}
}
else
@@ -732,7 +732,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000010xxxxxxxxx00xxxxxxxxxx
ldur. */
- return 915;
+ return 919;
}
}
}
@@ -746,7 +746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001110001x0xxxxxxxxx00xxxxxxxxxx
ldursb. */
- return 908;
+ return 912;
}
else
{
@@ -754,7 +754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101110001x0xxxxxxxxx00xxxxxxxxxx
ldursw. */
- return 916;
+ return 920;
}
}
else
@@ -765,7 +765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011110001x0xxxxxxxxx00xxxxxxxxxx
ldursh. */
- return 913;
+ return 917;
}
else
{
@@ -773,7 +773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111110001x0xxxxxxxxx00xxxxxxxxxx
prfum. */
- return 917;
+ return 921;
}
}
}
@@ -800,7 +800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000001xxxxx000000xxxxxxxxxx
ldaddb. */
- return 1016;
+ return 1020;
}
else
{
@@ -808,7 +808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000001xxxxx000000xxxxxxxxxx
ldaddh. */
- return 1017;
+ return 1021;
}
}
else
@@ -817,7 +817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000001xxxxx000000xxxxxxxxxx
ldadd. */
- return 1018;
+ return 1022;
}
}
else
@@ -830,7 +830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000101xxxxx000000xxxxxxxxxx
ldaddab. */
- return 1019;
+ return 1023;
}
else
{
@@ -838,7 +838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000101xxxxx000000xxxxxxxxxx
ldaddah. */
- return 1022;
+ return 1026;
}
}
else
@@ -847,7 +847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000101xxxxx000000xxxxxxxxxx
ldadda. */
- return 1025;
+ return 1029;
}
}
}
@@ -863,7 +863,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000011xxxxx000000xxxxxxxxxx
ldaddlb. */
- return 1020;
+ return 1024;
}
else
{
@@ -871,7 +871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000011xxxxx000000xxxxxxxxxx
ldaddlh. */
- return 1023;
+ return 1027;
}
}
else
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000011xxxxx000000xxxxxxxxxx
ldaddl. */
- return 1026;
+ return 1030;
}
}
else
@@ -893,7 +893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000111xxxxx000000xxxxxxxxxx
ldaddalb. */
- return 1021;
+ return 1025;
}
else
{
@@ -901,7 +901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000111xxxxx000000xxxxxxxxxx
ldaddalh. */
- return 1024;
+ return 1028;
}
}
else
@@ -910,7 +910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000111xxxxx000000xxxxxxxxxx
ldaddal. */
- return 1027;
+ return 1031;
}
}
}
@@ -929,7 +929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000001xxxxx100000xxxxxxxxxx
swpb. */
- return 1004;
+ return 1008;
}
else
{
@@ -937,7 +937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000001xxxxx100000xxxxxxxxxx
swph. */
- return 1005;
+ return 1009;
}
}
else
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000001xxxxx100000xxxxxxxxxx
swp. */
- return 1006;
+ return 1010;
}
}
else
@@ -959,7 +959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000101xxxxx100000xxxxxxxxxx
swpab. */
- return 1007;
+ return 1011;
}
else
{
@@ -967,7 +967,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000101xxxxx100000xxxxxxxxxx
swpah. */
- return 1010;
+ return 1014;
}
}
else
@@ -976,7 +976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000101xxxxx100000xxxxxxxxxx
swpa. */
- return 1013;
+ return 1017;
}
}
}
@@ -992,7 +992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000011xxxxx100000xxxxxxxxxx
swplb. */
- return 1008;
+ return 1012;
}
else
{
@@ -1000,7 +1000,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000011xxxxx100000xxxxxxxxxx
swplh. */
- return 1011;
+ return 1015;
}
}
else
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000011xxxxx100000xxxxxxxxxx
swpl. */
- return 1014;
+ return 1018;
}
}
else
@@ -1022,7 +1022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000111xxxxx100000xxxxxxxxxx
swpalb. */
- return 1009;
+ return 1013;
}
else
{
@@ -1030,7 +1030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000111xxxxx100000xxxxxxxxxx
swpalh. */
- return 1012;
+ return 1016;
}
}
else
@@ -1039,7 +1039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000111xxxxx100000xxxxxxxxxx
swpal. */
- return 1015;
+ return 1019;
}
}
}
@@ -1061,7 +1061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000001xxxxx010000xxxxxxxxxx
ldsmaxb. */
- return 1064;
+ return 1068;
}
else
{
@@ -1069,7 +1069,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01111000001xxxxx010000xxxxxxxxxx
ldsmaxh. */
- return 1065;
+ return 1069;
}
}
else
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x111000001xxxxx010000xxxxxxxxxx
ldsmax. */
- return 1066;
+ return 1070;
}
}
else
@@ -1091,7 +1091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00111000101xxxxx010000xxxxxxxxxx
ldsmaxab. */
- return 1067;
+ return 1071;
}
else
{
@@ -1099,7 +1099,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
[...]
[diff truncated at 100000 bytes]
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