[PATCH 0/4] Add support for Synopsys ARC processors

[Anton Kolesov <Anton dot Kolesov at synopsys dot com>]

Hi,

ARC is a family of 32-bit RISC cores developed by Synopsys for embedded
applications - both baremetal and Linux.

This patch series adds to newlib and libgloss support for two modern cores: ARC
HS and ARC EM; and of older but still relevant ARC 700 and ARC 600.  ARC cores
are configurable, therefore cores of same model can have significant difference
in terms of instructions available. For this reason most of string/memory
functions in assembly have several implementations - for basic core, for core
with barrel shifter and for core with "norm" instruction.  ARC HS has a few
specific implementations because it might have optional 64-bit load/stores
operations and has a longer pipeline.

ARC support has been recently submitted to Binutils. GCC already supports older
cores. The rest of GNU toolchain can be found at GitHub:

https://github.com/foss-for-synopsys-dwc-arc-processors

In libgloss a support for proprietary nSIM simulator is being added, free
version of nSIM can be downloaded from

https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi

Same libgloss library is also compatible with a version of CGEN simulator
found on our GitHub, but this simulator supports only older ARC 600 and 700
cores.

There are already some very old traces of ARC in newlib/libc/sys - those are
deleted in this patch series, because there are no corresponding files in
newlib/libc/machine, so it doesn't look like they can be used by anyone.

Anton Kolesov (4):
  Remove obsolete ARC system
  Add support for ARC to libgloss
  Add support for ARC to newlib
  Add Synopsys license for newlib and libgloss

--
Regards,
Anton Kolesov