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Hi,
This patch is used to support the function __aeabi_memset and __aeabi_memclr
for the arm backend in newlib (This patch is similar with the
__aeabi_memmove patch.).
According to the run-time ABI for ARM architecture, this function is allowed
to corrupt only the integer core registers permitted to be corrupted by the
[AAPCS] (r0-r3, ip, lr, and CPSR). So we can't just simply use the
memset()(in the string library in newlib) to implement this function.
This patch divides this issue into two cases:
1. For the targets with FP registers, implemment this function by assembly
code. The assembly code is generated by compile the source code of memset()
with the option '-mfloat-abi=soft' which means no FP registers will be used.
The versions for thumb mode, thumb2 mode and arm mode are all supported.
2. For the targets without FP registers, call memset() to implement this
function.
The memclr functions simplify a very common special case of memset, namely
the one in which c = 0 and the memory is being cleared to all zeroes.
Newlib build passed. The function aeabi_memset() and aeabi_memclr() can link
correctly with different arm targets.
Make check passed for arm mode, thumb mode and thumb2 mode.
Is it OK?
Thanks,
Hale
newlib/ChangeLog:
2015-02-05 Hale Wang <hale.wang@arm.com>
* libc/machine/arm/aeabi_memclr.c: New file to support
aeabi_memclr.
* libc/machine/arm/aeabi_memset.c: New file to support
aeabi_memset.
* libc/machine/arm/aeabi_memset-soft.S: Ditto.
* libc/machine/arm/aeabi_memset-arm.S: Ditto.
* libc/machine/arm/aeabi_memset-thumb.S: Ditto.
* libc/machine/arm/aeabi_memset-thumb2.S: Ditto.
* libc/machine/arm/Makefile.am: Add dependencies.
* libc/machine/arm/Makefile.in: Regenerated.
diff --git a/newlib/libc/machine/arm/Makefile.am
b/newlib/libc/machine/arm/Makefile.am
index dc17690..d9b50a9 100644
--- a/newlib/libc/machine/arm/Makefile.am
+++ b/newlib/libc/machine/arm/Makefile.am
@@ -49,7 +49,8 @@ endif !OPT_SIZE
lib_a_SOURCES = setjmp.S access.c strcmp.S strcpy.c \
$(MEMCPY_SRC) $(MEMCHR_SRC) $(STRLEN_SRC) \
- strlen-armv7.S aeabi_memcpy.c aeabi_memcpy-armv7a.S
+ strlen-armv7.S aeabi_memcpy.c aeabi_memcpy-armv7a.S \
+ aeabi_memset.c aeabi_memset-soft.S aeabi_memclr.c
lib_a_CCASFLAGS=$(AM_CCASFLAGS)
lib_a_CFLAGS = $(AM_CFLAGS)
@@ -62,6 +63,8 @@ CONFIG_STATUS_DEPENDENCIES =
$(newlib_basedir)/configure.host
MEMCPY_DEP=memcpy-armv7a.S memcpy-armv7m.S
STRCMP_DEP=strcmp-arm-tiny.S strcmp-armv4.S strcmp-armv4t.S strcmp-armv6.S
\
strcmp-armv6m.S strcmp-armv7.S strcmp-armv7m.S
+AEABI_MEMSET_DEP=aeabi_memset-thumb.S aeabi_memset-thumb2.S \
+ aeabi_memset-arm.S
$(lpfx)memcpy.o: $(MEMCPY_DEP)
@@ -70,3 +73,7 @@ $(lpfx)memcpy.obj: $(MEMCPY_DEP)
$(lpfx)strcmp.o: $(STRCMP_DEP)
$(lpfx)strcmp.obj: $(STRCMP_DEP)
+
+$(lpfx)aeabi_memset.o: $(AEABI_MEMSET_DEP)
+
+$(lpfx)aeabi_memset.obj: $(AEABI_MEMSET_DEP)
diff --git a/newlib/libc/machine/arm/Makefile.in
b/newlib/libc/machine/arm/Makefile.in
index db65405..99c3781 100644
--- a/newlib/libc/machine/arm/Makefile.in
+++ b/newlib/libc/machine/arm/Makefile.in
@@ -85,7 +85,9 @@ am_lib_a_OBJECTS = lib_a-setjmp.$(OBJEXT)
lib_a-access.$(OBJEXT) \
lib_a-strcmp.$(OBJEXT) lib_a-strcpy.$(OBJEXT) $(am__objects_1) \
$(am__objects_2) $(am__objects_3) lib_a-strlen-armv7.$(OBJEXT) \
lib_a-aeabi_memcpy.$(OBJEXT) \
- lib_a-aeabi_memcpy-armv7a.$(OBJEXT)
+ lib_a-aeabi_memcpy-armv7a.$(OBJEXT) \
+ lib_a-aeabi_memset.$(OBJEXT) lib_a-aeabi_memset-soft.$(OBJEXT) \
+ lib_a-aeabi_memclr.$(OBJEXT)
lib_a_OBJECTS = $(am_lib_a_OBJECTS)
DEFAULT_INCLUDES = -I.@am__isrc@
depcomp =
@@ -232,7 +234,8 @@ noinst_LIBRARIES = lib.a
@OPT_SIZE_TRUE@MEMCPY_OBJ =
lib_a_SOURCES = setjmp.S access.c strcmp.S strcpy.c \
$(MEMCPY_SRC) $(MEMCHR_SRC) $(STRLEN_SRC) \
- strlen-armv7.S aeabi_memcpy.c aeabi_memcpy-armv7a.S
+ strlen-armv7.S aeabi_memcpy.c aeabi_memcpy-armv7a.S \
+ aeabi_memset.c aeabi_memset-soft.S aeabi_memclr.c
lib_a_CCASFLAGS = $(AM_CCASFLAGS)
lib_a_CFLAGS = $(AM_CFLAGS)
@@ -244,6 +247,9 @@ MEMCPY_DEP = memcpy-armv7a.S memcpy-armv7m.S
STRCMP_DEP = strcmp-arm-tiny.S strcmp-armv4.S strcmp-armv4t.S
strcmp-armv6.S \
strcmp-armv6m.S strcmp-armv7.S strcmp-armv7m.S
+AEABI_MEMSET_DEP = aeabi_memset-thumb.S aeabi_memset-thumb2.S \
+ aeabi_memset-arm.S
+
all: all-am
.SUFFIXES:
@@ -338,6 +344,12 @@ lib_a-aeabi_memcpy-armv7a.o: aeabi_memcpy-armv7a.S
lib_a-aeabi_memcpy-armv7a.obj: aeabi_memcpy-armv7a.S
$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS)
$(CPPFLAGS) $(lib_a_CCASFLAGS) $(CCASFLAGS) -c -o
lib_a-aeabi_memcpy-armv7a.obj `if test -f 'aeabi_memcpy-armv7a.S'; then
$(CYGPATH_W) 'aeabi_memcpy-armv7a.S'; else $(CYGPATH_W)
'$(srcdir)/aeabi_memcpy-armv7a.S'; fi`
+lib_a-aeabi_memset-soft.o: aeabi_memset-soft.S
+ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS)
$(CPPFLAGS) $(lib_a_CCASFLAGS) $(CCASFLAGS) -c -o lib_a-aeabi_memset-soft.o
`test -f 'aeabi_memset-soft.S' || echo '$(srcdir)/'`aeabi_memset-soft.S
+
+lib_a-aeabi_memset-soft.obj: aeabi_memset-soft.S
+ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS)
$(CPPFLAGS) $(lib_a_CCASFLAGS) $(CCASFLAGS) -c -o
lib_a-aeabi_memset-soft.obj `if test -f 'aeabi_memset-soft.S'; then
$(CYGPATH_W) 'aeabi_memset-soft.S'; else $(CYGPATH_W)
'$(srcdir)/aeabi_memset-soft.S'; fi`
+
.c.o:
$(COMPILE) -c $<
@@ -368,6 +380,18 @@ lib_a-aeabi_memcpy.o: aeabi_memcpy.c
lib_a-aeabi_memcpy.obj: aeabi_memcpy.c
$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS)
$(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-aeabi_memcpy.obj `if test
-f 'aeabi_memcpy.c'; then $(CYGPATH_W) 'aeabi_memcpy.c'; else $(CYGPATH_W)
'$(srcdir)/aeabi_memcpy.c'; fi`
+lib_a-aeabi_memset.o: aeabi_memset.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS)
$(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-aeabi_memset.o `test -f
'aeabi_memset.c' || echo '$(srcdir)/'`aeabi_memset.c
+
+lib_a-aeabi_memset.obj: aeabi_memset.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS)
$(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-aeabi_memset.obj `if test
-f 'aeabi_memset.c'; then $(CYGPATH_W) 'aeabi_memset.c'; else $(CYGPATH_W)
'$(srcdir)/aeabi_memset.c'; fi`
+
+lib_a-aeabi_memclr.o: aeabi_memclr.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS)
$(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-aeabi_memclr.o `test -f
'aeabi_memclr.c' || echo '$(srcdir)/'`aeabi_memclr.c
+
+lib_a-aeabi_memclr.obj: aeabi_memclr.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS)
$(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-aeabi_memclr.obj `if test
-f 'aeabi_memclr.c'; then $(CYGPATH_W) 'aeabi_memclr.c'; else $(CYGPATH_W)
'$(srcdir)/aeabi_memclr.c'; fi`
+
ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
unique=`for i in $$list; do \
@@ -547,6 +571,10 @@ $(lpfx)strcmp.o: $(STRCMP_DEP)
$(lpfx)strcmp.obj: $(STRCMP_DEP)
+$(lpfx)aeabi_memset.o: $(AEABI_MEMSET_DEP)
+
+$(lpfx)aeabi_memset.obj: $(AEABI_MEMSET_DEP)
+
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:
diff --git a/newlib/libc/machine/arm/aeabi_memclr.c
b/newlib/libc/machine/arm/aeabi_memclr.c
new file mode 100644
index 0000000..6da9135
--- /dev/null
+++ b/newlib/libc/machine/arm/aeabi_memclr.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2015 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR
IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <_ansi.h>
+
+/* Support the alias for the __aeabi_memclr which may
+ assume memory alignment. */
+void __aeabi_memclr4 (void *dest, size_t n)
+ _ATTRIBUTE ((alias ("__aeabi_memclr")));
+
+void __aeabi_memclr8 (void *dest, size_t n)
+ _ATTRIBUTE ((alias ("__aeabi_memclr")));
+
+/* Support the routine __aeabi_memclr. */
+void __aeabi_memclr (void *dest, size_t n)
+{
+ extern void __aeabi_memset (void *dest, size_t n, int c);
+ __aeabi_memset (dest, n, 0);
+}
diff --git a/newlib/libc/machine/arm/aeabi_memset-arm.S
b/newlib/libc/machine/arm/aeabi_memset-arm.S
new file mode 100644
index 0000000..4993e9a
--- /dev/null
+++ b/newlib/libc/machine/arm/aeabi_memset-arm.S
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2015 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR
IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ .arm
+ .syntax divided
+ .global __aeabi_memset
+ .type __aeabi_memset, %function
+ ASM_ALIAS __aeabi_memset4 __aeabi_memset
+ ASM_ALIAS __aeabi_memset8 __aeabi_memset
+__aeabi_memset:
+ .cfi_startproc
+ tst r0, #3
+ stmfd sp!, {r4, r5, lr}
+ beq .L14
+ cmp r1, #0
+ sub r1, r1, #1
+ ldmeqfd sp!, {r4, r5, pc}
+ uxtb lr, r2
+ mov r3, r0
+ b .L4
+.L6:
+ cmp r1, #0
+ mov r1, ip
+ ldmeqfd sp!, {r4, r5, pc}
+.L4:
+ strb lr, [r3], #1
+ tst r3, #3
+ sub ip, r1, #1
+ bne .L6
+.L2:
+ cmp r1, #3
+ bls .L11
+ uxtb lr, r2
+ cmp r1, #15
+ orr lr, lr, lr, asl #8
+ orr lr, lr, lr, asl #16
+ bls .L15
+ sub r4, r1, #16
+ add ip, r3, #16
+ mov r4, r4, lsr #4
+ add r5, r4, #2
+ add r5, r3, r5, lsl #4
+.L10:
+ str lr, [ip, #-16]
+ add ip, ip, #16
+ str lr, [ip, #-28]
+ str lr, [ip, #-24]
+ str lr, [ip, #-20]
+ cmp ip, r5
+ bne .L10
+ and r1, r1, #15
+ add ip, r4, #1
+ cmp r1, #3
+ add ip, r3, ip, lsl #4
+ bls .L28
+.L9:
+ sub r3, r1, #4
+ bic r3, r3, #3
+ add r3, r3, #4
+ add r3, ip, r3
+.L12:
+ str lr, [ip], #4
+ cmp r3, ip
+ bne .L12
+ and r1, r1, #3
+.L11:
+ cmp r1, #0
+ uxtbne r2, r2
+ addne r1, r3, r1
+ beq .L29
+.L13:
+ strb r2, [r3], #1
+ cmp r3, r1
+ bne .L13
+ ldmfd sp!, {r4, r5, pc}
+.L29:
+ ldmfd sp!, {r4, r5, pc}
+.L14:
+ mov r3, r0
+ b .L2
+.L15:
+ mov ip, r3
+ b .L9
+.L28:
+ mov r3, ip
+ b .L11
+ .cfi_endproc
+ .size __aeabi_memset, . - __aeabi_memset
diff --git a/newlib/libc/machine/arm/aeabi_memset-soft.S
b/newlib/libc/machine/arm/aeabi_memset-soft.S
new file mode 100644
index 0000000..d82fb56
--- /dev/null
+++ b/newlib/libc/machine/arm/aeabi_memset-soft.S
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2015 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR
IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "arm_asm.h"
+
+.macro ASM_ALIAS new old
+ .global \new
+ .type \new, %function
+#if defined (__thumb__)
+ .thumb_set \new, \old
+#else
+ .set \new, \old
+#endif
+.endm
+
+/* NOTE: This ifdef MUST match the one in aeabi_memset.c. */
+#if !defined (__SOFTFP__)
+
+# if defined (__thumb2__)
+# include "aeabi_memset-thumb2.S"
+# elif defined (__thumb__)
+# include "aeabi_memset-thumb.S"
+# else
+# include "aeabi_memset-arm.S"
+# endif
+
+#endif
diff --git a/newlib/libc/machine/arm/aeabi_memset-thumb.S
b/newlib/libc/machine/arm/aeabi_memset-thumb.S
new file mode 100644
index 0000000..5a4b808
--- /dev/null
+++ b/newlib/libc/machine/arm/aeabi_memset-thumb.S
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2015 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR
IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ .thumb
+ .syntax unified
+ .global __aeabi_memset
+ .type __aeabi_memset, %function
+ ASM_ALIAS __aeabi_memset4 __aeabi_memset
+ ASM_ALIAS __aeabi_memset8 __aeabi_memset
+__aeabi_memset:
+ .cfi_startproc
+ push {r4, r5, r6, lr}
+ lsls r3, r0, #30
+ beq .L14
+ subs r4, r1, #1
+ cmp r1, #0
+ beq .L16
+ uxtb r6, r2
+ movs r3, r0
+ movs r5, #3
+ b .L4
+.L6:
+ subs r1, r4, #1
+ cmp r4, #0
+ beq .L16
+ movs r4, r1
+.L4:
+ adds r3, r3, #1
+ subs r1, r3, #1
+ strb r6, [r1]
+ tst r3, r5
+ bne .L6
+.L2:
+ cmp r4, #3
+ bls .L11
+ movs r5, #255
+ ands r5, r2
+ lsls r1, r5, #8
+ orrs r5, r1
+ lsls r1, r5, #16
+ orrs r5, r1
+ cmp r4, #15
+ bls .L9
+ movs r6, r4
+ subs r6, r6, #16
+ lsrs r6, r6, #4
+ adds r6, r6, #1
+ lsls r6, r6, #4
+ movs r1, r3
+ adds r3, r3, r6
+.L10:
+ str r5, [r1]
+ str r5, [r1, #4]
+ str r5, [r1, #8]
+ str r5, [r1, #12]
+ adds r1, r1, #16
+ cmp r3, r1
+ bne .L10
+ movs r1, #15
+ ands r4, r1
+ cmp r4, #3
+ bls .L11
+.L9:
+ subs r6, r4, #4
+ lsrs r6, r6, #2
+ adds r6, r6, #1
+ lsls r6, r6, #2
+ movs r1, r3
+ adds r3, r3, r6
+.L12:
+ stmia r1!, {r5}
+ cmp r3, r1
+ bne .L12
+ movs r1, #3
+ ands r4, r1
+.L11:
+ cmp r4, #0
+ beq .L16
+ uxtb r2, r2
+ adds r4, r3, r4
+.L13:
+ strb r2, [r3]
+ adds r3, r3, #1
+ cmp r4, r3
+ bne .L13
+.L16:
+ pop {r4, r5, r6, pc}
+.L14:
+ movs r4, r1
+ movs r3, r0
+ b .L2
+ .cfi_endproc
+ .size __aeabi_memset, . - __aeabi_memset
diff --git a/newlib/libc/machine/arm/aeabi_memset-thumb2.S
b/newlib/libc/machine/arm/aeabi_memset-thumb2.S
new file mode 100644
index 0000000..cb78f87
--- /dev/null
+++ b/newlib/libc/machine/arm/aeabi_memset-thumb2.S
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2015 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR
IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ .thumb
+ .syntax unified
+ .global __aeabi_memset
+ .type __aeabi_memset, %function
+ ASM_ALIAS __aeabi_memset4 __aeabi_memset
+ ASM_ALIAS __aeabi_memset8 __aeabi_memset
+__aeabi_memset:
+ .cfi_startproc
+ push {r4, r5, r6}
+ lsls r4, r0, #30
+ beq .L14
+ subs r4, r1, #1
+ cmp r1, #0
+ beq .L16
+ uxtb r5, r2
+ mov r3, r0
+ b .L4
+.L6:
+ subs r1, r4, #1
+ cbz r4, .L16
+ mov r4, r1
+.L4:
+ strb r5, [r3], #1
+ lsls r1, r3, #30
+ bne .L6
+.L2:
+ cmp r4, #3
+ bls .L11
+ uxtb r5, r2
+ orr r5, r5, r5, lsl #8
+ cmp r4, #15
+ orr r5, r5, r5, lsl #16
+ bls .L9
+ add r1, r3, #16
+ mov r6, r4
+.L10:
+ subs r6, r6, #16
+ cmp r6, #15
+ str r5, [r1, #-16]
+ str r5, [r1, #-12]
+ str r5, [r1, #-8]
+ str r5, [r1, #-4]
+ add r1, r1, #16
+ bhi .L10
+ sub r1, r4, #16
+ bic r1, r1, #15
+ and r4, r4, #15
+ adds r1, r1, #16
+ cmp r4, #3
+ add r3, r3, r1
+ bls .L11
+.L9:
+ mov r6, r3
+ mov r1, r4
+.L12:
+ subs r1, r1, #4
+ cmp r1, #3
+ str r5, [r6], #4
+ bhi .L12
+ subs r1, r4, #4
+ bic r1, r1, #3
+ adds r1, r1, #4
+ add r3, r3, r1
+ and r4, r4, #3
+.L11:
+ cbz r4, .L16
+ uxtb r2, r2
+ add r4, r4, r3
+.L13:
+ strb r2, [r3], #1
+ cmp r3, r4
+ bne .L13
+.L16:
+ pop {r4, r5, r6}
+ bx lr
+.L14:
+ mov r4, r1
+ mov r3, r0
+ b .L2
+ .cfi_endproc
+ .size __aeabi_memset, . - __aeabi_memset
diff --git a/newlib/libc/machine/arm/aeabi_memset.c
b/newlib/libc/machine/arm/aeabi_memset.c
new file mode 100644
index 0000000..8a97320
--- /dev/null
+++ b/newlib/libc/machine/arm/aeabi_memset.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2015 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR
IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <_ansi.h>
+
+/* According to the run-time ABI for the ARM Architecture, this
+ function is allowed to corrupt only the integer core register
+ permitted to be corrupted by the [AAPCS] (r0-r3, ip, lr, and
+ CPSR).
+
+ Therefore, we can't just simply use alias to support the function
+ aeabi_memset for the targets with FP register. Instead, versions
+ for these specific targets are written in assembler (in
+ aeabi_memset-soft.S). */
+
+/* NOTE: This ifdef MUST match the one in aeabi_memset-soft.S. */
+#if !defined (__SOFTFP__)
+
+/* Defined in aeabi_memset-soft.S. */
+
+#else
+/* Support the alias for the __aeabi_memset which may
+ assume memory alignment. */
+void __aeabi_memset4 (void *dest, size_t n, int c)
+ _ATTRIBUTE ((alias ("__aeabi_memset")));
+
+void __aeabi_memset8 (void *dest, size_t n, int c)
+ _ATTRIBUTE ((alias ("__aeabi_memset")));
+
+/* Support the routine __aeabi_memset. Can't alias to memset
+ because it's not defined in the same translation unit. */
+void __aeabi_memset (void *dest, size_t n, int c)
+{
+ /*Note that relative to ANSI memset, __aeabi_memset hase the order
+ of its second and third arguments reversed. */
+ extern void memset (void *dest, int c, size_t n);
+ memset (dest, c, n);
+}
+#endifAttachment:
aeabi_memset.patch-3
Description: Binary data
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