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[PATCH][AArch64] [AArch64][libgloss] Clear WXN bit from SCTLR_EL3 when initialising page tables

Hi all,

In ARMv8 cores on reset the WXN bit from SCTLR_EL3 can be set by the core (the architecture says that on reset it's UNKNOWN, so the core can do whatever it wants). If we don't clear it all memory regions with write permissions will be marked as non-executable, potentially causing a permission fault in the startup code.

This patch clears that bit and adds a dsb to ensure that everything is committed properly.

Tested aarch64-none-elf on a model with no problems.

Ok to go in?


P.S. If this is approved can somebody please commit it for me?

2014-01-24  Kyrylo Tkachov  <>

    * aarch64/cpu-init/rdimon-aem-el3.S (flat_map): Clear WXN bit
    in SCTLR_EL3. Add dsb.
diff --git a/libgloss/aarch64/cpu-init/rdimon-aem-el3.S b/libgloss/aarch64/cpu-init/rdimon-aem-el3.S
index 6ddf623..4637627 100644
--- a/libgloss/aarch64/cpu-init/rdimon-aem-el3.S
+++ b/libgloss/aarch64/cpu-init/rdimon-aem-el3.S
@@ -138,9 +138,12 @@ _flat_map:
 	mrs	x0, sctlr_el3
 	ldr	x1, =0x100d			/* bits I(12) SA(3) C(2) M(0) */
-	bic	x0, x0, #2			/* clear bit A(1) */
+	bic	x0, x0, #(1 << 1)		/* clear bit A(1) */
+	mov	x2, #(1 << 19)			/* clear WXN */
+	bic	x0, x0, x2
 	orr	x0, x0, x1			/* set bits */
+	dsb	sy
 	msr	sctlr_el3, x0

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