This is the mail archive of the
libc-alpha@sourceware.org
mailing list for the glibc project.
Re: [PATCH 20/28] powerpc: Refactor powerpc64 lround/lroundf/llround/llroundf
- From: "Gabriel F. T. Gomes" <gabriel at inconstante dot eti dot br>
- To: Adhemerval Zanella <adhemerval dot zanella at linaro dot org>
- Cc: <libc-alpha at sourceware dot org>
- Date: Thu, 13 Jun 2019 16:30:29 -0300
- Subject: Re: [PATCH 20/28] powerpc: Refactor powerpc64 lround/lroundf/llround/llroundf
- References: <20190329133529.22523-1-adhemerval.zanella@linaro.org> <20190329133529.22523-21-adhemerval.zanella@linaro.org>
I found just a small problem in this patch (see below).
On Fri, Mar 29 2019, Adhemerval Zanella wrote:
>
> The IFUNC support is also moved only to powerpc64 only, since for
> powerpc64le generic implementation resulting in optimized code.
Thanks, again.
For reference, again, a powerpc64 build produces:
000000000007e6c0 <.__llround_power8>:
7e6c0: fc 20 0b 10 frin f1,f1
7e6c4: fc 00 0e 5e fctidz f0,f1
7e6c8: 7c 03 00 66 mfvsrd r3,vs0
7e6cc: 4e 80 00 20 blr
000000000007e6e0 <.__llround_power6x>:
7e6e0: fc 20 0b 10 frin f1,f1
7e6e4: fc 00 0e 5e fctidz f0,f1
7e6e8: 7c 60 05 be mftgpr r3,f0
7e6ec: 4e 80 00 20 blr
000000000007e700 <.__llround_power5plus>:
7e700: fc 20 0b 10 frin f1,f1
7e704: fc 00 0e 5e fctidz f0,f1
7e708: d8 01 ff f8 stfd f0,-8(r1)
7e70c: 60 00 00 00 nop
7e710: e8 61 ff f8 ld r3,-8(r1)
7e714: 4e 80 00 20 blr
000000000007e730 <.__llround_ppc64>:
7e730: 3d 22 ff fa addis r9,r2,-6
7e734: fc 00 0a 10 fabs f0,f1
7e738: 38 60 00 00 li r3,0
7e73c: c1 89 a1 f4 lfs f12,-24076(r9)
7e740: fc 00 60 00 fcmpu cr0,f0,f12
7e744: 4d 80 00 20 bltlr
7e748: 3d 22 ff fa addis r9,r2,-6
7e74c: c1 49 6a 04 lfs f10,27140(r9)
7e750: fc 00 50 00 fcmpu cr0,f0,f10
7e754: 40 80 00 2c bge 7e780 <.__llround_ppc64+0x50>
7e758: fd 60 50 2a fadd f11,f0,f10
7e75c: fd 6b 50 28 fsub f11,f11,f10
7e760: fc 00 58 00 fcmpu cr0,f0,f11
7e764: 41 82 00 1c beq 7e780 <.__llround_ppc64+0x50>
7e768: 3d 22 ff fa addis r9,r2,-6
7e76c: fc 00 60 2a fadd f0,f0,f12
7e770: c1 69 9c e0 lfs f11,-25376(r9)
7e774: fc 01 58 00 fcmpu cr0,f1,f11
7e778: 41 80 00 28 blt 7e7a0 <.__llround_ppc64+0x70>
7e77c: fc 20 00 90 fmr f1,f0
7e780: fc 20 0e 5e fctidz f1,f1
7e784: d8 21 ff f8 stfd f1,-8(r1)
7e788: 60 00 00 00 nop
7e78c: 60 00 00 00 nop
7e790: 60 00 00 00 nop
7e794: e8 61 ff f8 ld r3,-8(r1)
7e798: 4e 80 00 20 blr
> --- a/sysdeps/powerpc/powerpc64/be/fpu/multiarch/Makefile
> +++ b/sysdeps/powerpc/powerpc64/be/fpu/multiarch/Makefile
>
> [...]
> CFLAGS-s_roundf-power5+.c = -mcpu=power5+
> CFLAGS-s_trunc-power5+.c = -mcpu=power5+
> CFLAGS-s_truncf-power5+.c = -mcpu=power5+
> -CFLAGS-s_llrint-power8.c += -mcpu=power8
> -CFLAGS-s_llrint-power6x.c += -mcpu=power6x
> +CFLAGS-s_llround-power8.c += -mcpu=power8
> +CFLAGS-s_llround-power6x.c += -mcpu=power6x
> +CFLAGS-s_llround-power5+.c += -mcpu=power5+
> endif
The removal of the two lines above is likely unintentional and wrong.
Looks good to me with that fixed. Thanks.
Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>