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Re: [PATCH] x86: Add --enable-rdtscp-in-benchtests

On Mon, 22 Oct 2018, H.J. Lu wrote:

> RDTSCP waits until all previous instructions have executed and all
> previous loads are globally visible before reading the counter.  RDTSC
> doesn't wait until all previous instructions have been executed before
> reading the counter.  This patch adds --enable-rdtscp-in-benchtests to
> use RDTSCP in benchtests.
> NOTE: Benchtests in RDTSCP-enabled glibc require CPUs capable of RDTSCP
> instruction.  All x86 processors since 2010 support RDTSCP instruction.

Without implying an objection to the patch, I'd like to point out that the
Linux kernel always uses "lfence; rdtsc" on Intel CPUs to obtain ordered
timestamps with lowest possible overhead. LFENCE is available on all x86-64
processors as part of SSE2.

On AMD CPUs the kernel also uses "lfence; rdtsc", except if it cannot setup
a specific MSR to make LFENCE serializing; in that case it falls back to
"mfence; rdtsc".

"lfence; rdtsc" sequence is also recommended by Intel SDM documentation.

Is there a specific reason that "rdtscp" is preferable for this patch?


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