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Re: [PATCH 3/3] aarch64: Optimized memchr specific to AmpereComputing skylark
- From: Richard Henderson <rth at twiddle dot net>
- To: Xue Feng <innat_xue at hotmail dot com>, "libc-alpha at sourceware dot org" <libc-alpha at sourceware dot org>
- Cc: "marcus dot shawcroft at linaro dot org" <marcus dot shawcroft at linaro dot org>, "szabolcs dot nagy at arm dot com" <szabolcs dot nagy at arm dot com>, Feng Xue <feng dot xue at amperecomputing dot com>
- Date: Fri, 12 Oct 2018 09:18:11 -0700
- Subject: Re: [PATCH 3/3] aarch64: Optimized memchr specific to AmpereComputing skylark
- References: <PS1PR0201MB1771610330EC94F7A9EB1CDE84E20@PS1PR0201MB1771.apcprd02.prod.outlook.com>
On 10/12/18 4:44 AM, Xue Feng wrote:
> + /*
> + * Preload the next 16-byte aligned block to hide some memory
> + * access latency.
> + */
> + ldp data1, data2, [src, 16]!
You seem to be under the mistaken impression that you are allowed to search all
cntin bytes. However, memchr "shall behave as if it reads the characters
sequentially and stops as soon as a matching character is found."