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Dear binutils, For the riscv assembler, if we use any floating point register (FPR), then the f-extension should be set. Currently we already have the similar check in the riscv_opcodes table, but the riscv_insn_types table, which is used to parse the ".insn" directive, have not yet. It would be good if the riscv_insn_types table has the same behavior as the riscv_opcodes table. Thanks Best Regards Nelson
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0001-RISC-V-Support-the-INSN_CLASS.-F.-classes-for-.insn-.patch
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