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[PATCH] x86: fold AVX scalar to/from int conversion insns
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Mon, 24 Jun 2019 08:09:59 -0600
- Subject: [PATCH] x86: fold AVX scalar to/from int conversion insns
There's no point doing a separate decode of the VEX.L bit - both decoded
forms are identical.
opcodes/
2019-06-24 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (VEX_LEN_0F2A_P_1, VEX_LEN_0F2A_P_3,
VEX_LEN_0F2C_P_1, VEX_LEN_0F2C_P_3, VEX_LEN_0F2D_P_1,
VEX_LEN_0F2D_P_3): Delete.
(vex_len_table): Move vcvtsi2ss, vcvtsi2sd, vcvttss2si,
vcvttsd2si, vcvtss2si, and vcvtsd2si leaf entries ...
(prefix_table): ... here.
---
Note that this goes on top of "x86: allow VEX et al encodings in 16-bit
(protected) mode".
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1818,12 +1818,6 @@ enum
VEX_LEN_0F16_P_0_M_1,
VEX_LEN_0F16_P_2,
VEX_LEN_0F17_M_0,
- VEX_LEN_0F2A_P_1,
- VEX_LEN_0F2A_P_3,
- VEX_LEN_0F2C_P_1,
- VEX_LEN_0F2C_P_3,
- VEX_LEN_0F2D_P_1,
- VEX_LEN_0F2D_P_3,
VEX_LEN_0F41_P_0,
VEX_LEN_0F41_P_2,
VEX_LEN_0F42_P_0,
@@ -4696,25 +4690,25 @@ static const struct dis386 prefix_table[
/* PREFIX_VEX_0F2A */
{
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F2A_P_1) },
+ { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F2A_P_3) },
+ { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
},
/* PREFIX_VEX_0F2C */
{
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F2C_P_1) },
+ { "vcvttss2si", { Gdq, EXdScalar }, 0 },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F2C_P_3) },
+ { "vcvttsd2si", { Gdq, EXqScalar }, 0 },
},
/* PREFIX_VEX_0F2D */
{
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F2D_P_1) },
+ { "vcvtss2si", { Gdq, EXdScalar }, 0 },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F2D_P_3) },
+ { "vcvtsd2si", { Gdq, EXqScalar }, 0 },
},
/* PREFIX_VEX_0F2E */
@@ -9341,42 +9335,6 @@ static const struct dis386 vex_len_table
{ "vmovhpX", { EXq, XM }, 0 },
},
- /* VEX_LEN_0F2A_P_1 */
- {
- { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
- { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
- },
-
- /* VEX_LEN_0F2A_P_3 */
- {
- { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
- { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
- },
-
- /* VEX_LEN_0F2C_P_1 */
- {
- { "vcvttss2si", { Gdq, EXdScalar }, 0 },
- { "vcvttss2si", { Gdq, EXdScalar }, 0 },
- },
-
- /* VEX_LEN_0F2C_P_3 */
- {
- { "vcvttsd2si", { Gdq, EXqScalar }, 0 },
- { "vcvttsd2si", { Gdq, EXqScalar }, 0 },
- },
-
- /* VEX_LEN_0F2D_P_1 */
- {
- { "vcvtss2si", { Gdq, EXdScalar }, 0 },
- { "vcvtss2si", { Gdq, EXdScalar }, 0 },
- },
-
- /* VEX_LEN_0F2D_P_3 */
- {
- { "vcvtsd2si", { Gdq, EXqScalar }, 0 },
- { "vcvtsd2si", { Gdq, EXqScalar }, 0 },
- },
-
/* VEX_LEN_0F41_P_0 */
{
{ Bad_Opcode },