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Re: [PATCH] x86: Enable Intel AVX512 VP2INTERSECT instruction
On Fri, May 31, 2019 at 4:45 AM Jan Beulich <JBeulich@suse.com> wrote:
>
> >>> On 31.05.19 at 09:05, <lili.cui@intel.com> wrote:
> > gas/
> >
> > 2019-05-27 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
> > Lili Cui <lili.cui@intel.com>
> >
> > * config/tc-i386.c (cpu_arch): Add .avx512_vp2intersect.
> > (cpu_noarch): Likewise.
>
> I think there's code missing here: Just like for 4FMAPS and 4VNNIW
> insns we warn when the programmer has specified a register not
> evenly divisible by 4 (see the ImplicitQuadGroup attribute), you want
> to warn here for an odd-numbered mask register. However, rather
> than taking the easy route by simply adding another boolean, please
> consider converting the existing one to an enum-like attribute, and
> simply add another enumerator for the case here. Or quite possibly
> a renamed boolean attribute could do - both cases can be easily
> distinguished by there being a %k register affected here, but
> %[xyz]mm ones there.
vp2intersectd %zmm1, %zmm2, %k0
vp2intersectd %zmm1, %zmm2, %k1
are well defined by
// dest_mask_reg_id is the register id specified in the instruction for destmask
dest_base ← dest_mask_reg_id & ~1
There is no requirement for even mask registers.
> > opcodes/
> >
> > 2019-05-27 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
> > Lili Cui <lili.cui@intel.com>
> >
> > * i386-dis.c (enum): Add PREFIX_EVEX_0F3868, EVEX_W_0F3868_P_3.
> > * i386-dis-evex.h (evex_table): Add AVX512_VP2INTERSECT
> > instructions.
> > * i386-gen.ci (cpu_flag_init): Add CPU_AVX512_VP2INTERSECT_FLAGS,
> > CPU_ANY_AVX512_VP2INTERSECT_FLAGS.
> > (cpu_flags): Add CpuAVX512_VP2INTERSECT.
> > * i386-opc.h (enum): Add CpuAVX512_VP2INTERSECT.
> > (i386_cpu_flags): Add cpuavx512_vp2intersect.
> > * i386-opc.tbl: Add AVX512_VP2INTERSECT insns.
>
> May I ask that you omit the blank line between the two insns?
>
Lili, please remove it.
Thanks.
--
H.J.