RE: Warning: unpredictable: identical transfer and status registers --`stxr w4,x5,[x4] using aarch64 poky gcc 8.3

[Peng Fan <peng dot fan at nxp dot com>]

Hi Nick

> -----Original Message-----
> From: Nick Clifton [mailto:nickc@redhat.com]
> Sent: 2019年2月19日 23:41
> To: Peng Fan <peng.fan@nxp.com>; binutils@sourceware.org
> Cc: Jan Kiszka <jan.kiszka@siemens.com>
> Subject: Re: Warning: unpredictable: identical transfer and status registers
> --`stxr w4,x5,[x4] using aarch64 poky gcc 8.3
> 
> Hi Peng,
> 
> > Not sure this is bug or not, is my patch the correct fix?
> > please help.
> 
> I think that you have reported this problem to the wrong mailing list...
> 
> > I did a fix to the code as below:
> > --- a/hypervisor/arch/arm64/include/asm/bitops.h
> > +++ b/hypervisor/arch/arm64/include/asm/bitops.h
> 
> This is not part of the binutils sources. :-)
> 
> For what it is worth, I think that your analysis is correct, and that the warning
> message from the assembler is valid.  So patching the hypervisor code would
> be in order.  I cannot say whether the patch itself is correct however.

Understand. It was the code error that not add early-clobber.

Thanks,
Peng.

> 
> Cheers
>   Nick