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[PATCH 7/9] x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Thu, 11 Oct 2018 00:56:47 -0600
- Subject: [PATCH 7/9] x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode
- References: <5BBE1F7502000078001F07CC@prv1-mh.provo.novell.com>
For the flavors having a GPR operand VEX.W is ignored outside of 64-bit
mode. The mnemonic should therefore not be KMOVQ.
gas/
2018-10-10 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/avx-wig.s: Add kmovd cases.
* testsuite/gas/i386/avx-wig.d: Adjust expectations.
opcodes/
2018-10-10 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (MOD_VEX_W_0_0F92_P_3_LEN_0,
MOD_VEX_W_1_0F92_P_3_LEN_0): Fold into MOD_VEX_0F92_P_3_LEN_0.
(MOD_VEX_W_0_0F93_P_3_LEN_0, MOD_VEX_W_1_0F93_P_3_LEN_0): Fold
into MOD_VEX_0F93_P_3_LEN_0.
(vex_len_table, vex_w_table, mod_table): Move kmov[dq} with GPR
operand cases up one level in the hierarchy.
--- a/gas/testsuite/gas/i386/avx-wig.d
+++ b/gas/testsuite/gas/i386/avx-wig.d
@@ -22,6 +22,8 @@ Disassembly of section .text:
+[a-f0-9]+: c4 e2 f8 f3 10 blsmsk \(%eax\),%eax
+[a-f0-9]+: c4 e2 f8 f3 08 blsr \(%eax\),%eax
+[a-f0-9]+: c4 e2 f8 f5 00 bzhi %eax,\(%eax\),%eax
+ +[a-f0-9]+: c4 e1 fb 92 c0 kmovd %eax,%k0
+ +[a-f0-9]+: c4 e1 fb 93 c0 kmovd %k0,%eax
+[a-f0-9]+: 8f e9 f8 12 c0 llwpcb %eax
+[a-f0-9]+: 8f ea f8 12 00 00 00 00 00 lwpins \$0x0,\(%eax\),%eax
+[a-f0-9]+: 8f ea f8 12 08 00 00 00 00 lwpval \$0x0,\(%eax\),%eax
--- a/gas/testsuite/gas/i386/avx-wig.s
+++ b/gas/testsuite/gas/i386/avx-wig.s
@@ -17,6 +17,8 @@ _start:
blsmsk (%eax), %eax
blsr (%eax), %eax
bzhi %eax, (%eax), %eax
+ kmovd %eax, %k0
+ kmovd %k0, %eax
llwpcb %eax
lwpins $0, (%eax), %eax
lwpval $0, (%eax), %eax
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -903,12 +903,10 @@ enum
MOD_VEX_W_1_0F91_P_2_LEN_0,
MOD_VEX_W_0_0F92_P_0_LEN_0,
MOD_VEX_W_0_0F92_P_2_LEN_0,
- MOD_VEX_W_0_0F92_P_3_LEN_0,
- MOD_VEX_W_1_0F92_P_3_LEN_0,
+ MOD_VEX_0F92_P_3_LEN_0,
MOD_VEX_W_0_0F93_P_0_LEN_0,
MOD_VEX_W_0_0F93_P_2_LEN_0,
- MOD_VEX_W_0_0F93_P_3_LEN_0,
- MOD_VEX_W_1_0F93_P_3_LEN_0,
+ MOD_VEX_0F93_P_3_LEN_0,
MOD_VEX_W_0_0F98_P_0_LEN_0,
MOD_VEX_W_1_0F98_P_0_LEN_0,
MOD_VEX_W_0_0F98_P_2_LEN_0,
@@ -1963,10 +1961,8 @@ enum
VEX_W_0F91_P_2_LEN_0,
VEX_W_0F92_P_0_LEN_0,
VEX_W_0F92_P_2_LEN_0,
- VEX_W_0F92_P_3_LEN_0,
VEX_W_0F93_P_0_LEN_0,
VEX_W_0F93_P_2_LEN_0,
- VEX_W_0F93_P_3_LEN_0,
VEX_W_0F98_P_0_LEN_0,
VEX_W_0F98_P_2_LEN_0,
VEX_W_0F99_P_0_LEN_0,
@@ -9486,7 +9482,7 @@ static const struct dis386 vex_len_table
/* VEX_LEN_0F92_P_3 */
{
- { VEX_W_TABLE (VEX_W_0F92_P_3_LEN_0) },
+ { MOD_TABLE (MOD_VEX_0F92_P_3_LEN_0) },
},
/* VEX_LEN_0F93_P_0 */
@@ -9501,7 +9497,7 @@ static const struct dis386 vex_len_table
/* VEX_LEN_0F93_P_3 */
{
- { VEX_W_TABLE (VEX_W_0F93_P_3_LEN_0) },
+ { MOD_TABLE (MOD_VEX_0F93_P_3_LEN_0) },
},
/* VEX_LEN_0F98_P_0 */
@@ -10000,11 +9996,6 @@ static const struct dis386 vex_w_table[]
{ MOD_TABLE (MOD_VEX_W_0_0F92_P_2_LEN_0) },
},
{
- /* VEX_W_0F92_P_3_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F92_P_3_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F92_P_3_LEN_0) },
- },
- {
/* VEX_W_0F93_P_0_LEN_0 */
{ MOD_TABLE (MOD_VEX_W_0_0F93_P_0_LEN_0) },
},
@@ -10013,11 +10004,6 @@ static const struct dis386 vex_w_table[]
{ MOD_TABLE (MOD_VEX_W_0_0F93_P_2_LEN_0) },
},
{
- /* VEX_W_0F93_P_3_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F93_P_3_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F93_P_3_LEN_0) },
- },
- {
/* VEX_W_0F98_P_0_LEN_0 */
{ MOD_TABLE (MOD_VEX_W_0_0F98_P_0_LEN_0) },
{ MOD_TABLE (MOD_VEX_W_1_0F98_P_0_LEN_0) },
@@ -10818,14 +10804,9 @@ static const struct dis386 mod_table[][2
{ "kmovb", { MaskG, Rdq }, 0 },
},
{
- /* MOD_VEX_W_0_0F92_P_3_LEN_0 */
- { Bad_Opcode },
- { "kmovd", { MaskG, Rdq }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F92_P_3_LEN_0 */
+ /* MOD_VEX_0F92_P_3_LEN_0 */
{ Bad_Opcode },
- { "kmovq", { MaskG, Rdq }, 0 },
+ { "kmovK", { MaskG, Rdq }, 0 },
},
{
/* MOD_VEX_W_0_0F93_P_0_LEN_0 */
@@ -10838,14 +10819,9 @@ static const struct dis386 mod_table[][2
{ "kmovb", { Gdq, MaskR }, 0 },
},
{
- /* MOD_VEX_W_0_0F93_P_3_LEN_0 */
- { Bad_Opcode },
- { "kmovd", { Gdq, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F93_P_3_LEN_0 */
+ /* MOD_VEX_0F93_P_3_LEN_0 */
{ Bad_Opcode },
- { "kmovq", { Gdq, MaskR }, 0 },
+ { "kmovK", { Gdq, MaskR }, 0 },
},
{
/* MOD_VEX_W_0_0F98_P_0_LEN_0 */