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PING: Re: [PATCH] cpu/opcodes: Sync up fr30.cpu and generated opcodes files
- From: Andrew Burgess <andrew dot burgess at embecosm dot com>
- To: binutils at sourceware dot org
- Date: Wed, 2 Mar 2016 00:22:58 +0000
- Subject: PING: Re: [PATCH] cpu/opcodes: Sync up fr30.cpu and generated opcodes files
- Authentication-results: sourceware.org; auth=none
- References: <26ed35ad6217386ff606faa9b3020d58cc6dbfd0 dot 1455410562 dot git dot andrew dot burgess at embecosm dot com>
Ping!
* Andrew Burgess <andrew.burgess@embecosm.com> [2016-02-14 00:44:15 +0000]:
> In commit b6518b3 (Fix compile time warnings generated when compiling
> with clang.) the generated fr30-ibld.c file was modified, but the
> underlying fr30.cpu file, from which it is generated was not.
>
> This commit updates the fr30.cpu file in such a way that the C code
> generated in fr30-ibld.c avoids the undefined behaviour that b6518b3 was
> trying to avoid, while also being something that CGEN can handle without
> any changes.
>
> cpu/ChangeLog:
>
> * fr30.cpu (f-m4): Adjust extract handler to avoid shifting a
> negative value (undefined behaviour in C).
>
> opcodes/ChangeLog:
>
> * fr30-ibld.c: Regenerate from latest cpu/fr30.cpu file.
> ---
> cpu/ChangeLog | 5 +++++
> cpu/fr30.cpu | 7 +++----
> opcodes/ChangeLog | 4 ++++
> opcodes/fr30-ibld.c | 2 +-
> 4 files changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/cpu/ChangeLog b/cpu/ChangeLog
> index 3d39b91..59782b5 100644
> --- a/cpu/ChangeLog
> +++ b/cpu/ChangeLog
> @@ -1,3 +1,8 @@
> +2016-02-14 Andrew Burgess <andrew.burgess@embecosm.com>
> +
> + * fr30.cpu (f-m4): Adjust extract handler to avoid shifting a
> + negative value (undefined behaviour in C).
> +
> 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
>
> * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
> diff --git a/cpu/fr30.cpu b/cpu/fr30.cpu
> index 6c8e8ce..de15d1e 100644
> --- a/cpu/fr30.cpu
> +++ b/cpu/fr30.cpu
> @@ -160,10 +160,9 @@
> (df f-i4 "4 bit sign extended" () 8 4 INT #f #f)
> (df f-m4 "4 bit minus extended" () 8 4 UINT
> ((value pc) (and WI value (const #xf)))
> - ; ??? On a 64 bit host this doesn't get completely sign extended
> - ; if the value is recorded in a long, as it is during extraction.
> - ; Various fixes exist, pick one.
> - ((value pc) (or WI value (sll WI (const -1) (const 4))))
> + ; We want every bit except the least significant 4 set, so take
> + ; the bit INVerse of setting the last significant 4 bits.
> + ((value pc) (or WI value (inv WI (const #xf))))
> )
> (dnf f-u8 "8 bit unsigned" () 8 8)
> (dnf f-i8 "8 bit unsigned" () 4 8)
> diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
> index 24c1680..fc52c94 100644
> --- a/opcodes/ChangeLog
> +++ b/opcodes/ChangeLog
> @@ -1,3 +1,7 @@
> +2016-02-14 Andrew Burgess <andrew.burgess@embecosm.com>
> +
> + * fr30-ibld.c: Regenerate from latest cpu/fr30.cpu file.
> +
> 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
> Janek van Oirschot <jvanoirs@synopsys.com>
>
> diff --git a/opcodes/fr30-ibld.c b/opcodes/fr30-ibld.c
> index 1293e73..089254b 100644
> --- a/opcodes/fr30-ibld.c
> +++ b/opcodes/fr30-ibld.c
> @@ -881,7 +881,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC cd,
> {
> long value;
> length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
> - value = ((value) | (((-1UL) << (4))));
> + value = ((value) | ((~ (15))));
> fields->f_m4 = value;
> }
> break;
> --
> 2.5.1
>