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[RL78]: "objdump" utility does not generate offset for 0 with SP register.
- From: "Vinay Kumar. G" <Vinay dot G at kpit dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: "nickc at redhat dot com" <nickc at redhat dot com>
- Date: Fri, 26 Jun 2015 10:55:28 +0000
- Subject: [RL78]: "objdump" utility does not generate offset for 0 with SP register.
- Authentication-results: sourceware.org; auth=none
- Authentication-results: redhat.com; dkim=none (message not signed) header.d=none;
- References: <HKXPR03MB05670AB50D3D2D549626E46593AD0 at HKXPR03MB0567 dot apcprd03 dot prod dot outlook dot com>
Hi,
The RL78 toolchain "objdump" utility does not generate offset in the
object dump when offset addressing mode used for offset 0(zero) with
stack pointer (SP) register.
For example:
/* test.s */
.text
mov a, [sp]
mov a, [sp + 0]
mov a, [sp + 1]
movw ax, [sp]
movw ax, [sp + 0]
movw ax, [sp + 2]
mov [sp], # 9
mov [sp + 0], # 9
mov [sp + 1], # 9
.end
Command:
$rl78-elf-as test.s -o test.o -aln
$rl78-elf-objdump -d test.o
List file output :
1 .text
2 0000 88 00 mov a, [sp]
3 0002 88 00 mov a, [sp + 0]
4 0004 88 01 mov a, [sp + 1]
8 000c A8 00 movw ax, [sp]
9 000e A8 00 movw ax, [sp + 0]
10 0010 A8 02 movw ax, [sp + 2]
14 0018 C8 00 09 mov [sp], # 9
15 001b C8 00 09 mov [sp + 0], # 9
16 001e C8 01 09 mov [sp + 1], # 9
17 .end
Actual objdump disassembly output:
00000000 <.text>:
0: 88 00 mov a, [sp]
2: 88 00 mov a, [sp]
4: 88 01 mov a, [sp+1]
c: a8 00 movw ax, [sp]
e: a8 00 movw ax, [sp]
10: a8 02 movw ax, [sp+2]
18: c8 00 09 mov [sp], #9
1b: c8 00 09 mov [sp], #9
1e: c8 01 09 mov [sp+1], #9
Expected objdump disassembly output :
00000000 <.text>:
0: 88 00 mov a, [sp+0]
2: 88 00 mov a, [sp+0]
4: 88 01 mov a, [sp+1]
c: a8 00 movw ax, [sp+0]
e: a8 00 movw ax, [sp+0]
10: a8 02 movw ax, [sp+2]
18: c8 00 09 mov [sp+0], #9
1b: c8 00 09 mov [sp+0], #9
1e: c8 01 09 mov [sp+1], #9
Please review below patch and commit the same if OK.
Best Regards,
Vinay
/******************************************************************/
opcodes/ChangeLog
2015-06-26 Vinay <Vinay.G@kpit.com>
* rl78-decode.opc (MOV): Added offset to SP
register in offset addressing mode.
* rl78-decode.c: Regenerate.
--- opcodes/rl78-decode.opc.org 2015-04-06 10:05:54.308538163 +0530
+++ opcodes/rl78-decode.opc 2015-04-06 15:29:10.058391485 +0530
@@ -634,16 +634,16 @@
/** 0110 0001 1111 1001 mov %e0, %1 */
ID(mov); DM2(HL, C, 0); SR(A);
-/** 1100 1000 mov %0, #%1 */
+/** 1100 1000 mov %a0, #%1 */
ID(mov); DM(SP, IMMU(1)); SC(IMMU(1));
-/** 1001 1000 mov %0, %1 */
+/** 1001 1000 mov %a0, %1 */
ID(mov); DM(SP, IMMU(1)); SR(A);
/** 1000 1111 mov %0, %e!1 */
ID(mov); DR(A); SM(None, IMMU(2));
-/** 1000 1001 mov %0, %e1 */
+/** 1000 1001 mov %0, %e1 */
ID(mov); DR(A); SM(DE, 0);
/** 1000 1010 mov %0, %ea1 */
@@ -661,7 +661,7 @@
/** 0110 0001 1110 1001 mov %0, %e1 */
ID(mov); DR(A); SM2(HL, C, 0);
-/** 1000 1000 mov %0, %e1 */
+/** 1000 1000 mov %0, %ea1 */
ID(mov); DR(A); SM(SP, IMMU(1));
/** 0101 0reg mov %0, #%1 */
@@ -826,7 +826,7 @@
/** 1011 1100 movw %ea0, %1 */
ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
-/** 1011 1000 movw %0, %1 */
+/** 1011 1000 movw %a0, %1 */
ID(mov); W(); DM(SP, IMMU(1)); SR(AX);
/** 1010 1111 movw %0, %e!1 */
@@ -845,7 +845,7 @@
/** 1010 1100 movw %0, %ea1 */
ID(mov); W(); DR(AX); SM(HL, IMMU(1));
-/** 1010 1000 movw %0, %1 */
+/** 1010 1000 movw %0, %a1 */
ID(mov); W(); DR(AX); SM(SP, IMMU(1));
/** 0011 0rg0 movw %0, #%1 */