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[PATCH] Power/GAS: Don't set VLE annotation for non-VLE processors/instructions


Hi,

 I've come across this issue with Power GAS that adds VLE annotation in 
the .PPC.EMB.apuinfo special section even if the binary in question has 
been built for a processor such as the e6500, that does not support the 
VLE instruction set, and the binary has no true VLE instructions but 
merely ones that are shared between the VLE and the standard ISA 
instruction set.

 The cause of this is the VLE annotation that we have for all the 
instructions that must be enabled with the `-mvle' command-line option, 
not only true VLE instructions.

 The fix below makes GAS only add the annotation when it's the VLE marking 
that has enabled the instruction being assembled, that is if the 
instruction has no other opcode flags set or if the processor has no other 
flags set matching the opcode flags.  The LD test suite is updated 
accordingly, including a new test case to cover the VLE annotation being 
both present and absent accordingly.

 No regressions across powerpc-eabisim, powerpc-linux, powerpc-nto, 
powerpc-wrs-vxworks, powerpc64-linux, ppc-lynxos, rs6000-aix4.3.3, 
rs6000-aix5.1.  OK to apply?

2014-08-21  Maciej W. Rozycki  <macro@codesourcery.com>

	gas/
	* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
	flag if both the processor and opcode flags match.

	ld/testsuite/
	* ld-powerpc/apuinfo-vle.rd: New test.
	* ld-powerpc/apuinfo-vle.s: New test source.
	* ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
	handling change.
	* ld-powerpc/powerpc.exp: Run the new test.

  Maciej

binutils-gas-power-apuinfo-vle.diff
Index: binutils-fsf-trunk-quilt/gas/config/tc-ppc.c
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/config/tc-ppc.c	2014-06-13 03:13:53.337562817 +0100
+++ binutils-fsf-trunk-quilt/gas/config/tc-ppc.c	2014-08-21 13:11:43.148940397 +0100
@@ -3369,7 +3369,12 @@ md_assemble (char *str)
 	ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
       if (opcode->flags & PPC_OPCODE_RFMCI)
 	ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
-      if (opcode->flags & PPC_OPCODE_VLE)
+      /* Only set the VLE flag if the instruction has been pulled via
+         the VLE instruction set.  This way the flag is guaranteed to
+         be set for VLE-only instructions or for VLE-only processors,
+         however it'll remain clear for dual-mode instructions on
+         dual-mode and, more importantly, standard-mode processors.  */
+      if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
 	ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
     }
 #endif
Index: binutils-fsf-trunk-quilt/ld/testsuite/ld-powerpc/apuinfo-vle.rd
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ binutils-fsf-trunk-quilt/ld/testsuite/ld-powerpc/apuinfo-vle.rd	2014-08-21 13:11:43.148940397 +0100
@@ -0,0 +1,5 @@
+Hex dump of section '\.PPC\.EMB\.apuinfo':
+  0x00000000 (?:00000008|08000000) (?:00000020|20000000) (?:00000002|02000000) 41505569 .*APUi
+  0x00000010 6e666f00 (?:00420001|01004200) (?:00430001|01004300) (?:00410001|01004100) nfo.*
+  0x00000020 (?:01020001|01000201) (?:01040001|01000401) (?:01010001|01000101) (?:00400001|01004000) .*
+  0x00000030 01000001                            .*
Index: binutils-fsf-trunk-quilt/ld/testsuite/ld-powerpc/apuinfo-vle.s
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ binutils-fsf-trunk-quilt/ld/testsuite/ld-powerpc/apuinfo-vle.s	2014-08-21 13:11:43.148940397 +0100
@@ -0,0 +1,4 @@
+	.text
+	.global apuinfo_vle
+apuinfo_vle:
+	se_blr
Index: binutils-fsf-trunk-quilt/ld/testsuite/ld-powerpc/apuinfo.rd
===================================================================
--- binutils-fsf-trunk-quilt.orig/ld/testsuite/ld-powerpc/apuinfo.rd	2013-04-23 18:26:05.000000000 +0100
+++ binutils-fsf-trunk-quilt/ld/testsuite/ld-powerpc/apuinfo.rd	2014-08-21 13:11:43.148940397 +0100
@@ -6,7 +6,6 @@
 #target: powerpc-eabi*
 
 Hex dump of section '.PPC.EMB.apuinfo':
-  0x00000000 (00000008|08000000) (00000020|20000000) (00000002|02000000) 41505569 .*APUi
+  0x00000000 (00000008|08000000) (0000001c|1c000000) (00000002|02000000) 41505569 .*APUi
   0x00000010 6e666f00 (00420001|01004200) (00430001|01004300) (00410001|01004100) nfo.*
-  0x00000020 (01020001|01000201) (01010001|01000101) (00400001|01004000) (01040001|01000401) .*
-  0x00000030 01000001                            .*
+  0x00000020 (01020001|01000201) (01010001|01000101) (00400001|01004000) 01000001 .*
Index: binutils-fsf-trunk-quilt/ld/testsuite/ld-powerpc/powerpc.exp
===================================================================
--- binutils-fsf-trunk-quilt.orig/ld/testsuite/ld-powerpc/powerpc.exp	2014-07-31 02:40:53.037691232 +0100
+++ binutils-fsf-trunk-quilt/ld/testsuite/ld-powerpc/powerpc.exp	2014-08-21 13:11:43.148940397 +0100
@@ -102,10 +102,13 @@ set ppcelftests {
      {{objdump -hw reloc.d}} "reloc.so"}
     {"APUinfo section processing" "-melf32ppc" ""
      "-a32 -me500" {apuinfo1.s apuinfo-nul.s apuinfo2.s}
-    {{readelf -x2 apuinfo.rd}} "apuinfo"}
+     {{readelf -x2 apuinfo.rd}} "apuinfo"}
+    {"APUinfo VLE section processing" "-melf32ppc" ""
+     "-a32 -me500 -mvle" {apuinfo1.s apuinfo-vle.s apuinfo2.s}
+     {{readelf -x2 apuinfo-vle.rd}} "apuinfo-vle"}
     {"APUinfo NULL section processing" "-melf32ppc" ""
      "-a32 -me500" {apuinfo-nul1.s apuinfo-nul.s}
-    {{readelf -x2 apuinfo-nul.rd}} "apuinfo"}
+     {{readelf -x2 apuinfo-nul.rd}} "apuinfo"}
     {"TLS32 static exec" "-melf32ppc" "" "-a32"  {tls32.s tlslib32.s}
      {{objdump -dr tls32.d} {objdump -sj.got tls32.g}
       {objdump -sj.tdata tls32.t}}


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