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[Patch, AArch64] Fix the support for PRFM instructions with preload instruction hints
- From: Yufeng Zhang <Yufeng dot Zhang at arm dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Thu, 14 Feb 2013 16:56:30 +0000
- Subject: [Patch, AArch64] Fix the support for PRFM instructions with preload instruction hints
Hi,
This patch fixes an issue that GAS incorrectly rejects preload
instruction hints in the PRFM instructions. These preload instruction
hints are:
PLIL1KEEP
PLIL1STRM
PLIL2KEEP
PLIL2STRM
PLIL3KEEP
PLIL3STRM
Is it OK for the trunk and the 2_23-branch branch?
Thanks,
Yufeng
opcodes/
2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-opc.c (aarch64_prfops): Change unnamed operation 'name'
fields to NULL.
(aarch64_print_operand): Adjust the printing for AARCH64_OPND_PRFOP.
gas/
2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (md_begin): Change to check if 'name' is
NULL.
gas/testsuite/
2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/system.s: Add tests.
* gas/aarch64/system.d: Update.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index f9b4cd0..ce59705 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6867,9 +6867,8 @@ md_begin (void)
for (i = 0; i < ARRAY_SIZE (aarch64_prfops); i++)
{
const char* name = aarch64_prfops[i].name;
- /* Skip 0011x, 01xxx, 1011x and 11xxx - the unallocated hint encodings
- as a 5-bit immediate #uimm5. */
- if ((i & 0xf) >= 6)
+ /* Skip the unallocated hint encodings. */
+ if (name == NULL)
continue;
checked_hash_insert (aarch64_pldop_hsh, name,
(void *) (aarch64_prfops + i));
diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
index 63e0b4c..4fad895 100644
--- a/gas/testsuite/gas/aarch64/system.d
+++ b/gas/testsuite/gas/aarch64/system.d
@@ -350,3 +350,21 @@ Disassembly of section \.text:
4d8: f8af6bff prfm #0x1f, \[sp,x15\]
4dc: f8be58ff prfm #0x1f, \[x7,w30,uxtw #3\]
4e0: f9800c7f prfm #0x1f, \[x3,#24\]
+ 4e4: f9800c60 prfm pldl1keep, \[x3,#24\]
+ 4e8: f9800c61 prfm pldl1strm, \[x3,#24\]
+ 4ec: f9800c62 prfm pldl2keep, \[x3,#24\]
+ 4f0: f9800c63 prfm pldl2strm, \[x3,#24\]
+ 4f4: f9800c64 prfm pldl3keep, \[x3,#24\]
+ 4f8: f9800c65 prfm pldl3strm, \[x3,#24\]
+ 4fc: f9800c68 prfm plil1keep, \[x3,#24\]
+ 500: f9800c69 prfm plil1strm, \[x3,#24\]
+ 504: f9800c6a prfm plil2keep, \[x3,#24\]
+ 508: f9800c6b prfm plil2strm, \[x3,#24\]
+ 50c: f9800c6c prfm plil3keep, \[x3,#24\]
+ 510: f9800c6d prfm plil3strm, \[x3,#24\]
+ 514: f9800c70 prfm pstl1keep, \[x3,#24\]
+ 518: f9800c71 prfm pstl1strm, \[x3,#24\]
+ 51c: f9800c72 prfm pstl2keep, \[x3,#24\]
+ 520: f9800c73 prfm pstl2strm, \[x3,#24\]
+ 524: f9800c74 prfm pstl3keep, \[x3,#24\]
+ 528: f9800c75 prfm pstl3strm, \[x3,#24\]
diff --git a/gas/testsuite/gas/aarch64/system.s b/gas/testsuite/gas/aarch64/system.s
index 7fca5c2..234b900 100644
--- a/gas/testsuite/gas/aarch64/system.s
+++ b/gas/testsuite/gas/aarch64/system.s
@@ -60,3 +60,15 @@
.endm
all_prefetchs op=prfm, from=0, to=31
+
+ //
+ // PREFETCHS with named operation
+ //
+
+ .irp op, pld, pli, pst
+ .irp l, l1, l2, l3
+ .irp t, keep, strm
+ prfm \op\l\t, [x3, #24]
+ .endr
+ .endr
+ .endr
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 4bcb9ea..b7b1b4a 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -346,32 +346,32 @@ const struct aarch64_name_value_pair aarch64_prfops[32] =
{ "pldl2strm", B(0, 2, 1) },
{ "pldl3keep", B(0, 3, 0) },
{ "pldl3strm", B(0, 3, 1) },
- { "#0x06", 0x06 },
- { "#0x07", 0x07 },
+ { NULL, 0x06 },
+ { NULL, 0x07 },
{ "plil1keep", B(1, 1, 0) },
{ "plil1strm", B(1, 1, 1) },
{ "plil2keep", B(1, 2, 0) },
{ "plil2strm", B(1, 2, 1) },
{ "plil3keep", B(1, 3, 0) },
{ "plil3strm", B(1, 3, 1) },
- { "#0x0e", 0x0e },
- { "#0x0f", 0x0f },
+ { NULL, 0x0e },
+ { NULL, 0x0f },
{ "pstl1keep", B(2, 1, 0) },
{ "pstl1strm", B(2, 1, 1) },
{ "pstl2keep", B(2, 2, 0) },
{ "pstl2strm", B(2, 2, 1) },
{ "pstl3keep", B(2, 3, 0) },
{ "pstl3strm", B(2, 3, 1) },
- { "#0x16", 0x16 },
- { "#0x17", 0x17 },
- { "#0x18", 0x18 },
- { "#0x19", 0x19 },
- { "#0x1a", 0x1a },
- { "#0x1b", 0x1b },
- { "#0x1c", 0x1c },
- { "#0x1d", 0x1d },
- { "#0x1e", 0x1e },
- { "#0x1f", 0x1f },
+ { NULL, 0x16 },
+ { NULL, 0x17 },
+ { NULL, 0x18 },
+ { NULL, 0x19 },
+ { NULL, 0x1a },
+ { NULL, 0x1b },
+ { NULL, 0x1c },
+ { NULL, 0x1d },
+ { NULL, 0x1e },
+ { NULL, 0x1f },
};
#undef B
@@ -2638,7 +2638,10 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
break;
case AARCH64_OPND_PRFOP:
- snprintf (buf, size, "%s", opnd->prfop->name);
+ if (opnd->prfop->name != NULL)
+ snprintf (buf, size, "%s", opnd->prfop->name);
+ else
+ snprintf (buf, size, "#0x%02x", opnd->prfop->value);
break;
default: