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Re: [toolchain-devel] [Patch] set unused SRCx fields to all 1s for dspalu32 instrs
- From: Jie Zhang <jzhang918 at gmail dot com>
- To: "Henderson, Stuart" <Stuart dot Henderson at analog dot com>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>, "toolchain-devel at blackfin dot uclinux dot org" <toolchain-devel at blackfin dot uclinux dot org>, Mike Frysinger <vapier at gentoo dot org>
- Date: Wed, 30 Nov 2011 21:32:10 -0500
- Subject: Re: [toolchain-devel] [Patch] set unused SRCx fields to all 1s for dspalu32 instrs
- References: <05E9E85E39C35B4D96ED3A3190E35A10ADA8250CE4@LIMKCMBX1.ad.analog.com>
Hi Stuart,
On 11/30/2011 12:18 PM, Henderson, Stuart wrote:
Please merge this patch upstream:
thanks,
Stu
Author: Stuart Henderson<shenders@gcc.gnu.org>
Date: Wed Nov 30 16:42:30 2011 +0000
2011-11-30 Stuart Henderson<shenders@gcc.gnu.org>
* config/bfin-parse.y (asm_1): set SRCx fields to all 1s for dspalu32 instrs
that don't use them.
set -> Set
2011-11-30 Stuart Henderson<shenders@gcc.gnu.org>
* gas/bfin/move.d: update SRCx field expectations.
update -> Update
* gas/bfin/move2.d: Likewise.
* gas/bfin/parallel.d: Likewise.
* gas/bfin/parallel2.d: Likewise.
* gas/bfin/parallel3.d: Likewise.
* gas/bfin/parallel4.d: Likewise.
* gas/bfin/video.d: Likewise.
* gas/bfin/video2.d: Likewise.
diff --git a/gas/ChangeLog b/gas/ChangeLog
index eee35de..1f2a872 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2011-11-30 Stuart Henderson<shenders@gcc.gnu.org>
+
+ * config/bfin-parse.y (asm_1): set SRCx fields to all 1s for dspalu32 instrs
+ that don't use them.
+
2011-11-29 Andrew Pinski<apinski@cavium.com>
* config/tc-mips.c (CPU_IS_OCTEON): New macro function.
Please don't add ChangeLog diff in the patch.
diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y
index 797664a..ba8c54b 100644
--- a/gas/config/bfin-parse.y
+++ b/gas/config/bfin-parse.y
@@ -166,6 +166,8 @@ char *current_inputline;
extern char *yytext;
int yyerror (char *);
Can you add some comment here to explain why we need this patch? People
may wonder why we need reg7 when they read the code in future.
+Register reg7 = {REG_R7, 0};
+
[snip]
@@ -56,8 +56,8 @@ Disassembly of section .text:
00000066<move_register_half>:
66: 09 c4 28 40 A0.X = R5.L;
6a: 09 c4 10 c0 A1.X = R2.L;
- 6e: 0a c4 [0|3][0|6] 00 R0.L = A0.X;
- 72: 0a c4 [0|3][0|6] 4e R7.L = A1.X;
+ 6e: 0a c4 [0|3][0|f] 00 R0.L = A0.X;
+ 72: 0a c4 [0|3][0|f] 4e R7.L = A1.X;
I think we can just write "3f" here instead of "[0|3][0|f]" now. There
are some other occurrences in the bfin test cases. Could you please also
change them?
Regards,
Jie