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Update e_machine and osabi list
- From: "Joseph S. Myers" <joseph at codesourcery dot com>
- To: binutils at sourceware dot org
- Date: Sat, 28 Nov 2009 03:22:30 +0000 (UTC)
- Subject: Update e_machine and osabi list
An updated version of the gABI recently appeared on the SCO website, with
four new e_machine values and one new OSABI value compared to the last
version used to update include/elf/common.h. I've committed this patch as
obvious to add the new definitions.
Question: should readelf (get_osabi_name and get_machine_name) handle all
the registered values, whether or not binutils has any other support for
them? If so, those functions need reviewing to see what's missing, as
it's not just this include/elf/common.h update that has added values
without updating readelf; previous ones have as well.
Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/include/elf/ChangeLog,v
retrieving revision 1.382
diff -u -r1.382 ChangeLog
--- ChangeLog 17 Nov 2009 16:31:51 -0000 1.382
+++ ChangeLog 28 Nov 2009 03:17:32 -0000
@@ -1,3 +1,9 @@
+2009-11-28 Joseph Myers <joseph@codesourcery.com>
+
+ * common.h (ELFOSABI_FENIXOS, EM_TI_C6000, EM_TI_C2000,
+ EM_TI_C5500, EM_CUDA): Define.
+ (EM_res140, EM_res141, EM_res142): Remove.
+
2009-11-17 Paul Brook <paul@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Index: common.h
===================================================================
RCS file: /cvs/src/src/include/elf/common.h,v
retrieving revision 1.116
diff -u -r1.116 common.h
--- common.h 9 Aug 2009 13:42:26 -0000 1.116
+++ common.h 28 Nov 2009 03:17:32 -0000
@@ -74,6 +74,7 @@
#define ELFOSABI_OPENVMS 13 /* OpenVMS */
#define ELFOSABI_NSK 14 /* Hewlett-Packard Non-Stop Kernel */
#define ELFOSABI_AROS 15 /* AROS */
+#define ELFOSABI_FENIXOS 16 /* FenixOS */
#define ELFOSABI_ARM 97 /* ARM */
#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
@@ -240,9 +241,9 @@
#define EM_VIDEOCORE3 137 /* Broadcom VideoCore III processor */
#define EM_LATTICEMICO32 138 /* RISC processor for Lattice FPGA architecture */
#define EM_SE_C17 139 /* Seiko Epson C17 family */
-#define EM_res140 140 /* Reserved */
-#define EM_res141 141 /* Reserved */
-#define EM_res142 142 /* Reserved */
+#define EM_TI_C6000 140 /* Texas Instruments TMS320C6000 DSP family */
+#define EM_TI_C2000 141 /* Texas Instruments TMS320C2000 DSP family */
+#define EM_TI_C5500 142 /* Texas Instruments TMS320C55x DSP family */
#define EM_res143 143 /* Reserved */
#define EM_res144 144 /* Reserved */
#define EM_res145 145 /* Reserved */
@@ -291,6 +292,7 @@
#define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */
#define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */
#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
+#define EM_CUDA 190 /* NVIDIA CUDA architecture */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
--
Joseph S. Myers
joseph@codesourcery.com