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VFP multiply-negate fixes
- From: Paul Brook <paul at codesourcery dot com>
- To: binutils at sourceware dot org
- Date: Thu, 29 Oct 2009 18:01:10 +0000
- Subject: VFP multiply-negate fixes
The patch below fixes incorrect encoding of the VFP variants of the VNMUL,
VNMLA and VNMLS mnemonics.
Tested on arm-none-eabi.
Applied to CVS head.
Paul
2009-10-29 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (neon_tab_entry): Fix VNMLA/VNMLS opcodes.
gas/testsuite/
* gas/arm/vfp-neon-syntax.d: Update expected results.
* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
Index: gas/testsuite/gas/arm/vfp-neon-syntax.d
===================================================================
--- gas/testsuite/gas/arm/vfp-neon-syntax.d (revision 266991)
+++ gas/testsuite/gas/arm/vfp-neon-syntax.d (working copy)
@@ -45,14 +45,14 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> ee210b42 (vnmul\.f64|fnmuld) d0, d1, d2
0[0-9a-f]+ <[^>]+> 0e200ac1 (vnmuleq\.f32|fnmulseq) s0, s1, s2
0[0-9a-f]+ <[^>]+> 0e210b42 (vnmuleq\.f64|fnmuldeq) d0, d1, d2
-0[0-9a-f]+ <[^>]+> ee000ac1 (vmls\.f32|fnmacs) s0, s1, s2
-0[0-9a-f]+ <[^>]+> ee010b42 (vmls\.f64|fnmacd) d0, d1, d2
-0[0-9a-f]+ <[^>]+> 0e000ac1 (vmlseq\.f32|fnmacseq) s0, s1, s2
-0[0-9a-f]+ <[^>]+> 0e010b42 (vmlseq\.f64|fnmacdeq) d0, d1, d2
-0[0-9a-f]+ <[^>]+> ee100ac1 (vnmla\.f32|fnmscs) s0, s1, s2
-0[0-9a-f]+ <[^>]+> ee110b42 (vnmla\.f64|fnmscd) d0, d1, d2
-0[0-9a-f]+ <[^>]+> 0e100ac1 (vnmlaeq\.f32|fnmscseq) s0, s1, s2
-0[0-9a-f]+ <[^>]+> 0e110b42 (vnmlaeq\.f64|fnmscdeq) d0, d1, d2
+0[0-9a-f]+ <[^>]+> ee100ac1 (vnmla\.f32|fnmacs) s0, s1, s2
+0[0-9a-f]+ <[^>]+> ee110b42 (vnmla\.f64|fnmacd) d0, d1, d2
+0[0-9a-f]+ <[^>]+> 0e100ac1 (vnmlaeq\.f32|fnmacseq) s0, s1, s2
+0[0-9a-f]+ <[^>]+> 0e110b42 (vnmlaeq\.f64|fnmacdeq) d0, d1, d2
+0[0-9a-f]+ <[^>]+> ee100a81 (vnmls\.f32|fnmscs) s0, s1, s2
+0[0-9a-f]+ <[^>]+> ee110b02 (vnmls\.f64|fnmscd) d0, d1, d2
+0[0-9a-f]+ <[^>]+> 0e100a81 (vnmlseq\.f32|fnmscseq) s0, s1, s2
+0[0-9a-f]+ <[^>]+> 0e110b02 (vnmlseq\.f64|fnmscdeq) d0, d1, d2
0[0-9a-f]+ <[^>]+> ee200a81 (vmul\.f32|fmuls) s0, s1, s2
0[0-9a-f]+ <[^>]+> ee210b02 (vmul\.f64|fmuld) d0, d1, d2
0[0-9a-f]+ <[^>]+> 0e200a81 (vmuleq\.f32|fmulseq) s0, s1, s2
Index: gas/testsuite/gas/arm/vfp-neon-syntax_t2.d
===================================================================
--- gas/testsuite/gas/arm/vfp-neon-syntax_t2.d (revision 266991)
+++ gas/testsuite/gas/arm/vfp-neon-syntax_t2.d (working copy)
@@ -53,16 +53,16 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> bf04 itt eq
0[0-9a-f]+ <[^>]+> ee20 0ac1 (vnmuleq\.f32|fnmulseq) s0, s1, s2
0[0-9a-f]+ <[^>]+> ee21 0b42 (vnmuleq\.f64|fnmuldeq) d0, d1, d2
-0[0-9a-f]+ <[^>]+> ee00 0ac1 (vmls\.f32|fnmacs) s0, s1, s2
-0[0-9a-f]+ <[^>]+> ee01 0b42 (vmls\.f64|fnmacd) d0, d1, d2
+0[0-9a-f]+ <[^>]+> ee10 0ac1 (vnmla\.f32|fnmacs) s0, s1, s2
+0[0-9a-f]+ <[^>]+> ee11 0b42 (vnmla\.f64|fnmacd) d0, d1, d2
0[0-9a-f]+ <[^>]+> bf04 itt eq
-0[0-9a-f]+ <[^>]+> ee00 0ac1 (vmlseq\.f32|fnmacseq) s0, s1, s2
-0[0-9a-f]+ <[^>]+> ee01 0b42 (vmlseq\.f64|fnmacdeq) d0, d1, d2
-0[0-9a-f]+ <[^>]+> ee10 0ac1 (vnmla\.f32|fnmscs) s0, s1, s2
-0[0-9a-f]+ <[^>]+> ee11 0b42 (vnmla\.f64|fnmscd) d0, d1, d2
+0[0-9a-f]+ <[^>]+> ee10 0ac1 (vnmlaeq\.f32|fnmacseq) s0, s1, s2
+0[0-9a-f]+ <[^>]+> ee11 0b42 (vnmlaeq\.f64|fnmacdeq) d0, d1, d2
+0[0-9a-f]+ <[^>]+> ee10 0a81 (vnmls\.f32|fnmscs) s0, s1, s2
+0[0-9a-f]+ <[^>]+> ee11 0b02 (vnmls\.f64|fnmscd) d0, d1, d2
0[0-9a-f]+ <[^>]+> bf04 itt eq
-0[0-9a-f]+ <[^>]+> ee10 0ac1 (vnmlaeq\.f32|fnmscseq) s0, s1, s2
-0[0-9a-f]+ <[^>]+> ee11 0b42 (vnmlaeq\.f64|fnmscdeq) d0, d1, d2
+0[0-9a-f]+ <[^>]+> ee10 0a81 (vnmlseq\.f32|fnmscseq) s0, s1, s2
+0[0-9a-f]+ <[^>]+> ee11 0b02 (vnmlseq\.f64|fnmscdeq) d0, d1, d2
0[0-9a-f]+ <[^>]+> ee20 0a81 (vmul\.f32|fmuls) s0, s1, s2
0[0-9a-f]+ <[^>]+> ee21 0b02 (vmul\.f64|fmuld) d0, d1, d2
0[0-9a-f]+ <[^>]+> bf04 itt eq
Index: gas/config/tc-arm.c
===================================================================
--- gas/config/tc-arm.c (revision 266991)
+++ gas/config/tc-arm.c (working copy)
@@ -11328,8 +11328,8 @@ struct neon_tab_entry
X(vqmovn, 0x1b20200, N_INV, N_INV), \
X(vqmovun, 0x1b20240, N_INV, N_INV), \
X(vnmul, 0xe200a40, 0xe200b40, N_INV), \
- X(vnmla, 0xe000a40, 0xe000b40, N_INV), \
- X(vnmls, 0xe100a40, 0xe100b40, N_INV), \
+ X(vnmla, 0xe100a40, 0xe100b40, N_INV), \
+ X(vnmls, 0xe100a00, 0xe100b00, N_INV), \
X(vcmp, 0xeb40a40, 0xeb40b40, N_INV), \
X(vcmpz, 0xeb50a40, 0xeb50b40, N_INV), \
X(vcmpe, 0xeb40ac0, 0xeb40bc0, N_INV), \