Re: [PATCH] Lexra support in binutils

[Thiemo Seufer <ths at networkno dot de>]

Adam Nemet wrote:
> Thiemo Seufer writes:
> > Adam Nemet wrote:
> > > Thiemo Seufer <ths@networkno.de> writes:
> > > > Maciej W. Rozycki wrote:
> > > >> On Thu, 23 Oct 2008, Nick Clifton wrote:
> > > >> 
> > > >> > In fact I would say that the only thing currently missing from your patch is a
> > > >> > set of ChangeLog entries for the directories affected by the changes and maybe
> > > >> > an entry in the gas/NEWS file mentioning the support for the Lexra.
> > > >> 
> > > >>  One minor nit -- it would probably make sense to put the "mips0" entry in 
> > > >> mips_cpu_info_table[] separately before the list of "Entries for generic 
> > > >> ISAs," with a one-line comment like: "A fake ISA for MIPS I CPUs without 
> > > >> unaligned transfers."
> > > >
> > > > I wonder how this will play with .set mips0. Maybe we should use "mips0.9"
> > > > for it, "mips0.8" for the compatible octeon subset, and "mips1.9" for the
> > > > R5900. :-)
> > > 
> > > If I understand this correctly, shouldn't octeon be mips64r1.9 then?
> > 
> > I had the octeon in the _other_ unaligned instruction mode in mind
> > with that.
> 
> Right so did I but isn't the "formula":
> 
>   mips64r2 - MIPS unaligned instructions + custom unaligned instructions = mips64r1.9?

Anything without MIPS unaligned instructions would be mips0.9. I vaguely
(mis-?)remembered some octeon coprocessor instruction are different, too,
so I came up with mips0.8 for octeon.

Custom instructions of any sort would be processor specific, not
part of an (Pseudo-)ISA. From that POV, the octeon would be a
mips0.8 + mips2 + mips3 + mips4 + mips64 + mips64r2 + octeon
part.


Thiemo