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Re: [PATCH] Lexra binutils
On Wed, Sep 17, 2008 at 08:47:47PM +0400, Sergey Lapin wrote:
> > opcodes/mips-opc.c:
> > #define I1U INSN_ISA1_UNALIGNED
> > ...
> > -{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, 0, I1}
> > -{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1}
> > +{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, 0, I1U}
> > +{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1U}
> > ...
>
> I would keep the ISA1 / I1 meaning for MIPS I, as this is a well known
> standard for many people.
Sorry, I can't get, what you would suggest there?
If keeping I1, then we can't use bits additively.
Or you suggest create something like ILX and mark with it
all instructions which are supported?
>
> > And all the stuff with adding CPU in both tc-mips.c and BFD.
> > Will it be sufficient?
>
> It also needs a E_MIPS_MACH value. Do the old Lexra toolchains set
> this flag?
No, just R3000.
All the best,
S.