Re: PATCH: PR 658: i386 assembler and disassembler can't handle SIB with INDEX==4

["H.J. Lu" <hjl at lucon dot org>]

On Thu, Sep 20, 2007 at 08:10:21AM +0100, Jan Beulich wrote:
> >> It turns out that Intel assembler uses EIZ/RIZ as fake index
> >> registers for this purpose. This patch adds a new directive,
> >> .allow_index_reg, which will allow EIZ/RIZ as index registers.
> >> Are there any comments?
> >> 
> >> Thanks.
> >> 
> >
> >Here is the updated patch. It displays EIZ/RIZ only when there
> >is an ambiguity. That is "BASE" and "BASE + EIZ/RIZ" have different
> >opcodes.
> 
> I think that on the assembler end, using %eiz is fine, but on the disassembler
> side this pseudo register shouldn't be displayed unless absolutely needed (i.e.
> 
> [	 ]*12:[	 ]+8d b4 26 00 00 00 00[	 ]+lea[ 	]+0x0\(%esi,%eiz,1\),%esi
> 
> should be
> 
> [	 ]*12:[	 ]+8d b4 26 00 00 00 00[	 ]+lea[ 	]+0x0\(%esi,,1\),%esi
> 
> or
> 
> [	 ]*12:[	 ]+8d b4 26 00 00 00 00[	 ]+lea[ 	]+0x0\(%esi,1\),%esi
> 
> depending on what appears to make more sense. Perhaps even more reasonably
> we could introduce a new option (or tie this to suffix_always), and by default
> retain the old behavior. With the option enabled, you could then of course always
> display the fake index.
> 

The problem is they are either invalid or different:

bash-3.2$ cat x.s
        lea 0x0(%esi,1),%esi
bash-3.2$ /usr/bin/as -o x.o x.s --32     
bash-3.2$ objdump -dr x.o 

x.o:     file format elf32-i386

Disassembly of section .text:

00000000 <.text>:
   0:   8d 36                   lea    (%esi),%esi
bash-3.2$ cat y.s
        lea 0x0(%esi,,1),%esi
bash-3.2$ /usr/bin/as -o y.o y.s --32     
y.s: Assembler messages:
y.s:1: Error: expecting scale factor of 1, 2, 4, or 8: got `'
bash-3.2$ 


H.J.