Table of Contents

1. Introduction to CGEN

1.1 Overview

1.1.1 Goal
1.1.2 Why do it?
1.1.3 Maybe it should not be done?
1.1.4 How ambitious is CGEN?

1.1.4.1 More complicated simulators
1.1.4.2 Profiling tools
1.1.4.3 Program analysis tools
1.1.4.4 ABI description
1.1.4.5 Machine generated architecture reference material
1.1.4.6 Tools like what NJMCT provides
1.1.4.7 Input to a compiler backend
1.1.4.8 Hardware/software codesign

1.1.5 What's missing that should be there soon?

1.2 CPU description language

1.2.1 Language requirements
1.2.2 Layout
1.2.3 Language problems

1.3 Opcodes support
1.4 Simulator support
1.5 Testing support

1.5.1 Assembler/disassembler testing
1.5.2 Simulator testing

1.6 Implementation language

2. Running CGEN
3. CGEN's Register Transfer Language

3.1 RTL Introduction
3.2 Trade-offs
3.3 Rules and notes
3.4 Definitions
3.5 Attributes

3.5.1 Boolean Attributes
3.5.2 Integer Attributes
3.5.3 Enumerated Attributes
3.5.4 Bitset Attributes

3.6 Architecture Variants

3.6.1 define-arch

3.6.1.1 default-alignment
3.6.1.2 insn-lsb0?
3.6.1.3 mach-name-list
3.6.1.4 isa-name-list

3.6.2 define-isa

3.6.2.1 default-insn-word-bitsize
3.6.2.2 default-insn-bitsize
3.6.2.3 base-insn-bitsize
3.6.2.4 decode-assist
3.6.2.5 liw-insns
3.6.2.6 parallel-insns
3.6.2.7 condition
3.6.2.8 setup-semantics
3.6.2.9 decode-splits

3.6.3 define-cpu

3.6.3.1 endian
3.6.3.2 word-bitsize
3.6.3.3 insn-chunk-bitsize
3.6.3.4 parallel-insns
3.6.3.5 file-transform

3.6.4 define-mach

3.6.4.1 bfd-name
3.6.4.2 isas

3.7 Model Variants

3.7.1 mach
3.7.2 state
3.7.3 unit

3.8 Hardware Elements

3.8.1 attrs
3.8.2 type
3.8.3 indices

3.8.3.1 keyword
3.8.3.2 extern-keyword

3.8.4 values
3.8.5 handlers
3.8.6 get
3.8.7 set
3.8.8 Predefined hardware elements
3.8.9 Program counter
3.8.10 Simplification macros

3.9 Instruction Fields

3.9.1 attrs
3.9.2 word-offset
3.9.3 word-length
3.9.4 start
3.9.5 length
3.9.6 follows
3.9.7 mode
3.9.8 encode
3.9.9 decode
3.9.10 Non-contiguous fields
3.9.11 subfields
3.9.12 insert
3.9.13 extract
3.9.14 Simplification macros

3.10 Enumerated constants

3.10.1 prefix
3.10.2 ifield
3.10.3 values
3.10.4 Simplification macros

3.11 Instruction Operands

3.11.1 name
3.11.2 attrs
3.11.3 type
3.11.4 index
3.11.5 asm

3.12 Derived Operands

3.12.1 mode
3.12.2 args
3.12.3 syntax
3.12.4 base-ifield
3.12.5 encoding
3.12.6 ifield-assertion
3.12.7 getter
3.12.8 setter
3.12.9 choices

3.13 Instructions

3.13.1 attrs
3.13.2 syntax
3.13.3 format
3.13.4 semantics
3.13.5 timing
3.13.6 Simplification macros

3.14 Macro-instructions

3.14.1 syntax
3.14.2 expansions

3.15 Modes
3.16 Expressions
3.17 Macro-expressions

4. Preprocessor macros

4.1 Defining a preprocessor macro
4.2 Using preprocessor macros
4.3 Macro expansion
4.4 Default argument values
4.5 Multiple output expressions
4.6 Symbol concatenation
4.7 String concatenation
4.8 Convert a number to a hex
4.9 Convert a string to uppercase
4.10 Convert a string to lowercase
4.11 Getting part of a string
4.12 List splicing
4.13 Number generation
4.14 Mapping a macro over a list
4.15 Applying a macro to a list
4.16 Defining a macro inline
4.17 Passing macros as arguments

5. Porting

5.1 Introduction to porting
5.2 Supported Guile versions
5.3 Running configure
5.4 Writing a CPU description file

5.4.1 Conventions
5.4.2 Writing define-arch
5.4.3 Writing define-isa
5.4.4 Writing define-cpu
5.4.5 Writing define-mach
5.4.6 Writing define-model
5.4.7 Writing define-hardware
5.4.8 Writing define-ifield
5.4.9 Writing define-normal-insn-enum
5.4.10 Writing define-operand
5.4.11 Writing define-insn
5.4.12 Writing define-macro-insn
5.4.13 Using define-pmacro
5.4.14 Interactive development

5.5 Doing an opcodes port
5.6 Doing a GAS port
5.7 Building a GAS test suite
5.8 Doing a simulator port
5.9 Building a simulator test suite

6. Opcodes support

6.1 Generated files
6.2 The .opc file
6.3 Special assembler parsing needs

7. Simulation support
8. Writing an application

8.1 File Layout
8.2 File Generation Process
8.3 Coding Conventions
8.4 Accessing Loaded Data
8.5 Name References
8.6 String Building
8.7 COS

9. Glossary
10. Miscellaneous notes

10.1 Description language notes
10.2 CGEN architecture notes
10.3 COS notes
10.4 RTL notes
10.5 Guile implementation notes
10.6 Code generation notes
10.7 Machine generated files notes
10.8 Implementation language notes

11. Credits
Index