Bug 8395 - sim: sh: some fixes for gencode.c - mainly autoincrement
Summary: sim: sh: some fixes for gencode.c - mainly autoincrement
Status: ASSIGNED
Alias: None
Product: gdb
Classification: Unclassified
Component: sim (show other bugs)
Version: 5.3
: P3 enhancement
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2003-07-18 17:28 UTC by dmcq2002
Modified: 2021-10-31 17:13 UTC (History)
2 users (show)

See Also:
Host:
Target: sh-*
Build:
Last reconfirmed:


Attachments
diff.txt (1.31 KB, patch)
, dmcq2002
Details | Diff

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Description dmcq2002 2003-07-18 17:28:00 UTC
[Converted from Gnats 1290]

I've attached a diff -pcw with the latest source I can find in sim/sh/gencode.c 1.8 showing various fixes.

They are to fix:

Autoincrement and autodecrement when the address register is the same as the register being loaded or stored.

A problem with the stable sort, the method there at the moment may not work sometimes. I've put in an original order number to sort against. (Perhaps the linux qsort does something to avoid this problem?)

A problem with transferring between FPUL and a floating point register. It should not use floats at all whilst doing this as the host may change NaNs on the fly from signalling to quiet NaNs - and the operations may act on the lower half of doubles which look like NaNs.

A comment end marker missing from a generated line thus chopping out some code.

Release:
GDB 5.3

Environment:
I don't have a environment to run gdb in so the release number is just to say I've compared with the latest source.

How-To-Repeat:

I haven't got a linux system to run things on so I haven't been able to test actually compiling with gdb - I've just been hacking the simulator itself.

The one that mightn't be obvious is the floating point one, and qsort may be stable on linux. I'm not sure what you're sh assembler is like but this is the equivalent of loading a double using two integer registers - and the double gets the wrong value:


the double may end up as 
0x41e00000ffe00000
whereas it should be
0x3ff00000ffa00000

mov.l =0x3ff00000, r2
mov.l =0xffa00000, r4
mov.l =0x00280800, r0
lds   r0, fpscr
lds   r4, fpul
fsts  fpul, fr9		; can go wrong
lds   r2, fpul
fsts  fpul, fr8
Comment 1 dmcq2002 2003-07-18 17:28:00 UTC
Fix:
Proposed patches in attached diff.txt. gencode.c is the original sim/sh/gencode.c 1.8 and gencode2.c is it with fixes.
Comment 2 Mike Frysinger 2015-03-30 01:28:10 UTC
Comment on attachment 3319 [details]
diff.txt

i noticed & fixed the gencode/DSR bit independently:
https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=02131c7ff660a5ca08147899429e6e7780d737aa