I ran into some failures for test-case gdb.dwarf2/dw2-lines.exp on arm-linux with target board unix/mthumb.

The simplest way to reproduce what I think is the root cause for those failures is:
...
$ gcc src/gdb/testsuite/gdb.dwarf2/dw2-lines.c -mthumb
$ gdb -q -batch a.out -ex "b bar"
Breakpoint 1 at 0x4f2
...
with bar disassembly looking like:
...
000004ec <bar>:
 4ec:	b580      	push	{r7, lr}
 4ee:	af00      	add	r7, sp, #0

000004f0 <bar_label>:
 4f0:	2001      	movs	r0, #1
 4f2:	f7ff fff1 	bl	4d8 <foo>
...

The insn at 4f0 has nothing to do with stack setup, and shouldn't be skipped.

Interestingly, with -marm (using arm_analyze_prologue) we do get the desired result:
...
$ gcc src/gdb/testsuite/gdb.dwarf2/dw2-lines.c -marm
$ gdb -q -batch a.out -ex "b bar"
Breakpoint 1 at 0x500
...
while the disassembly is very similar:
...
000004f8 <bar>:
 4f8:	e92d4800 	push	{fp, lr}
 4fc:	e28db004 	add	fp, sp, #4

00000500 <bar_label>:
 500:	e3a00001 	mov	r0, #1
 504:	ebfffff3 	bl	4d8 <foo>
...

With arm_analyze_prologue, the mov insn is unrecognized, and so we hit this code:
...
        {
          /* The optimizer might shove anything into the prologue, if                                          
             we build up cache (cache != NULL) from scanning prologue,                                         
             we just skip what we don't recognize and scan further to                                          
             make cache as complete as possible.  However, if we skip                                          
             prologue, we'll stop immediately on unrecognized                                                  
             instruction.  */
          unrecognized_pc = current_pc;
          if (cache != NULL)
            continue;
          else
            break;
        }
...
and because cache == NULL, we break and return unrecognized_pc == 0x500.

With thumb_analyze_prologue, the movs insn is recognized.  Making it unrecognized:
...
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index f36ce631a08..2b244da0b5c 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -1150,7 +1150,7 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
        /* Skip register copies, i.e. saves to another register
           instead of the stack.  */
        ;
-      else if ((insn & 0xf800) == 0x2000)      /* movs Rd, #imm */
+      else if (false && (insn & 0xf800) == 0x2000)     /* movs Rd, #imm */
        /* Recognize constant loads; even with small stacks these are necessary
           on Thumb.  */
        regs[bits (insn, 8, 10)] = pv_constant (bits (insn, 0, 7));
...
makes us hit this simple :
...
      else
        {
          /* The optimizer might shove anything into the prologue,                                             
             so we just skip what we don't recognize.  */
          unrecognized_pc = start;
        }
...
which sets unrecognized_pc to 0x4f0 and gets us the desired result:
...
$ gdb -q -batch a.out -ex "b bar"
Breakpoint 1 at 0x4f0
...

It's possible that we need to add a similar:
...
          if (cache == nullptr)
            break;
...
because a subsequent unrecognized instruction would overwrite unrecognized_pc, which is not what we want.

Anyway, the question is whether indeed the movs insn can be part of actual stack setup.

If not, than AFAIU we can get away with:
...
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index f36ce631a08..8bafeb2e0f6 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -1150,7 +1150,7 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
        /* Skip register copies, i.e. saves to another register
           instead of the stack.  */
        ;
-      else if ((insn & 0xf800) == 0x2000)      /* movs Rd, #imm */
+      else if (cache != nullptr && (insn & 0xf800) == 0x2000)  /* movs Rd, #imm */
        /* Recognize constant loads; even with small stacks these are necessary
           on Thumb.  */
        regs[bits (insn, 8, 10)] = pv_constant (bits (insn, 0, 7));
...

If so then, we need to keep track of insn-after-last-stack-related-insn, and return that.