On embedded PowerPC platforms with VLE instruction set (powerpc:vle) the presence of SPE APU extension overrides the actual architecture to powerpc:e500. The architecture is detected correctly as `powerpc:vle` in bfd from compiler provided section flags (check performed by `_bfd_elf_ppc_set_arch()` at elf32-ppc.c ) `rs6000_gdbarch_init()` at rs6000-tdep.c then manually parses the apuinfo section to determine if SPE APU is present and overrides the detected architecture. `info->abfd->archinfo` and `info->bfd_arch_info` are out of sync as a result of this and may be source of additional bugs. Even after user overrides to `powerpc:vle` the `maint print arch` displays ` bfd_arch_info = powerpc:e500` and the disassembler doesn't properly parse the instructions (treating them as non-VLE). The VLE + SPE combination is possible on e200z3/4/6/7 cores (MPC5777C, MPC5775K being the concrete examples).
AdaCore has had this patch for ages; I'm not sure why it was apparently never submitted. Can you try it? (I don't know if this will help you or not, I just saw "VLE" and remembered that this existed.) diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index 67c7a361259..2086e2f3e77 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -3241,6 +3241,8 @@ static struct variant variants[] = { {"powerpc", "PowerPC user-level", bfd_arch_powerpc, bfd_mach_ppc, &tdesc_powerpc_altivec32}, + {"powerpc", "PowerPC user-level (VLE)", bfd_arch_powerpc, + bfd_mach_ppc_vle, &tdesc_powerpc_altivec32}, {"power", "POWER user-level", bfd_arch_rs6000, bfd_mach_rs6k, &tdesc_rs6000}, {"403", "IBM PowerPC 403", bfd_arch_powerpc,
Thanks for your suggestion. Doesn't solve the mentioned issue but there is also a missing variant entry for powerpc_vle which your patch seems to provide. I need to evaluate if the tdesc_powerpc_altivec32 is appropriate (probably not).
A quick hack that disables the SPE check, provides VLE variant & drops support for VLE / non-VLE mixing in ppc-dis.c seems to get the disassembly going, but this obviously can't be considered a final solution. Need to clean it up. diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index 23397d0..6a2d943 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -3506,6 +3506,8 @@ static struct ppc_variant variants[] = bfd_mach_ppc_7400, &tdesc_powerpc_7400}, {"e500", "Motorola PowerPC e500", bfd_arch_powerpc, bfd_mach_ppc_e500, &tdesc_powerpc_e500}, + {"vle", "Motorola PowerPC VLE", bfd_arch_powerpc, + bfd_mach_ppc_vle, &tdesc_powerpc_e500}, /* 64-bit */ {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc, @@ -7565,7 +7567,7 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) which looks at each instruction and determines which unit (and which version of it) can execute it. Grovel through the section looking for relevant e500 APUs. */ - +#if 0 if (bfd_uses_spe_extensions (info.abfd)) { arch = info.bfd_arch_info->arch; @@ -7573,7 +7575,7 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) bfd_default_set_arch_mach (&abfd, arch, mach); info.bfd_arch_info = bfd_get_arch_info (&abfd); } - +#endif /* Find a default target description which describes our register layout, if we do not already have one. */ if (! tdesc_has_registers (tdesc)) diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c index d97137d..a5694c4 100644 --- a/opcodes/ppc-dis.c +++ b/opcodes/ppc-dis.c @@ -297,14 +297,14 @@ get_powerpc_dialect (struct disassemble_info *info) dialect = private_data (info)->dialect; /* Disassemble according to the section headers flags for VLE-mode. */ - if (dialect & PPC_OPCODE_VLE - && info->section != NULL && info->section->owner != NULL - && bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour - && elf_object_id (info->section->owner) == PPC32_ELF_DATA - && (elf_section_flags (info->section) & SHF_PPC_VLE) != 0) +// if (dialect & PPC_OPCODE_VLE +// && info->section != NULL && info->section->owner != NULL +// && bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour +// && elf_object_id (info->section->owner) == PPC32_ELF_DATA +// && (elf_section_flags (info->section) & SHF_PPC_VLE) != 0) return dialect; - else - return dialect & ~ PPC_OPCODE_VLE; +// else +// return dialect & ~ PPC_OPCODE_VLE; } /* Handle -m and -M options that set cpu type, and .machine arg. */